JPS61216531A - Two-wire and four-wire converting circuit - Google Patents
Two-wire and four-wire converting circuitInfo
- Publication number
- JPS61216531A JPS61216531A JP3320485A JP3320485A JPS61216531A JP S61216531 A JPS61216531 A JP S61216531A JP 3320485 A JP3320485 A JP 3320485A JP 3320485 A JP3320485 A JP 3320485A JP S61216531 A JPS61216531 A JP S61216531A
- Authority
- JP
- Japan
- Prior art keywords
- wire
- impedance
- voltage
- operational amplifier
- output terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/54—Circuits using the same frequency for two directions of communication
- H04B1/58—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
- H04B1/581—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa using a transformer
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Interface Circuits In Exchanges (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はディジタル交換機の加入者回路等に使用される
二線四線変換回路の改良に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to improvements in two-wire and four-wire conversion circuits used in subscriber circuits of digital exchanges, etc.
ディジタル交換機の加入者回路の構成回路の・一つとし
て、二線式加入者線路と四線式通話路網とを接続する二
線四線変換回路がある。One of the constituent circuits of the subscriber circuit of a digital exchange is a two-wire/four-wire conversion circuit that connects a two-wire subscriber line and a four-wire communication network.
この種の加入者回路は収容加入者毎に設ける必要がある
為、極力小形、且つ経済的に構成する必要があり、その
結果前記二線四線変換回路にも同様に、小形化・経済化
が強く要望される。Since this type of subscriber circuit needs to be provided for each accommodated subscriber, it is necessary to make it as small and economical as possible. is strongly requested.
第２図はこの種加入者回路における従来ある二線四線変
換回路の一例を示す図である。FIG. 2 is a diagram showing an example of a conventional two-wire/four-wire conversion circuit in this type of subscriber circuit.
第２図において、１は一次および二次捲線比が１対１で
、伝送歪が無い変成器、２１乃至２４は演算増、幅器、
３１乃至４３７はインピーダンス素子、４１乃至４′４
は抵抗とする。変成器１の２ＮＩＡ端子２人および２Ｂ
には二線式６ｏ入者線路を経由して電話機に接続される
。２線端子２Ａおよび２Ｂから見た二線式加入者線路の
インピーダンス値を２２とする。またインピーダンス素
子３１乃至３４のインピーダンス値はそれぞれＺｌに等
しく、またインピーダンス素子３５乃至３７のインピー
ダンス値はそれぞれＺ２に等しく、更に抵抗４１乃至４
４の抵抗値は何れもＲとする。In FIG. 2, 1 is a transformer with a 1:1 primary and secondary winding ratio and no transmission distortion, 21 to 24 are arithmetic amplifiers, width transformers,
31 to 437 are impedance elements, 41 to 4'4
is the resistance. 2NIA terminals 2 and 2B of transformer 1
is connected to the telephone via a two-wire 6o incoming line. It is assumed that the impedance value of the two-wire subscriber line viewed from the two-wire terminals 2A and 2B is 22. Further, the impedance values of the impedance elements 31 to 34 are each equal to Zl, the impedance values of the impedance elements 35 to 37 are each equal to Z2, and the impedance values of the impedance elements 35 to 37 are each equal to Z2.
The resistance values of 4 are all set to R.
かかる状態で、２線端子２Ａおよび２Ｂに電圧Ｖ ２
ｉが入力されると、変成器ｌの二次捲線に生ずる電圧■
２は（１）式で示される。In this state, voltage V 2 is applied to the two-wire terminals 2A and 2B.
When i is input, the voltage generated in the secondary winding of transformer l is
2 is shown by equation (1).
Ｖｚ ＝２１ ＋ （Ｚ １ ＋Ｚ ２） ＸＶＨ・・
・（１）また抵抗４１および４２の抵抗値が等しくＲで
あることから、演算増幅器２１の出力電圧ｖ３はＶ２に
等しくなる。Vz = 21 + (Z 1 + Z 2) XVH...
(1) Also, since the resistance values of the resistors 41 and 42 are equal to R, the output voltage v3 of the operational amplifier 21 becomes equal to V2.
更に演算増幅器２２、インピーダンス素子３２および３
５により４線送信出力端子４Ｆに出力される電圧ｖ４゜
は（２）式で示される。Further, an operational amplifier 22, impedance elements 32 and 3
The voltage v4° outputted to the 4-wire transmission output terminal 4F by 5 is expressed by equation (2).
Ｖ４゜＝ （１＋２２／Ｚｌ）Ｖ。V4゜= (1+22/Zl)V.
＝（１＋Ｚ２／Ｚｌ）Ｖｚ −（２）（１
）式および（２）式から、電圧■４゜はＶ２ｉに等しく
なることが判る。=(1+Z2/Zl)Vz-(2)(1
) and (2), it can be seen that the voltage ■4° is equal to V2i.
次に４線受信入力端子４Ｂに電圧ｖ４ｉが入力されると
、演算増幅器２３、インピーダンス素子３３および３６
により演算増幅器２３の出力端子（０）に生ずる電圧ｖ
４は（３）式で示される。Next, when the voltage v4i is input to the 4-wire reception input terminal 4B, the operational amplifier 23, the impedance elements 33 and 36
The voltage v generated at the output terminal (0) of the operational amplifier 23 due to
4 is shown by equation (3).
Ｖａ −（１＋２１／Ｚ２） Ｖ４ｉ ・（
３）また、インピーダンス素子３１および変成器１を経
由して２線端子２Ａおよび２Ｂ間に生ずる電圧Ｖ２゜は
（４）式で示される。Va −(1+21/Z2) V4i ・(
3) Furthermore, the voltage V2° generated between the two-wire terminals 2A and 2B via the impedance element 31 and the transformer 1 is expressed by equation (4).
Ｖｚｏ＝Ｚ１÷（Ｚ１＋Ｚ２）ＸＶａ −（４）
（３）式および（４）式から、電圧■２゜は■４ｉに等
しくなることが判る。Vzo=Z1÷(Z1+Z2)XVa-(4)
From equations (3) and (4), it can be seen that voltage ■2° is equal to ■4i.
また４線受信入力端子４Ｂに電圧Ｖ ４−’入力された
場合、演算増幅器２４の非反転入力端子（＋）に入力さ
れる電圧Ｖ、は（５）式で示される。Further, when the voltage V4-' is input to the 4-wire reception input terminal 4B, the voltage V input to the non-inverting input terminal (+) of the operational amplifier 24 is expressed by equation (5).
Ｖｓ ＝２２ ” （Ｚ １ ＋ ２２） ｘＶａ＝ｖ
４． ・・・（
５）なお演算増幅器２４の出力端子（０）にも同一電圧
Ｖ、＝Ｖ、、が出力されるので、抵抗４３および４４を
介して演算増幅器２１の非反転入力端子（＋）に入力さ
れる電圧Ｖ、はＶ４ｔ／２となり、また演算増幅器２１
の反転入力端子（−）には抵抗４１を介して電圧Ｖ ｚ
＝ Ｖ ａ、′が入力されるので、演算増幅器２１の
出力端子（０）に生ずる電圧をｖ３とすると、（６）式
が成立す゛る。 □（Ｖｚ −Ｖｉ ）＋Ｒ＝５（Ｖｂ
−Ｖ３ ）＋Ｒ−（６）（６）式からｖ、＝０となり
、４線受信入力端子４Ｂに入力された電圧Ｖ４．は４ｖ
Ａ送信出力端子４Ｆには伝達されぬことが判る。Vs = 22 ” (Z 1 + 22) xVa = v
4. ...(
5) Since the same voltage V, = V, is also output to the output terminal (0) of the operational amplifier 24, it is input to the non-inverting input terminal (+) of the operational amplifier 21 via the resistors 43 and 44. The voltage V becomes V4t/2, and the operational amplifier 21
The voltage V z is applied to the inverting input terminal (-) of
=Va,' is input, so if the voltage generated at the output terminal (0) of the operational amplifier 21 is v3, then equation (6) holds true. □(Vz-Vi)+R=5(Vb
-V3)+R-(6) From equation (6), v, = 0, and the voltage V4. is 4v
It can be seen that the signal is not transmitted to the A transmission output terminal 4F.
以上の説明から明らかな如く、従来ある二線口”線変換
回路においては、２線端子２人および２Ｂに入力される
電圧Ｖ ２ ｉを４線送信出力端子４Ｆに伝達し、また
４線受信入力端子４Ｂに入力される電圧■４．を４線送
信出力端子４Ｆに伝達すること無（，２線端子２Ａおよ
び２Ｂに伝達する為に、変成器１の他に４個の演算増幅
器２１乃至２４．７個のインピーダンス素子３１乃至３
７および４個の抵抗４１乃至４４から構成され、当該加
入者回路の小形化・経済化を損なう恐れがあった。As is clear from the above explanation, in the conventional two-wire converter circuit, the voltage V 2 i input to the two two-wire terminals and 2B is transmitted to the four-wire transmission output terminal 4F, and the four-wire reception The voltage input to the input terminal 4B is not transmitted to the 4-wire transmission output terminal 4F (in addition to the transformer 1, four operational amplifiers 21 to 24.7 impedance elements 31 to 3
7 and four resistors 41 to 44, there was a risk that the miniaturization and economicalization of the subscriber circuit would be impaired.
Ｃ問題点を解決するための手段〕
本発明は第１図に示す如き手段を講することに゛より、
前記・問題点を解決する。Means for Solving Problem C] The present invention takes the measures as shown in FIG.
Solve the above problems.
即ち平衡−不平衡変換用変成器（第１図１）の二次捲線
の一端を地気に接続し、他端を４線送信用演算増幅器（
２２）の非反転入力端子（＋）に接続すると共に、第一
のインピーダンス素子（３１）を介して４線受信用演算
増幅器（２３）の出力端子（０）に接続する。That is, one end of the secondary winding of the balanced-unbalanced transformer (Fig. 1) is connected to the ground, and the other end is connected to the 4-wire transmission operational amplifier (Fig. 1).
22) and to the output terminal (0) of the 4-wire receiving operational amplifier (23) via the first impedance element (31).
また４線送信用演算増幅器（２２）の反転入力端子（−
）に一端を接続される第二のインピーダンス素子（３２
）の他端を４ ｖＡ受信用演算増幅器（２３）の出力端
子（０）に接続する。Also, the inverting input terminal (-
) a second impedance element (32
) is connected to the output terminal (0) of the 4 vA receiving operational amplifier (23).
更に第二のインピーダンス素子（３２）および４線受信
用演算増幅器（２３）の出力端子（０）と反転入力端子
（−）との間に接続された第三のインピーダンス素子（
３３）のインピーダンス値を第一のインピーダンス素子
（３１）のインピーダンス値Ｚ１と等しくまたはそのＮ
倍に設定し、また４線送信用演算増幅器（２２）の出力
端子（０）と反転入力端子（−）との間に接続された第
四のインピーダンス素子（３５）および４線受信用演算
増幅器（２３）の反転入力端子（−）に一端を接続し、
他端を地気に接続する第五のインピーダンス素子（３６
）のインピーダンス値ヲ変成器（１）の−次捲線に接続
される二線式回線のインピーダンス値Ｚ２と等しくまた
はそのＮ倍に設定する。Further, a second impedance element (32) and a third impedance element (
33) is equal to or N of the impedance value Z1 of the first impedance element (31).
and a fourth impedance element (35) connected between the output terminal (0) and the inverting input terminal (-) of the 4-wire transmission operational amplifier (22) and the 4-wire reception operational amplifier. Connect one end to the inverting input terminal (-) of (23),
A fifth impedance element (36
) is set equal to or N times the impedance value Z2 of the two-wire line connected to the negative winding of transformer (1).
即ち本発明によれば、変成器（１）の他に２個の演算増
幅器（２２）および（２３）、５個のインピーダンス素
子（３１）乃至（３３）、（３５）および（３６）によ
り構成されることとなり、従来ある二線四線変換回路に
比し大幅に構成素子数も削減され、当該加入者回路の経
済化・小形化が促進される。That is, according to the present invention, in addition to the transformer (1), the transformer includes two operational amplifiers (22) and (23), and five impedance elements (31) to (33), (35) and (36). As a result, the number of constituent elements can be significantly reduced compared to conventional two-wire/four-wire conversion circuits, promoting economicalization and miniaturization of the subscriber circuit.
以下、本発明の一実施例を図面により説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図は本発明の一実施例による二線四線変換回路を示
す図である。なお、全図を通じて同一符号は同一対象物
を示す。また変成器１の２線端子２Ａおよび２Ｂには二
線式加入者線路を経由して電話機に接続され、２ｍ端子
２Ａおよび２Ｂから見た二線式加入者、線路のインピー
ダンス値を２２とし、更にインピーダンス素子３１乃至
３４のインピーダンス値はそれ３ぞれＺｌに等しく、ま
たインピータンス素子３５乃至３７のインピーダンス値
はそれぞれＺ２に等しく設定されるものとする。FIG. 1 is a diagram showing a two-wire and four-wire conversion circuit according to an embodiment of the present invention. Note that the same reference numerals indicate the same objects throughout the figures. Further, the two-wire terminals 2A and 2B of the transformer 1 are connected to a telephone set via a two-wire subscriber line, and the impedance value of the two-wire subscriber line seen from the 2m terminals 2A and 2B is 22, Furthermore, it is assumed that the impedance values of impedance elements 31 to 34 are each set equal to Zl, and the impedance values of impedance elements 35 to 37 are each set equal to Z2.
第１図において、２線端子２Ａおよび２Ｂに電圧ｖｔｉ
が入力されると、変成器１の二次捲線に生ずる電圧ｖｚ
は（１）式で示される。In FIG. 1, voltage vti is applied to two-wire terminals 2A and 2B.
is input, the voltage vz generated in the secondary winding of transformer 1
is shown by equation (1).
Ｖ、ｇ ＝２１ ＋ （Ｚ １ ＋Ｚ ２）、ＸＶｚｚ
・・・（ｘ）電圧ｖ２は演算増幅器２２の非反
転入力端子（＋）に入力される。その結果演算増幅器２
２、インピーダンス素子３２および３５により４線送信
出力端子４Ｆに出力される電圧ｖ４゜は（２）式で示さ
れる。V, g = 21 + (Z 1 + Z 2), XVzz
...(x) The voltage v2 is input to the non-inverting input terminal (+) of the operational amplifier 22. As a result, operational amplifier 2
2. The voltage v4° outputted to the 4-wire transmission output terminal 4F by the impedance elements 32 and 35 is expressed by equation (2).
Ｖａ。＝ （１＋２２／Ｚｌ）Ｖ！ −
（２）（１）式および（２）式から、電圧■４゜はＶ−
ｔ ｉに等！くなることが判る。Va. = (1+22/Zl)V! −
(2) From equations (1) and (2), the voltage ■4° is V-
ti etc! It turns out that it will become.
次に４ｇ受信入力端子４Ｂに電圧ｖ４五が入力されると
、演算増幅器２３、インピーダンス素子３゛３および３
６により演算増幅器２３の出力端子（０）に生ずる電圧
■４は（３）式で示される。Next, when the voltage v45 is input to the 4g reception input terminal 4B, the operational amplifier 23 and the impedance elements 3 and 3
6, the voltage 4 generated at the output terminal (0) of the operational amplifier 23 is expressed by equation (3).
Ｖａ ＝ （１＋ ２１／ Ｚ ２） ＸＶ４ｔ
’ −（３）電圧ｖ４がインピーダンス素子３１を
経由して変成器１に入力されることにより、２線端子２
Ａおよび２Ｂ間に生ずる電圧ｖ２゜は（４）式で示され
る。Va = (1+ 21/Z 2) XV4t
'-(3) Voltage v4 is input to the transformer 1 via the impedance element 31, so that the 2-wire terminal 2
The voltage v2° generated between A and 2B is expressed by equation (4).
Ｖｚｏ＝Ｖｚ ＝Ｚ１÷（Ｚ １ ＋ ２２） ｘ Ｖ
ａ ・（４）（３）式および（４）式から、電圧ｖ２゜
はｖ４１に等しくなることが判る。Vzo=Vz=Z1÷(Z 1 + 22) x V
a・(4) From equations (3) and (4), it can be seen that the voltage v2° is equal to v41.
電圧■８は演算増幅器２２の非反転入力端子（＋）に入
力され、また電圧ｖ４はインピーダンス素子３２を経由
して演算増幅器２２の反転入力端子（−）に入力される
。その結果演算増幅器２２の出力端子（０）に出力され
る電圧を■４゜とすると、（７）式が成立する。Voltage ■8 is input to the non-inverting input terminal (+) of operational amplifier 22, and voltage v4 is input to the inverting input terminal (-) of operational amplifier 22 via impedance element 32. Assuming that the voltage outputted to the output terminal (0) of the operational amplifier 22 as a result is 4 degrees, the equation (7) holds true.
（Ｖｉａ−Ｖｚ ）＋Ｚ２＝ （ｖｚ −Ｖａ ）＋２
１・・・（７）
（７）式および（３）式から電圧ｖ４゜を求めると（８
）式の如くなる。(Via-Vz)+Z2=(vz-Va)+2
1...(7) Calculating the voltage v4° from equations (7) and (3), we get (8
) is as follows.
ｖ４゜＝ （１＋２２／Ｚｌ）Ｖｚ −２２／ＺＩＸＶ４ − （１＋Ｚ２／Ｚｌ）Ｖ４ｉ −２２／ＺＩＸ （１＋２１／Ｚ２）Ｖａ。v4゜= (1+22/Zl)Vz -22/ZIXV4 - (1+Z2/Zl)V4i -22/ZIX (1+21/Z2) Va.
＝ （１＋Ｚ ２／Ｚ １） ｖ４ｉ
。= (1+Z 2/Z 1) v4i
.
−（１＋２２／Ｚｌ）ＸＶ４ｉ
＝０ ・・・（８）（
８）式から、４線受信入力端子４Ｂに入力された電圧■
４言よ４線送信出力端子４Ｆには伝達されぬことが判る
。-(1+22/Zl)XV4i =0...(8)(
From formula 8), the voltage input to the 4-wire reception input terminal 4B is
It can be seen that the signal is not transmitted to the 4-wire transmission output terminal 4F.
以主の説明から明らかな如く、本実施例によれば、２線
端子２Ａおよび２Ｂに入力される電圧Ｖ２ｉを４線送信
出力端子４Ｆに伝達し、また４線受信入力端子４Ｂに入
力される電圧ｖ４．を４線送信出力端子４Ｆに伝達する
こと無く、２線端子２Ａおよび２Ｂに伝達する為に、変
成器１の他に、２個の演算増幅器２２および２３、並び
に５個のインピーダンス素子３１乃至３３．３５および
３６のみを使用して二線四線変換回路が構成され、第２
図に示される従来ある二線四線変換回路に比し、構成素
子数が大・幅に削減される。As is clear from the following description, according to this embodiment, the voltage V2i input to the 2-wire terminals 2A and 2B is transmitted to the 4-wire transmission output terminal 4F, and is also input to the 4-wire reception input terminal 4B. Voltage v4. In order to transmit the signal to the two-wire terminals 2A and 2B without transmitting it to the four-wire transmission output terminal 4F, in addition to the transformer 1, two operational amplifiers 22 and 23 and five impedance elements 31 to 33 are used. A two-wire four-wire conversion circuit is constructed using only .35 and 36, and the second
Compared to the conventional two-wire/four-wire conversion circuit shown in the figure, the number of constituent elements is greatly reduced.
以上、本発明によれば、二線四線変換回路が変成器の他
に２個の演算増幅器および５個のインピーダンス素子に
より構成されることとなり、従来ある二線四線変換回路
に比し大幅に構成素子数も削減され、当該加入者回路の
経済化・小形化が促進される。As described above, according to the present invention, the two-wire/four-wire conversion circuit is configured with two operational amplifiers and five impedance elements in addition to the transformer, which is significantly larger than the conventional two-wire/four-wire conversion circuit. In addition, the number of constituent elements is also reduced, promoting economicalization and miniaturization of the subscriber circuit.
第１図は本発明の一実施例による二線四線変換回路を示
す図、第２図は従来ある二線四線変換回路の一例を示す
図である。
図において、１は変成器、２１乃至２４は演算増幅器、
３１乃至３７はインピーダンス素子、４１乃至４４は抵
抗、Ｚｌおよびｚ２はインピーダンス値、ｖｔ乃至ｖｂ
ｓ ｖｚｔ、ｖｇｏ、ｖ４ｉおよびｖ４゜は電圧、を示
す。FIG. 1 is a diagram showing a two-line/four-wire conversion circuit according to an embodiment of the present invention, and FIG. 2 is a diagram showing an example of a conventional two-line/four-wire conversion circuit. In the figure, 1 is a transformer, 21 to 24 are operational amplifiers,
31 to 37 are impedance elements, 41 to 44 are resistors, Zl and z2 are impedance values, vt to vb
s vzt, vgo, v4i and v4° represent voltages.
Claims (1)
続し、他端を４線送信用演算増幅器の非反転入力端子に
接続すると共に、第一のインピーダンス素子を介して４
線受信用演算増幅器の出力端子に接続し、前記４線送信
用演算増幅器の反転入力端子に一端を接続される第二の
インピーダンス素子の他端を前記４線受信用演算増幅器
の出力端子に接続し、前記第二のインピーダンス素子お
よび前記４線受信用演算増幅器の出力端子と反転入力端
子との間に接続された第三のインピーダンス素子のイン
ピーダンス値を前記第一のインピーダンス素子のインピ
ーダンス値と等しくまたはそのＮ倍に設定し、且つ前記
４線送信用演算増幅器の出力端子と反転入力端子との間
に接続された第四のインピーダンス素子および前記４線
受信用演算増幅器の反転入力端子に一端を接続し、他端
を地気に接続する第五のインピーダンス素子のインピー
ダンス値を前記変成器の一次捲線に接続される二線式回
線のインピーダンス値と等しくまたはそのＮ倍に設定す
ることを特徴とする二線四線変換回路。One end of the secondary winding of the transformer for balanced/unbalanced conversion is connected to the ground, the other end is connected to the non-inverting input terminal of the operational amplifier for 4-wire transmission, and the 4-wire winding is connected to the ground through the first impedance element.
A second impedance element is connected to the output terminal of the operational amplifier for line reception, and has one end connected to the inverting input terminal of the operational amplifier for four-wire transmission, and the other end thereof is connected to the output terminal of the operational amplifier for four-wire reception. and the impedance values of the second impedance element and the third impedance element connected between the output terminal and the inverting input terminal of the four-wire receiving operational amplifier are equal to the impedance value of the first impedance element. or N times that value, and a fourth impedance element connected between the output terminal and the inverting input terminal of the 4-wire transmission operational amplifier, and one end connected to the inverting input terminal of the 4-wire reception operational amplifier. and the impedance value of a fifth impedance element connected to the ground at the other end is set equal to or N times the impedance value of the two-wire line connected to the primary winding of the transformer. Two-wire four-wire conversion circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3320485A JPS61216531A (en) | 1985-02-21 | 1985-02-21 | Two-wire and four-wire converting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3320485A JPS61216531A (en) | 1985-02-21 | 1985-02-21 | Two-wire and four-wire converting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61216531A true JPS61216531A (en) | 1986-09-26 |
Family
ID=12379933
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3320485A Pending JPS61216531A (en) | 1985-02-21 | 1985-02-21 | Two-wire and four-wire converting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61216531A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56115041A (en) * | 1980-02-18 | 1981-09-10 | Fujitsu Ltd | Electronic hybrid circuit |
-
1985
- 1985-02-21 JP JP3320485A patent/JPS61216531A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56115041A (en) * | 1980-02-18 | 1981-09-10 | Fujitsu Ltd | Electronic hybrid circuit |
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