JPS61214342A - Circuit for deflecting charged particle beam - Google Patents

Circuit for deflecting charged particle beam

Info

Publication number
JPS61214342A
JPS61214342A JP5528985A JP5528985A JPS61214342A JP S61214342 A JPS61214342 A JP S61214342A JP 5528985 A JP5528985 A JP 5528985A JP 5528985 A JP5528985 A JP 5528985A JP S61214342 A JPS61214342 A JP S61214342A
Authority
JP
Japan
Prior art keywords
deflection system
main
sub
deflection
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5528985A
Other languages
Japanese (ja)
Other versions
JP2553032B2 (en
Inventor
Yutaka Sato
裕 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nikon Corp
Original Assignee
Nippon Kogaku KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Kogaku KK filed Critical Nippon Kogaku KK
Priority to JP60055289A priority Critical patent/JP2553032B2/en
Publication of JPS61214342A publication Critical patent/JPS61214342A/en
Application granted granted Critical
Publication of JP2553032B2 publication Critical patent/JP2553032B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Electron Beam Exposure (AREA)

Abstract

PURPOSE:To reduce the time required for drawing all fields by measuring the difference between the intended positioning level and the output level of a main deflection system and feeding the detection result back to an auxiliary deflection system thereby simultaneously operating the main deflection system and the auxiliary deflection system. CONSTITUTION:A charged electron beam deflector for an electron beam exposure device or a similar device consists of a main deflection system 10 and an auxiliary deflection system 20 the main field of each of which is divided into sub-fields. A D/A convertor 1 is used to analogize information about the position of the central sub-field of the main deflection system 10 and a detector 4 is used to measure the difference between the input and the output of an amplifier 2 to which the analogization result is given. Positional information for drawing a pattern is analogized and fed back to the auxiliary deflection system 20, thereby simultaneously performing main deflection 3 and auxiliary deflection 7. Therefore, it is possible to reduce settling time for moving the beam to the central sub-field, thereby reducing the time of drawing.

Description

【発明の詳細な説明】 (発明の技術分野) 本発明は、電子ビーム露光装置等に用いられる荷電粒子
ビーム偏向系に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to a charged particle beam deflection system used in an electron beam exposure apparatus or the like.

(発明の背景) 電子ビーム露光装置等に用いられる荷電粒子ビーム偏向
系に、要求される条件は(1)高分解能でかつ高安定で
ある事。(2)ダイナミックレンジが大きい事。(3)
高速である事。の3つであるが、これらの要求を、1つ
の偏向系で同時に満足するのが、困難な為、主偏向及び
副偏向系の2つの偏向系を用い描画領域(メインフィー
ルド)を100〜io、ooo程度の小領域(サブフィ
の要求を満足する主偏向系で、描画するサブフィールド
の中心に荷電粒子ビーム(以下単にビームと称す)を偏
向し、このサブフィールド内に含まれているパターンを
前記条件の(3)を満足する副偏向系で高速にビーム駆
動して描画する事により前記(1)〜(3)の3つの条
件を、同時に満足する事が出来るすぐれた方法である。
(Background of the Invention) The required conditions for a charged particle beam deflection system used in an electron beam exposure device or the like are (1) high resolution and high stability. (2) Large dynamic range. (3)
It must be fast. However, it is difficult to simultaneously satisfy these requirements with one deflection system, so two deflection systems, a main deflection system and a sub deflection system, are used to cover the drawing area (main field) from 100 to 100 io. A charged particle beam (hereinafter simply referred to as a beam) is deflected to the center of the subfield to be drawn using a main deflection system that satisfies the requirements of a small area of about . This is an excellent method that can satisfy the three conditions (1) to (3) at the same time by driving the beam at high speed and writing using a sub-deflection system that satisfies the condition (3).

すなわち。Namely.

主偏向系のダイナミックレンジが大きく高分解能の駆動
系はセトリング(目標値に到達する迄の時間)に時間が
、かかるのでサブフィールドの移動の時にのみ使用し、
サブフィールド内のパターン描画は、ダイナミックレン
ジも小さく1分解能も低いので、高速駆動が可能な副偏
向系を使用して描画速度を上げる方法であって、トータ
ルの描画時間を1つの偏向系で描画する場合に比べ大幅
に短縮する事が出来る方法である。
A drive system with a large dynamic range and high resolution of the main deflection system takes time to settle (the time it takes to reach the target value), so it should be used only when moving subfields.
Since pattern drawing within a subfield has a small dynamic range and low resolution, this method uses a sub-deflection system that can be driven at high speed to increase the drawing speed, and the total drawing time is reduced by using one deflection system. This is a method that can significantly shorten the time compared to the previous method.

しかし、このような方法でも、主偏向系が、描画し終わ
った。サブフィールドから2次に描画するサブフィール
ドの中心の位置に、ビームをセトリングするのに、かか
る時間のロスは無視出来ず。
However, even with this method, the main deflection system has finished drawing. The time loss required to settle the beam from one subfield to the center of the second subfield to be drawn cannot be ignored.

特に、サブフィールド数が多い場合の描画時間を。Especially the drawing time when there are many subfields.

さらに短縮する為のネックになっている。This is becoming a bottleneck for further shortening.

(発明の目的) 本発明は、これらの欠点を解決し2次に描画すべきサブ
フィールドの中心にビームを移動する為の主偏向系のセ
トリングに要する時間を、極めて短かくする事により、
トータルの描画時間の飛躍的短縮をはかる事を目的とす
る。
(Objective of the Invention) The present invention solves these drawbacks by extremely shortening the time required for settling of the main deflection system for moving the beam to the center of the subfield to be drawn in the secondary drawing.
The purpose is to dramatically shorten the total drawing time.

(発明の概要) 本発明の発明者は第1に、従来主偏向系の位置於いて、
ビーム偏向及び位置決めに関する諸々の補正をすべて、
副偏向系で行なうようにすれば。
(Summary of the Invention) The inventor of the present invention firstly discovered that, in the position of the conventional main deflection system,
All corrections related to beam deflection and positioning
If you do it with the sub-deflection system.

主偏向系駆動回路は、各サブフィールドの中央位置に対
応する信号を発生するだけでよく、その場合精度及び安
定度さえ良ければ4〜7 bit程度の高速のDACを
使用する事が出来る事。第2に主偏向系を駆動するアン
プは、ダイナミックレンジが大きい為高電圧あるいは大
電流となり高速化には限界があるが、主偏向の位置決め
情報と主偏向アンプの出力信号間の誤差を検出して副偏
向系に帰還する事により、主偏向駆動アンプのセトリン
グタイムを実質的に極めて短かくする事が出来る事の2
つの事項に着目し本発明を成すに至った。
The main deflection system drive circuit only needs to generate a signal corresponding to the center position of each subfield, and in that case, a high-speed DAC of about 4 to 7 bits can be used as long as the accuracy and stability are good. Second, the amplifier that drives the main deflection system has a large dynamic range, so it uses a high voltage or current, and there is a limit to how high the speed can be increased. 2. By feeding back to the sub-deflection system, the settling time of the main deflection drive amplifier can be substantially shortened.
The present invention was accomplished by focusing on two points.

本発明はビーム偏向及び位置決めに関する補正を副偏向
系で行なう様構成し、さらに主偏向の位置決め情報(目
標データ)と主偏向用アンプの出力信号との誤差を副偏
向系に帰還し、該帰還誤差データに従って副偏向系を主
偏向系と同時に動作することを技術的要点としている。
The present invention is configured such that corrections related to beam deflection and positioning are performed in a sub-deflection system, and furthermore, the error between the main deflection positioning information (target data) and the output signal of the main deflection amplifier is fed back to the sub-deflection system, and the error is fed back to the sub-deflection system. The technical point is to operate the sub-deflection system simultaneously with the main deflection system according to error data.

(実施例) 第1図は9本発明を用いた電子ビーム露光機の一実施例
を示す概略図であり、11は電子銃、12は第1コンデ
ンサレンズ、13はブランキング偏向器、14は第2コ
ンデンサレンズ、3は主偏向器、7は副偏向器、15は
対物レンズ、16はxyステージ、10は主偏向駆動回
路、20は副偏向駆動回路である。また第1図の各ブロ
ックの他にもいくつかの補正用の電子光学系が設置され
るのが普通であるが1本発明に直接関係がないので省略
する。
(Embodiment) FIG. 1 is a schematic diagram showing an embodiment of an electron beam exposure machine using the present invention. 11 is an electron gun, 12 is a first condenser lens, 13 is a blanking deflector, and 14 is A second condenser lens, 3 a main deflector, 7 a sub deflector, 15 an objective lens, 16 an xy stage, 10 a main deflection drive circuit, and 20 a sub deflection drive circuit. In addition to the blocks shown in FIG. 1, several correction electron optical systems are normally installed, but they are not directly related to the present invention and will therefore be omitted.

第2図は1本発明の実施例を示す回路であって点線で囲
んだブロック10が主偏向系駆動回路20が副偏向系駆
動回路30が偏向電子光学系である。実際の使用に当た
っては電子ビームをX、 Yの直交座標系の情報で偏向
しなければならないので、第1図の偏向系をもうひと組
必要とする訳であるが9両輪ともまったく同じ偏向系に
なるのでここでは、簡略の為−軸の偏向系についてのみ
説明する。
FIG. 2 shows a circuit showing an embodiment of the present invention, in which a block 10 surrounded by dotted lines is a main deflection system drive circuit 20, and a sub deflection system drive circuit 30 is a deflection electron optical system. In actual use, the electron beam must be deflected using the information in the X and Y orthogonal coordinate system, so one more set of the deflection system shown in Figure 1 is required, but the nine wheels must have exactly the same deflection system. Therefore, for the sake of brevity, only the -axis deflection system will be explained here.

1は主偏向系のサブフィールドの中心位置情報(デジタ
ル信号)をアナログ信号に変換する主偏向D/Aコンバ
ータ(以下D/AコンバータをDACと称す)であり、
たとえばメインフィールドを100X100個のサブフ
ィールドに分割描画する場合は最低7bitのDACが
必要となるが位置精度を上げる為10〜12bitの高
速DACを使用するのが適当と思われる。
1 is a main deflection D/A converter (hereinafter the D/A converter is referred to as DAC) that converts the center position information (digital signal) of the subfield of the main deflection system into an analog signal;
For example, if the main field is divided into 100×100 subfields, a minimum of 7-bit DAC is required, but it seems appropriate to use a 10- to 12-bit high-speed DAC to improve positional accuracy.

2は、主偏向器3の駆動用の主偏向器駆動アンプである
。主偏向器3が静電偏向ならば数百ボルトの高電圧、電
磁偏向ならば数アンペアの大電流従って主偏向DAC1
として高速のものが使用できるようになっても、この主
偏向器駆動アンプ2のセトリングを短縮できなければ全
体の描画時間を短かくする事はできない。
2 is a main deflector drive amplifier for driving the main deflector 3; If the main deflector 3 is an electrostatic deflector, it will have a high voltage of several hundred volts, and if it is an electromagnetic deflector, it will have a large current of several amperes. Therefore, the main deflector DAC 1
Even if a high-speed device becomes available, the overall drawing time cannot be shortened unless the settling of the main deflector drive amplifier 2 can be shortened.

4は、主偏向器駆動アンプの誤差検出器であり主偏向駆
動アンプ2がセトリングするまでの間その入出力間の誤
差を出力する。
Reference numeral 4 denotes an error detector for the main deflector drive amplifier, which outputs the error between the input and output of the main deflection drive amplifier 2 until it settles.

5は、副偏向系を駆動してパターンを描画する為のパタ
ーンの位置情報デジタル信号を逐次アナログ信号に変換
する副偏向DACであり高速変換機能が要求され、10
〜12bitの高速DACが使用される。
5 is a sub-deflection DAC that drives the sub-deflection system and sequentially converts the pattern position information digital signal into an analog signal for drawing the pattern, and requires a high-speed conversion function;
~12 bit high speed DAC is used.

6は副偏向器7の駆動用の副偏向器駆動アンプである。Reference numeral 6 denotes a sub-deflector drive amplifier for driving the sub-deflector 7.

本発明に於いてはこのアンプのダイナミックレンジは2
サブフイ一ルド分の偏向電圧出力が必要となるが、それ
にしても主偏向器駆動アンプ2の数10分の1のダイナ
ミックレンジでよくそのセトリング時間は、主偏向器駆
動アンプ2のそれに比べ、はるかに短かくおよそ数百♀
sec <らいである。
In the present invention, the dynamic range of this amplifier is 2
Although the deflection voltage output for the subfield is required, the dynamic range is several tenths of that of the main deflector drive amplifier 2, and its settling time is much shorter than that of the main deflector drive amplifier 2. Approximately several hundred ♀
sec < leprosy.

7は副偏向器で、高速応答が要求される為、はとんどの
場合静電偏向器が用いられる。
7 is a sub-deflector, and since a high-speed response is required, an electrostatic deflector is used in most cases.

8は補正用DACである。これまでの説明では省略した
が、実際にワークピース上に電子ビームでパターンを描
画する場合、ワークピースをXYステージ上に固定し、
描画するメインフィールドの中心が電子光学系の真下に
来るようにステージを移動する作業が必要となる。この
時ステージは確ずしも目標の位置には、止まらないので
通常は停止位置誤差検出器(不図示)の出力を電子ビー
ムの偏向系にフィードバックして1等価的に位1補正を
行なっている。主としてこの補正量をアナログ信号に変
換するのが、補正用DAC8である。
8 is a correction DAC. Although omitted in the explanation so far, when actually drawing a pattern on a workpiece with an electron beam, the workpiece is fixed on an XY stage.
It is necessary to move the stage so that the center of the main field to be drawn is directly below the electron optical system. At this time, the stage does not necessarily stop at the target position, so normally the output of a stop position error detector (not shown) is fed back to the electron beam deflection system to perform a 1-equivalent correction. There is. The correction DAC 8 mainly converts this correction amount into an analog signal.

また該補正用DAC8は外部磁場の影響や偏向系の歪等
を、補正する為にも用いられる。
The correction DAC 8 is also used to correct the influence of an external magnetic field, distortion of the deflection system, and the like.

第3図に、主偏向DAC1の出力(a)主偏向器駆動ア
ンプ2の出力(b)誤差検出器4の出力(c)のセトリ
ングの様子を示す。主偏向器駆動アンプ2のセトリング
時間TAが一番長く数μsec〜数百μsecかかる事
はすでに記述した通りである。従来の描画システムでは
、サブフィールドから次のサブフィールドへ電子ビーム
を移動する時は、常にTAだけ待ち時間を作って、この
時間描画を休止していた。本発明では、高速の差動アン
プを使用して誤差検出器4を組み主偏向器駆動ア10の
セトリング時間内の誤差を副偏向系で補正する。副偏向
器駆動アンプ6はパターンを高速描画する為、高速のア
ンプが使われており、数10〜数100 psecオー
ダーでゆっくり変化する誤差検出器4の出力Cには充分
追従し、主偏向器駆動アンプ2のセトリング前の誤差を
完全に補正でき、しかも主偏向器駆動アンプ2の誤差を
補正しながら副偏向DAC5から入力されるパターン情
報もアンプの入力点で加算しているので、同時にパター
ンを描画する事が出来る。第3図(d)に副偏向DAC
5の出力信号、同図(e)に該副偏向DAC5の出力信
号dとセトリング誤差信号Cとを重畳した副偏向器駆動
アンプ6の出力の様子をそれぞれ示す。図かられかるよ
うに、副偏向器駆動アンプ6は、セトリング誤差を重畳
するため。
FIG. 3 shows the settling state of the output (a) of the main deflection DAC 1, the output (b) of the main deflector drive amplifier 2, and (c) the output of the error detector 4. As already described, the settling time TA of the main deflector drive amplifier 2 is the longest, ranging from several μsec to several hundred μsec. In conventional writing systems, when moving an electron beam from one subfield to the next, a waiting time of TA is always provided, and writing is paused for this time. In the present invention, the error detector 4 is assembled using a high-speed differential amplifier, and errors within the settling time of the main deflector drive unit 10 are corrected by the sub-deflection system. The sub-deflector drive amplifier 6 uses a high-speed amplifier in order to draw a pattern at high speed, and can sufficiently follow the output C of the error detector 4, which changes slowly on the order of several tens to hundreds of psec, and drive the main deflector. The error before settling of the drive amplifier 2 can be completely corrected, and while correcting the error of the main deflector drive amplifier 2, the pattern information input from the sub-deflection DAC 5 is also added at the input point of the amplifier, so the pattern information can be corrected at the same time. can be drawn. Figure 3(d) shows the sub-deflection DAC.
FIG. 5(e) shows the output signal of the sub-deflector drive amplifier 6 on which the output signal d of the sub-deflection DAC 5 and the settling error signal C are superimposed. As can be seen from the figure, the sub-deflector drive amplifier 6 superimposes settling errors.

実際に描画するエリアの倍、すなわち2サブフイ一ルド
分偏向できるダイナミックレンジが必要になる為コスト
が上昇するというデメリットがあるが。
However, it has the disadvantage of increasing costs because it requires a dynamic range that can deflect by two subfields, which is twice the area actually drawn.

描画の休止(待ち時間)時間を短縮できるメリットの方
がはるかに大きく、サブフィールド移動時の休止時間を
従来の1/10〜1/100程度に短縮し、トータルの
スループットを大幅に改善する事ができる。
The benefit of shortening the drawing pause (waiting time) time is much greater, reducing the pause time when moving subfields to about 1/10 to 1/100 of the conventional method, significantly improving the total throughput. I can do it.

尚2本発明において主偏向系に用いるDACは精度と安
定度さえよければ、各サブフィールドに対応した出力だ
けで良いので高速で低分解能のものを使う事ができ、こ
のようなりACを製作する事は可能である。しかし市販
の高速低分解能(10〜12bit程度)DACを使用
する場合その精度は、はとんどのものが±1/2LSB
位であり。
2. In the present invention, as long as the accuracy and stability of the DAC used in the main deflection system is good, only the output corresponding to each subfield is required, so a high-speed, low-resolution DAC can be used, and an AC like this can be manufactured. things are possible. However, when using a commercially available high-speed low-resolution (about 10 to 12 bits) DAC, the accuracy is usually ±1/2LSB.
It is the rank.

主偏向系で必要な位置精度を満足しない。そこで市販D
ACを使用する時は、各サブフィールド中心位置に対応
する目標出力と主偏向DAC2の出力間の誤差量をあら
かじめ測定して、メモリーにて 保存し−おき、各サブフィールドに電子ビームを振る際
、そのサブフィールドに対する誤差量をメモリーから読
み出し、補正用DAC8に減算して入力し、補正する事
により、高精度DACとして使用する事が出来る。この
ような使い方をすると1.5,8.のDACは、すべて
同じものを使用する事ができ設計、メンテナンスの上で
も大変有丁J 利に中る。
The main deflection system does not meet the required positional accuracy. Therefore, commercially available D
When using AC, measure the amount of error between the target output corresponding to the center position of each subfield and the output of the main deflection DAC 2 in advance, save it in memory, and use it when directing the electron beam to each subfield. , the error amount for that subfield is read from the memory, subtracted and inputted to the correction DAC 8, and corrected, thereby making it possible to use it as a high precision DAC. If you use it like this, 1.5, 8. All DACs can be used with the same type, which is very convenient in terms of design and maintenance.

(発明の効果) 以上の様に本発明によればセトリングタイムの   ”
長い主偏向系のセトリングタイム内に主偏向系駆動回路
の出力と目標値との誤差を求め、これに基き、セトリン
グタイムの短い副偏向系を同時に動作させる様にしたの
で次のサブフィールドの中心に荷電粒子ビームを移動す
る為のセトリングタイムを実質的に短かくすることがで
き、全フィールドの描画時間を飛躍的に短縮することが
できる。
(Effect of the invention) As described above, according to the present invention, the settling time is
The error between the output of the main deflection system drive circuit and the target value is determined within the long settling time of the main deflection system, and based on this, the sub deflection systems with short settling time are operated simultaneously, so that the center of the next subfield is The settling time for moving the charged particle beam can be substantially shortened, and the writing time for the entire field can be dramatically shortened.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す概略図。 第2図は本発明の一実施例を示す回路系のブロック図。 第3図は第2図の回路系に於ける各所の信号波形図であ
る。 (主要部分の符号の説明) 1−−−一生偏向DAC 5−一一一副偏向DAC 8−−−一補正用DAC 2−一一一主偏向器駆動アンプ 4−一一一誤差検出器 6、−−一副偏向器駆動アンプ 3−一一一主偏向器 7−一一一副偏向器 10−−−一生偏向系駆動田鉢 20−−−一副偏向系駆動161s 30−−−−偏向電子光学系
FIG. 1 is a schematic diagram showing an embodiment of the present invention. FIG. 2 is a block diagram of a circuit system showing an embodiment of the present invention. FIG. 3 is a diagram of signal waveforms at various locations in the circuit system of FIG. 2. (Explanation of symbols of main parts) 1---Lifetime deflection DAC 5-111 Sub-deflection DAC 8--1 Correction DAC 2-111 Main deflector drive amplifier 4-111 Error detector 6 , ---1 sub-deflector drive amplifier 3--11-1 main deflector 7-111 sub-deflector 10--Issue deflection system drive Tabachi 20--1 sub-deflection system drive 161s 30----- Polarized electron optical system

Claims (1)

【特許請求の範囲】[Claims] 主偏向系及び副偏向系を持つ荷電粒子偏向装置に於いて
主偏向駆動系の位置決め目標値と、主偏向駆動系の出力
値との誤差量を検出し、該誤差量を副偏向駆動系に帰還
して副偏向駆動系を主偏向駆動系と同時に動作する事を
特徴とする荷電粒子ビーム偏向回路。
In a charged particle deflection device having a main deflection system and a sub-deflection system, the amount of error between the positioning target value of the main deflection drive system and the output value of the main deflection drive system is detected, and the error amount is transferred to the sub-deflection drive system. A charged particle beam deflection circuit characterized in that a sub-deflection drive system operates simultaneously with a main deflection drive system upon feedback.
JP60055289A 1985-03-19 1985-03-19 Charged particle beam deflection circuit Expired - Lifetime JP2553032B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60055289A JP2553032B2 (en) 1985-03-19 1985-03-19 Charged particle beam deflection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60055289A JP2553032B2 (en) 1985-03-19 1985-03-19 Charged particle beam deflection circuit

Publications (2)

Publication Number Publication Date
JPS61214342A true JPS61214342A (en) 1986-09-24
JP2553032B2 JP2553032B2 (en) 1996-11-13

Family

ID=12994420

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60055289A Expired - Lifetime JP2553032B2 (en) 1985-03-19 1985-03-19 Charged particle beam deflection circuit

Country Status (1)

Country Link
JP (1) JP2553032B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6231118A (en) * 1985-08-01 1987-02-10 Fujitsu Ltd Electron beam exposure
KR20000076974A (en) * 1999-04-21 2000-12-26 히로시 오우라 Charged particle beam exposure apparatus with shortened beam deflection setting time and exposure method
JP2002093698A (en) * 2000-07-14 2002-03-29 Leo Elektronenmikroskopie Gmbh Method and system for electron-beam lithography
JP2010279702A (en) * 2010-06-16 2010-12-16 Mitsubishi Electric Corp Particle beam irradiation device
US8618970B2 (en) * 2012-04-13 2013-12-31 Advantest Corp. DA conversion device and electron beam exposure system using the same
US8658991B2 (en) 2009-06-03 2014-02-25 Mitsubishi Electric Corporation Particle beam irradiation apparatus utilized in medical field

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114425A (en) * 1981-12-28 1983-07-07 Fujitsu Ltd Electron beam exposure device
JPS58154230A (en) * 1982-03-10 1983-09-13 Jeol Ltd Method of electron beam exposure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114425A (en) * 1981-12-28 1983-07-07 Fujitsu Ltd Electron beam exposure device
JPS58154230A (en) * 1982-03-10 1983-09-13 Jeol Ltd Method of electron beam exposure

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6231118A (en) * 1985-08-01 1987-02-10 Fujitsu Ltd Electron beam exposure
KR20000076974A (en) * 1999-04-21 2000-12-26 히로시 오우라 Charged particle beam exposure apparatus with shortened beam deflection setting time and exposure method
JP2002093698A (en) * 2000-07-14 2002-03-29 Leo Elektronenmikroskopie Gmbh Method and system for electron-beam lithography
US8658991B2 (en) 2009-06-03 2014-02-25 Mitsubishi Electric Corporation Particle beam irradiation apparatus utilized in medical field
JP2010279702A (en) * 2010-06-16 2010-12-16 Mitsubishi Electric Corp Particle beam irradiation device
US8618970B2 (en) * 2012-04-13 2013-12-31 Advantest Corp. DA conversion device and electron beam exposure system using the same

Also Published As

Publication number Publication date
JP2553032B2 (en) 1996-11-13

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