JPS61205989U - - Google Patents
Info
- Publication number
- JPS61205989U JPS61205989U JP9017885U JP9017885U JPS61205989U JP S61205989 U JPS61205989 U JP S61205989U JP 9017885 U JP9017885 U JP 9017885U JP 9017885 U JP9017885 U JP 9017885U JP S61205989 U JPS61205989 U JP S61205989U
- Authority
- JP
- Japan
- Prior art keywords
- heat
- shrinkable tube
- lid
- storage device
- covered
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims 5
- 238000000034 method Methods 0.000 description 1
Landscapes
- Packaging Of Machine Parts And Wound Products (AREA)
- Packages (AREA)
- Packaging Frangible Articles (AREA)
Description
第1図a〜cは本考案の収納装置の収納工程を
示す斜視図、第2図はトレイの実施例を示す斜視
図、第3図は従来の収納装置の実施例を示す斜視
図、第4図はその断面図である。
1……チツプトレイ、2……蓋、3……押え枠
、4……蓋、4a……凹部、4b……表示、5…
…第一熱収縮チユーブ、6……第二熱収縮チユー
ブ、10……積み重ね体。
1A to 1C are perspective views showing the storage process of the storage device of the present invention, FIG. 2 is a perspective view showing an embodiment of the tray, and FIG. 3 is a perspective view showing an embodiment of the conventional storage device. Figure 4 is a sectional view thereof. 1... Chip tray, 2... Lid, 3... Presser frame, 4... Lid, 4a... Recess, 4b... Display, 5...
...First heat-shrinkable tube, 6...Second heat-shrinkable tube, 10...Stacked body.
Claims (1)
に複数個形成されたチツプトレイの複数枚を、上
記上面が覆われるように積み重ね、該積み重ね状
態のチツプトレイの最上面を蓋で覆つた半導体チ
ツプの収納装置において、 上記蓋の上面にカツタ切り込み用の凹部を形成
すると共にそのカツトを指示する表示を行い、少
なくとも上記蓋及び全チツプトレイの特定の周囲
の全面を透明の第一熱収縮チユーブで密着被覆し
、且つ少なくとも上記周囲以外の残された面を含
む周囲の全面を透明の第二熱収縮チユーブで密着
被覆して成ることを特徴とする半導体チツプの収
納装置。 (2) 上記第一熱収縮チユーブと第二熱収縮チユ
ーブとが相互にほぼ90度を成すようにした実用
新案登録請求の範囲第1項記載の半導体チツプの
収納装置。[Claims for Utility Model Registration] (1) A plurality of chip trays each having a plurality of holes formed on the upper surface for individually storing semiconductor chips are stacked so that the upper surface is covered, and the top of the stacked chip trays is In a storage device for semiconductor chips whose upper surface is covered with a lid, a recess for cutting a cutter is formed on the upper surface of the lid, and a display indicating the cutting is provided, and at least the entire surface of the lid and a specific periphery of all the chip trays is transparent. A storage device for semiconductor chips, characterized in that the semiconductor chip is tightly covered with a first heat-shrinkable tube, and the entire surrounding area, including at least the remaining surface other than the above-mentioned periphery, is tightly covered with a second transparent heat-shrinkable tube. . (2) The semiconductor chip storage device according to claim 1, wherein the first heat-shrinkable tube and the second heat-shrinkable tube form an angle of about 90 degrees to each other.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9017885U JPH0245194Y2 (en) | 1985-06-17 | 1985-06-17 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9017885U JPH0245194Y2 (en) | 1985-06-17 | 1985-06-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61205989U true JPS61205989U (en) | 1986-12-26 |
JPH0245194Y2 JPH0245194Y2 (en) | 1990-11-29 |
Family
ID=30644942
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9017885U Expired JPH0245194Y2 (en) | 1985-06-17 | 1985-06-17 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0245194Y2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012056579A (en) * | 2010-09-06 | 2012-03-22 | Tokuyama Corp | Package for polysilicon |
JP2015030511A (en) * | 2013-08-02 | 2015-02-16 | 株式会社フジシールインターナショナル | Package |
-
1985
- 1985-06-17 JP JP9017885U patent/JPH0245194Y2/ja not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012056579A (en) * | 2010-09-06 | 2012-03-22 | Tokuyama Corp | Package for polysilicon |
JP2015030511A (en) * | 2013-08-02 | 2015-02-16 | 株式会社フジシールインターナショナル | Package |
Also Published As
Publication number | Publication date |
---|---|
JPH0245194Y2 (en) | 1990-11-29 |
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