JPS61198869A - Picture image communication equipment - Google Patents

Abstract

PURPOSE:To attain efficient missing data retransmission even with a delay on a line by providing a means returning code information corresponding to area information to a transmission side and requesting the retransmission of the area information and a means setting variably the criterion for retransmission request so as to set permissible retransmission request. CONSTITUTION:Since a line number is added after the 'EOL' (line end code) by the modified Huffman code or the modified read code, the condition for retransmission request is set optionally by a reception side. When an error takes place only at one line at the reception side, for example, it is discriminated as the excellent reception and the retransmission request is applied after a consecutive error of >=2 lines takes place. In applying the retransmission request above, for example, a line number is sent at each line from the transmission side and the reception side changes the algorithm for discrimination of received picture defect. In applying the change in various conditions as above, the consecutive permissible error line is set optionally.

Description

Detailed Description of the Invention [Technical Field] The present invention relates to an image communication device that divides image information into a plurality of area information and transmits the divided information.

More specifically, the present invention relates to an image communication device configured to efficiently perform retransmission correction of single-picture information.

(Hereinafter, blank spaces) [Prior Art] A facsimile machine will be taken up as an example of this type of image communication device, and the prior art will be explained in detail according to the items shown below.

! tl Explanation of HDLC Frame Structure (Using Figure 1) 62 Specific Example of Error Retransmission Using HDLC Frame Structure C (Using Figure 2)! 3a Problems caused by error retransmission using HDLC frame structure 931 Effect on line error 932 Effect of bit position where error occurs (PA3
(for A3) 53.3 Based on the propagation delay characteristics of the communication line (Shadow 1)
(Use Figure 4) 53.4 Difficulty in encoding 94 Lack of conventionally known error retransmission methods 54.1 Regarding fallback FI4.2 Regarding processing when reception of training signal fails (Used in Figures 5 to 7) 94.3 Processing when EOL cannot be detected 944 Processing when image signal transmission has ended 94.5 Processing after sending an instruction signal such as a retransmission start line etc. 94, e 'fA retransmission mode selection i
Description of HDLC Frame Structure When data is transmitted via a communication line such as a telephone line, there is a certain probability that errors will occur in the data due to instantaneous interruptions, noise, distortion, etc. of the communication line. In order to detect errors in this data, predetermined calculations, etc. are performed on the received data, and it is determined whether certain rules are maintained6.Then, if an error is detected, , a method is adopted in which a group of information data containing erroneous data is sent out again according to a predetermined transmission control procedure.

This automatic retransmission request method (ARQ)
repeat request) is a method used when performing half-duplex transmission using a telephone line, etc., and is a high-level data link control procedure ()IDLc:high
1 level data 1 ink control
It is carried out according to the following procedure. This HDLC
is a data terminal equipment (D
TE) is a bit-transparent cyclic transmission control procedure that enables highly efficient data transmission between each other and can transmit any bit string without depending on any coding system.

In the HOLC procedure, arbitrary bit string information and link control information are transmitted using a frame, which is a transfer unit. The start and end of a frame are flag sequences (01
111110).

Figure 1 shows the frame format of the DLC procedure.The flag sequence shown in Figure 4 is a signal for frame synchronization, and frame synchronization is achieved by transmitting and receiving one or more flag sequences. When the same bit string as the flag sequence appears in the information to be transferred, the receiving side considers it to be the end of the frame.To prevent this, five consecutive PID Is appear in the information of the frame.
When pattern II appears, the transmitting side forcibly inserts one bit “O゛” immediately after it and transmits it, and the receiving side receives it following the pattern of five consecutive bits “1°”. Transparency of transferred data is guaranteed by using a method of removing one bit "0'° (zero bit insertion method).

The address field contains the address assigned to the station transmitting and receiving the frame in binary code (for example, +11111
The frame indicated by 11) having the address of the station on the receiving side is a command frame, and the frame having the address of the station on the transmitting side is a response frame.

If the frame is a command, the control field indicates an instruction to the other station, and if the frame is a response, it indicates a response to the command in the command frame.

Frame check sequence (FC5: fratse)
Checking 5 sequence) is an 18-bit sequence for detecting frame transmission errors, and indicates the result of calculation using the generator polynomial X'' + .

The length of the information field is arbitrary (eg, 512 bytes or 512 x 8 bits).

+32 Specific example of error retransmission using HDLC frame Wi configuration FIG. 2 shows a specific example of error retransmission using the HDLC frame data shown in FIG.

That is, when the receiving side receives a certain frame, if no error has occurred, it sends out an ACK signal, and if an error has occurred, it sends out a NACK signal.

On the other hand, on the transmitting side, in response to the ACK signal detected during frame N transmission, frame N+1 is transmitted after frame N is transmitted.

On the other hand, if a NACK signal is detected while transmitting a certain frame N, or if an ACK signal cannot be detected, frame N-1 is retransmitted after transmitting frame N, and for the same frame, When a NACK signal is detected a predetermined number of times or more, or when no ACK signal is detected at all.

Control is performed to perform fallback (fat 1back).

In this way, when framed data is sent from the transmitting side and received by the receiving side, no error occurs on the receiving side regarding frame N, but an error occurs when receiving frame N+1, as shown in Figure 2. If this occurs, the following control is performed. That is, the receiving side sends an ACK signal after receiving frame N, and
After receiving +1, it sends out a NACK signal.

On the other hand, on the transmitting side, A
Since the CK signal will be received, frame N+2 will be sent after frame N+1 is sent.Furthermore, the sending side will receive the NACK signal while frame N+2 is being sent, so it will be sent again after frame N+2 is sent. Frame N+1 is sent.

After transmitting the NACK signal for frame N+1, the receiving side transmits the ACK signal after receiving frame N+2, regardless of whether an error occurs in frame N+2. Thus, the receiving side enters a state of waiting for reception of frame N+1. Then, if no error occurs in retransmitted frame N+1 that is sent following frame N+2, the receiving side performs AC control after receiving retransmitted frame N+1.
Send K signal.

On the other hand, the transmitting side receives ACK while sending retransmission frame N+1.
Since the signal will be received, frame N+2 is transmitted again after retransmitting frame N+1, and frame N+3 is transmitted after frame N+2 is transmitted in response to the ACK signal received while frame N+2 is being transmitted. I do.

! )a Problems caused by performing error retransmission using HDLC frames Image communication devices using the conventionally known retransmission correction method ARQ adopt the HDLC frame structure as described above, so they mainly have the following problems. There were some problems to mention.

93.1 Effect on line errors) IDIJ
:Since the signal to be transmitted is divided into blocks using frames, the receiving side can determine whether a) no errors have occurred in that block, or b) whether one or more bits of errors have occurred. can be judged. Therefore, on the receiving side, it is possible to reproduce a good image without even a single bit error.

However, when a reception error occurs for a certain block, it is not possible to determine the extent of the error. (In other words, it is not possible to specify from the 1st bit to the xth via h (x varies depending on the block size and image information)). .

Therefore, under conditions such as Japan where the line condition is good, H[l
LC: Although it is effective to block signals using frames (that is, when the line conditions are good, it is possible to reproduce an image without even a single bit error on the receiver side), but if the line condition is In the worst case, there is a high probability that several bits included in the HDLC frame will be received errors.

For this reason, there was a drawback that the number of retransmissions increased.

93.2 Regarding the influence of the bit position where an error occurs Since the signal to be transmitted is divided into blocks using HDLC frames, it is necessary to retransmit from the beginning of the block even if an error occurs at any bit position of the block. There is. For example, as shown in FIG. 3, even if an error occurs in the data in the portion (a), it is necessary to retransmit the data starting from the beginning of the block, that is, the data in (b). For this reason, there is a drawback that transmission efficiency cannot be improved.

53.3 Effects Based on Propagation Delay Characteristics of Communication Lines On the transmitting side, during the transmission period of a certain frame N, it is determined whether or not the previously transmitted frame N-1 was correctly received by the receiving side. However, even in this case, a situation may arise in which the AGK signal cannot be received due to the delay time inherent in the line. A specific example will be explained with reference to FIG. Now, assuming that the time required to transmit one block of data is Tf, and the delay time that occurs when transmitting a signal from the transmitting side to the receiving side is Td, it is necessary that Tf>27d. In this way, there is a drawback that the permissible delay time on the line is defined depending on the block size. Therefore, in order to allow a longer delay time on the line, a method of increasing the block size can be considered. However, when the block size is increased, the drawbacks mentioned in section 193.2 "Influence of bit position where error occurs" become more apparent.

93.4 Difficulty in encoding A drawback was that the new design required additional time to create the encoding.

54 Disadvantages of conventionally known error retransmission methods 54.1
Regarding fall packs, conventional error retransmission systems are configured to issue a retransmission request when a reception error occurs in a receiving device. Furthermore, if an error retransmission is performed a certain number of times (for example, three times) or more during transmission of a certain document, faller 2 (reducing the transmission speed) is performed.

Therefore, even if there is no change in the state (characteristics) of the line and reception is possible at a predetermined transmission speed (for example, 4800 bits/5ea), if impulsive noise is superimposed on the line (for example, If impulse noise occurs three times while transmitting one document, fall pack will occur.

Similarly, if reception is not possible at the specified transmission speed even though the line is in a steady state, erroneous retransmissions occur three times in a row.
When this occurs twice, a fall pack is performed.

In the latter case, fallback is a reasonable fallback because there is a possibility of eliminating reception errors. However, in the former case, even if fallback is performed, an error will occur again on the receiving side due to impulsive noise. Therefore, it is wasteful to perform a fallback in the former case.

As described above, the conventional error retransmission system has the disadvantage that useless fallbacks are performed and the transmission time is unnecessarily long.

64.2) Processing when training signal reception fails In conventionally known image communication systems, when training signal reception fails, an error immediately occurs on the receiving side, while the transmitting side receives only one image. The configuration was such that an error would occur after the transmission of the original was completed. In this way, even though image transmission is not being performed, the line remains occupied until the transmission of one original document is completed, resulting in a major drawback in that charges are wasted.

FIG. 5 shows an example of the operation when the receiving device fails to receive the training signal in the conventional error retransmission method.

Here, NSF is non-standard equipment, C5■ is the called station identification, DIS is a digital identification signal, NSS is a non-standard device setting, TSI is transmitting terminal identification, DOS is a digital command signal, TCF is a training check. CFR confirms reception preparation, EOP has completed the procedure, DCN is a disconnection order.

(see CIjTT Recommendation T, 30).

The waveform diagrams shown in FIGS. 6(1) to 6(3) show the state when the receiving side device receives the training signal and succeeds in receiving the training signal.

In this figure, (1) indicates a signal on the line. This figure (B) shows the presence/absence of a signal (SED), which indicates whether or not there is a signal on the line.
) indicates a high level when a signal presence state is detected.Figure (C) indicates whether or not valid data transmitted at a predetermined transmission speed has been detected. ), and exhibits a high level when valid data is detected at a predetermined transmission speed.

As is clear from these Figures 6 (+) to (3), SED
is at a high level and CD is at a low level (Tr
), the training signal is being received (Tr=1158m at 2400bit/S)
S.

When 48QOb i t/S, Tr=923 position S).

The flowchart shown in FIG. 7 shows a control procedure for receiving a training signal/image signal in a conventional device.

Here, step 5100O represents receiving the training signal/image signal.

In step 51002, a timer 2 for determining that the reception of the training signal has failed is set to 10 seconds.

In step 51004, 5E continues for 20 milliseconds while determining whether T2 times out.
It is detected whether it is D-1 or not. At this time, timer T2
If it times out, proceed to step 51012, and if it is 5ED-1 continuously for 20 milliseconds (ie, when the beginning of the training signal is received), proceed to step 2 5100B.

In step 5IQO8, while determining whether or not timer T2 times out, a millisecond (24QOb
It is determined whether or not it is CD-Q continuously for 700 milliseconds in the case of /S and 500 milliseconds in the case of 4800b/S. At this time, if the timer T2 times out, the process proceeds to step 51012, and if CD=0-r continues for a milliseconds (that is, when a training signal is received), the process proceeds to step 5100B.

In step 5100B, while determining whether timer T2 times out, it is determined whether or not it is CD-1 continuously for 20 milliseconds. At this time, if the timer 〒2 times out, the process proceeds to step 51012, and if the CD-1 continues for 20 milliseconds (that is, when the beginning of the image signal is received), step 5
Proceed to IOIO.

Step 5toto represents receiving the image signal.

Step 51012 represents a reception error.

As shown in Fig. 7, when the training signal reception fails (that is, when the SED and CD do not operate correctly), the system starts for about 10 seconds after entering the training signal/image signal reception mode. A drawback was that the process ended with an error.

fj4.3 Processing when EOL cannot be detected In conventional facsimile machines, when the training signal is successfully received and the image signal reception mode is entered, if the EOL (End of Line) signal cannot be received for 5 seconds or more, , it was immediately marked as an error. This also applies when error retransmission mode is used.

In this way, if the demodulated data is not correctly demodulated even though the training signal has been successfully received, it is immediately recognized as an error, so there is a drawback that error retransmissions are not effectively utilized.

94.4 Processing when transmission of image signals is completed In conventional facsimile machines, when transmission of image signals is completed, a procedure signal is immediately transmitted, so if the receiving device makes an error in the last block, an error occurs. The drawback was that retransmission was not possible.

94.5 Processing after sending an instruction signal such as a retransmission start line In conventional facsimile machines, when the receiving side detects an error, it sends a NACK signal, and then sends an instruction signal such as a retransmission start line. Next, the receiving device was on its way to receive the image signal sent from the transmitting device (that is, the image signal from the designated retransmission phase start line).

However, if the transmitting side cannot correctly receive an instruction signal such as a retransmission start line sent from the receiving side, an error may occur.

94.6 Regarding the selection of the error retransmission mode, in general, the error retransmission mode has the advantage of being able to reliably transmit image information, but it also takes more time than normal transmission when there are no errors. There is the inconvenience of putting it away. Therefore, it is desirable to leave it to the operator's choice whether or not to perform transmission in error retransmission mode.

However, conventional facsimile machines have a drawback in that the error retransmission mode cannot be arbitrarily selected by the operator.

(Hereinafter, blank spaces) [Object] In view of the above-mentioned points, a first object of the present invention is to provide an image communication device configured to retransmit error image data efficiently and accurately.

A second object of the present invention is to solve various problems caused by image transmission according to the HDLC frame format, by making a judgment sufficient to recognize that a reception error has occurred on the receiving side. An object of the present invention is to provide an image communication device configured so that a reference can be arbitrarily changed.

In order to achieve such an object, in one aspect of the present invention, in an image communication device that transmits and receives image information divided into a plurality of area information, when it is determined that the area information has been received in error, the area information is The apparatus includes means for requesting retransmission of the area information by returning corresponding code information to the transmitting side, and means for variably setting determination criteria for requesting retransmission of the area information.

〔Example〕

A facsimile machine will be described as an example to which the present invention is applied.

First, an outline of this embodiment will be described.

(1) When transmitting image information (on the transmitting side), an encoded line number is attached to each line and transmitted together with the image information. Then, data subsequent to the code corresponding to a certain line number can be retransmitted.

On the receiver side, the line number is checked while image information is being received, thereby determining whether there is a reception error. When the data is received correctly, the line number is removed and the data is decoded.On the other hand, when the receiver side recognizes that a reception error has occurred, the receiving side device sends a control signal and displays the image of the sending side device. Interrupt information transmission. Thereafter, the receiving device notifies the transmitting device of the retransmission request start line number. As a result, the transmitting device resumes transmission from the retransmission request starting line number.

(11) When transmitting image information, the line number inserted for each line has the following characteristics.

b) The line number is incremented line by line.

口）The line number is a signal indicating the end of the code of one line, for example, “EOL” (End of Line).
, used when performing Modified Huffman encoding or Modified Read encoding based on CCrTT Recommendation 4). This allows the receiving device to distinguish between the image information and the line number.

C) The length of the line number is constant.

Therefore, a line number representing a small number and a line number representing a large number have the same code length.

As a result, the receiving device can recognize that the predetermined byte of the signal representing the end of the code of the line (1) is the line number. In this way, the image information and line number can be easily identified on the receiving side.

2) Line numbers are signals with special meanings, e.g.
(2) A signal indicating the end of a line, and a signal having a different code structure. Therefore, when an error occurs on the receiving side, it is possible to search again for a signal with special meaning (representing the end of one line) and establish line synchronization in response to the detection of this signal.

The facsimile apparatus according to this embodiment will be described in detail below in accordance with the following items.

91 Example of error retransmission procedure (Used in Figure 8) 92 Explanation of line numbers (Used in Figure 9) 93 Specific example of storing encoded data in FIFO memory (Used in Figure 1O) 64 FIFO memory and FIFO memory Explanation of the pointer that controls 95 Configuration for selecting the error retransmission mode from the sending device (used in FIGS. 11 and 12) 96 Management of FIFO memory in the sending device (used in FIGS. 13 to 15) 97 Adequacy of memory capacity for storing retransmission start address 98 Control after all image information is sent from the transmitting device 99 Conditions for making a retransmission request and conditions for making a fall pack request from the receiving device (use Figure 16) 910 NSF Signal configuration (using Figure 17) 611
Operation of the transmitting side device when receiving the NACK@ signal (used in Figure 18) fi12 Explanation of the block diagram of the transmitting side device (used in Figures 19 and 20) 1i+13 Schematic explanation of the operation of the control circuit in the transmitting side device ( (Used in Figure 21) iJ14 Detailed operation explanation of the control circuit in the transmitting side device (Used in Figures 22 and @23) 615 Block configuration of the receiving side device (Used in Figure 24) 9
16 Explanation of operation of control circuit in receiving side device (25th
(Use Figure and Figure 26)! 51? Other Examples (hereinafter referred to as blank space) 91 An example of the error retransmission procedure (Figure 8 used) When the mode is selected to perform image transmission in the error retransmission mode (that is, if the start button is pressed consecutively on the sending device) 8) (when the button is pressed for 2.5 seconds or more, or when the error retransmission mode is selected by a switch or the like in the transmitting device) will be explained with reference to FIG.

In FIG. 8, a case is considered in which impulse noise occurs once while image information is being transmitted, and as a result, errors occur in three or more lines in the receiving device. When such an error occurs, the receiving device issues a NACK.
signal (PIS signal in this example; Procedure
Interrupt Signal (procedure interrupt signal) is sent. By detecting this PIS signal, the transmitting side device interrupts the transmission of image information.

The receiving device transmits information such as retransmission start line/fall pack to the transmitting device following the PIS signal.
A V21 modulated NSF signal is used. In this example, NS
The F signal notifies the sending device of the last correctly received line number.

Based on such a signal, the transmitting device retransmits the image information from the line next to the line specified by the receiving device. At this time, if there is a fall pack instruction, the transmitting device performs fall pack. In addition, if fall pack cannot be performed any further than the current time (i.e., if image transmission is currently being performed at 2400 b/s and three erroneous retransmissions have been performed), an error will occur and the line will be disconnected (
DON).

Note that the abbreviations such as NSF/CSI/DIS shown in FIG. 8 are as described above with respect to FIG. 5.

U2 Explanation of line numbers (Figure 8 used) Figure 9 is as follows:
FIG. 3 is a bit configuration diagram showing a specific example of a line number. This line number is inserted after the EOL (end of line code).

Note that in this embodiment, a modified Huffman code is used as the encoding method.

The line number is unified to the line termination code EOL (2 bytes (18 bits)), and the line number is the LSB (Least Significant) of the high byte in the line number so that it can be distinguished from the EOLi code.
nt Bit) and line number low byte L1
2 are each fixed to 1. When decoded by the receiving device, the number of bits per line is 1728 bits (A4
size), the EOL search is executed again and line synchronization is established. For this reason, the line number needs to be a different signal from EOL.

For example, line number 〇 is OIH (line number high byte), OIH (line number low byte),
Line number 1 is OIH (line number high byte) OIH (line number low byte), line number 2 is 01H (line number byte) 05
H (line number low bite), line number 3
is 01H (line number high byte) 07H (line number low byte), line number lO is 01
H (line number high byte) 15H (line number low byte), line number 100 is 01H
(Line number high byte 1-) C9H (Line number low byte) These line numbers are:
It is specified to be incremented every three lines.

93 Specific example of storing encoded data in FIFO memory (Used in Figure 10) Figure 1O illustrates a state in which encoded data and retransmission start addresses corresponding to each line number are stored in memory. be. In this figure, TFIFS is the memory area from 8400H to AFFFH, which is the start address of the memory for storing encoded data (in this embodiment, 8400H), as a memory area for storing encoded data in the sending device. think. In addition, as a memory area for storing the retransmission start address, for example, COO
Consider from OH to G3FFH.

Now, as the conditions for the sending device, when the minimum transmission time is 10 m See when one line is a blank space, the minimum transmission time is 20 m See when one line has black, and the transmission speed is 4800 b/s, A4 The procedure for transmitting a size original (all white) will be explained based on FIG. 1O. At this time, the minimum number of bytes for the l line is six. Also, when sending byte data stored in memory, LS
It is assumed that the data is sent from D.

For example, when transmitting data at address 8401) 1, first 7 bits of 0 information are transmitted, and then 1 information is transmitted.

In FIG. 10, an IEOL is formed by data stored at addresses 8400H and 8401H (1
1 information is sent after 5 consecutive 0 information).

High byte data of the line number is stored at address 8402H, and low byte data of the line number is stored at address 8403H. Address 8402H.

The data stored in 8403H is OIH, 01)
1, representing line number 〇.

Addresses 8404H to 8408H store modified Huffman encoded data when 1728 bits are all white. In other words, the modified Huffman encoded data when the margin is 1728 bits is ot oot ott oot ot
ox (when data is sent to the line in order starting from the left side)
Here, 010011011 is a make-up code when the white run length is 1728 bits, and 00110101 is a terminating code when the white run length is θ bits. When this 1728-bit all-white modified Huffman encoded data is stored in memory, 82H, 59H, 0
1) Becomes 1.

When data is sent to the line, it starts with the LSB data of B2O, the MSH data, and 1 of 59H. SR data to MSH data, OIH LSB data to MSB
The data will be sent in the following order. i.e. 0100110
1 (82H data) 10011010 (59H data) + 0000000 (OIH data) (
If the data is sent out to the line in order starting from the left side) the data is sent out to the line. Thereafter, similarly, the encoded data is stored in the memory of the sending device.

On the other hand, a retransmission start address of 1 is stored in the memory in correspondence with each line number. The memory area in which the retransmission start address is stored is from address cooon to address C3FFH. The start address of the memory area where the retransmission start address is stored is called LINO. Two bytes of memory area are required to specify one retransmission start address. Since the memory area from address COOOH to address C3FFH is 1024 bytes, it is possible to store 512 (II) as the retransmission start address.Also, as mentioned above, the line number is incremented every l line. ,
When the line number changes (that is, it is incremented by l), the start address of the line number of the memory where encoded data is stored is stored in the memory that stores the retransmission start address. A specific example thereof is shown in Fig. 1θ.

Address 0000H, Ic0OIH has OOH, 84
H is stored. The data stored at address COOOH is the low data at the retransmission start address of line number 〇, and the data stored at address C00IH is the high data at the retransmission start address of line number 〇, where line number 〇 is stored. The start address (with respect to the memory where encoded data is stored) is 8400H.

Also, addresses COO2H and COO3H are 07H and 8.
4H is stored. The data stored at address COO2H is the low data at the retransmission start address of line number l, and the data stored at address C003H is the high data at the retransmission start address of line number 1. The start address (with respect to the memory where encoded data is stored) is 8407H. Similarly, line number 2° line number 3. line number 4
The starting address where is stored (with respect to the memory where encoded data is stored) is 840EH, 84
15H.

It is 841CH.

Furthermore, as described above, since the memory area for storing the retransmission start address is 1024 bytes, 512 retransmission start line numbers can be stored. 5
The 13th line number is LINO (address C
OOOH). In this way, 512 past line numbers are stored.

! 54 Description of FIFO memory and pointer controlling FIFO memory In the transmitting side device, the data encoded according to this embodiment is
ut) stored in memory. The capacity of the FIFO memory is from <8400H to AFFFH as described above.

Here, the starting address of the FIFO memory of the sending device is TFI FS (TRN FIFO5TART; 8400H in this embodiment).

The high byte at the start address of the FIFO memory of the sending device is TPIFSH (TRI FIFO5TART
HIGHi (84H in this embodiment), the final address in the FIFO memory of the sending device is TFIFE (
TRI FIFOEND, AFF in this example
FH), the high byte at the final address of the sending device's FIFO memory is TFIFEH (TRNFIFOEM
D HIGH (in this embodiment, it is called AFH).

In the sending device, the data read by the reading means is encoded and then stored in the FIFO memory of the sending device, and a pointer is used to control the FIFO memory. The pointer used for this is TMHPTR (TRN MHPOINTER)
The data stored in the FIFO memory on the transmitter side is modulated by a modulator and then sequentially transmitted to the line, but a pointer is also required here to control the FIFO memory. The pointer used for this purpose is called TMDPTR (OOEM POINTER in TRN).

On the other hand, the receiving device stores the data sent from the transmitting device in its memory. Similar to the sending device, this memory is a FIFO (First-InFirst-
Out) memory. The FIFO memory capacity of the receiving side device is also the same as that of the sending side device, from 8400H to AFF.
Up to FH.

Here, the first address in the FIFO memory of the receiving side device is RFIFJ (RECFIFO5TARTi in this example, 8400)1), and the high byte of the first address in the FIFO memory of the receiving side device is RFIFSH
(RE(: FIFO8TART HIGH; 84H in this embodiment), the final address in the FIFO memory of the receiving device is RFIFE(RUG jrFo E
ND; AFFFH in this embodiment), and the high byte of the final address in the FIFO memory of the receiving device is called RFIFEH (RHOFIFOEND old GH: AF in this embodiment) I).

In the receiving device, the data sent from the transmitting device is demodulated by a demodulator, and then stored in a FIFO memory. A pointer is used when storing demodulated data in FIFO memory, but this pointer is
It is called TR (REG MODEM POINTER).
Furthermore, the data stored in the FIFO memory is sequentially read, decoded, and recorded. A pointer is also used when sequentially reading and decoding the data stored in the FIFO memory.
EG MHPOINTER).

95 Configuration for Selecting Error Retransmission Mode from Sending Device (Used in FIGS. 11 and 12) Two methods are used to select the error retransmission mode from the sending device. The first method is to select an error retransmission mode using a switch or the like. That is, it is assumed that the error retransmission mode is selected when a certain specific switch is in the on state.

A second way to select the error retransmission mode is to press the start button on the sending device successively. That is, the error retransmission mode is selected by continuously pressing the start button for 2.5 seconds or more, and the operator knows that the error retransmission mode has been selected by the generation of a "beep" sound.

Also, if you press the start button on the sending device for more than 5 seconds continuously, G2 mode will be selected and the "beep" will be heard.
The operator will know that the G2 mode has been selected by the beep sound.

In this embodiment, image transmission in the error retransmission mode is performed at a transmission speed of 4800b/s. Therefore, when the error retransmission mode is selected by the transmitting device, the receiving device is equipped with the error retransmission mode function. If so, transmission is performed in error retransmission mode. However, if the receiving device is not equipped with error retransmission mode,
Transmission speed is 4800b/s instead of 9600b/s
and start transmission.

FIG. 11 is a block diagram showing the configuration of the transmitting side of the facsimile machine according to this embodiment. In this figure, 67 is a network control unit (NCU), which connects to the terminal of the line to use the telephone network for data communication, controls the connection of the telephone exchange network, and switches to the data communication path. 87a is a telephone line.

68 is a hybrid circuit that separates a transmission system signal and a reception system signal. Signal line? The transmission signal on la is transmitted to telephone line 87 via signal lines 67 and b and network control unit 67.
sent to a. Further, signals sent from the other party's facsimile device are sent to the signal line 88 via the network control unit B7.
sent to a.

G9 is a binary signal sending circuit, which inputs the data on the signal line 78a when a pulse is generated on the signal line 7Bb, and outputs the V21 modulated data to the signal line 89a.

70 is a tonal signal sending circuit, and a signal line? When the data on Bd is at signal level rlJ, the signal on signal line 78c is input. If the input data is "1", then 48
2Hz tonal signal, "2" to 1080Hz tonal signal, "3" to 1850Hz tonal signal, "4" to 850Hz tonal signal, "5" to 2100Hz tonal signal. signal line 7
Output to 0a.

71 is an adder circuit, which combines the signal on the signal line 89a and the signal 1i.
70a and the added result is sent to the signal line 71a.
Output to.

72 is a tonal signal detection circuit, and when the signal of the signal line 88a is input and a signal of 4E12Hz is detected, the signal line ? 2a, and when a 1080Hz signal is detected, a "2" signal is sent to signal line 72a.

When a 1850Hz signal is detected, a signal of "3" is sent to the signal line 72a, and when a 1850Hz signal is detected, a signal of "3" is sent to the signal line 72a. When a signal of 2100 Hz is detected, a signal of "5" is output to the signal line 72a.

A binary signal detection circuit 73 generates a pulse on a signal line 73a when a binary signal is detected, and outputs demodulated binary data to a signal line 73b.

74 is a start button, and when this start button is pressed, the signal line ? A signal of signal level rlJ of 4a is output.

Reference numeral 75 denotes an error retransmission mode selection switch, which outputs a signal of signal level "1" to the signal line 75a when transmission in the error retransmission mode is selected.

7B is a control circuit.

77 is a mode change notification sound generation circuit, and a signal line 78e
When a pulse is generated, a "beep" sound is generated.

FIG. 12 is a flowchart showing the control procedure of the control circuit 76 shown in FIG.

In step 51014, it is determined whether the start button 74 has been pressed. Is this a signal line? 4a
This is determined by inputting the signal.

When the start button 74 is pressed, step 5IQ1
Proceed to B.

In step 5tolB, it is determined whether the start button 74 has been pressed continuously for 2.5 seconds or more.

This is determined by inputting the signal on the signal line 74a. If the start button 74 is continuously pressed for 2.5 seconds or more, the process proceeds to step 91028, and if the start button 74 is not continuously pressed for 2.5 seconds or more, the process proceeds to step 5O1e.

In step 31018, it is determined whether the error retransmission mode is selected. This is signal 1175
This is determined by inputting the signal a. Then, when the error retransmission mode is selected, step 51
On the other hand, if the error retransmission mode is not selected, the process proceeds to step 51020.

Step 5102G indicates transmission of image information by 9800b/S.

In step 51022, it is determined whether the other party's facsimile device (receiving device) has an error retransmission function. Information indicating whether the receiving side device has an error retransmission function is communicated to the transmitting side by the FIF of the NSF signal. That is, by inputting the signals on the signal lines 73a and 73b, it is determined whether or not the receiving side device has an error retransmission function. If the receiving device has an error retransmission function, the process proceeds to step 5102B; on the other hand, if the receiving device does not have an error retransmission function, the process proceeds to step 51024.

In step 91024, image information in 4800b/S is transmitted.

In step 8102B, image information is transmitted in error retransmission mode.

In step 91028, a "bleep" sound is generated (a pulse is sent to the signal line ?fle) to inform the operator that the error retransmission mode is selected.

In step S1030, it is subsequently determined whether the start button 74 has been pressed continuously for 2.5 seconds or more. Is this a signal line? This is determined by inputting the signal 4a. If the start button is continuously pressed for 2.5 seconds or more, step 51032
On the other hand, press the start button twice in succession.
．． If the button is not pressed for 5 seconds or more, the process advances to step 51022.

In step 51032, a "beep" sound is generated (pulse is sent twice to signal line 78e) to inform the operator that the G2 mode is selected.

In step 51034, transmission in G2 mode is performed in line 9.
B FIFO memory management in the sending device (@13
(Used in Figures to Figures 15) Regarding the management of the FIFO memory included in the sending device,
This will be explained below.

? ! 413 (+) and (2) are diagrams for explaining the relationship between the FIFO memory and various pointers. HPTR is in 〒,
Indicates the address up to which encoded data is stored in the FIFO memory space. On the other hand, TM
DPTR indicates at which address in the FIFO memory space the data was modulated and sent to the line.The encoder stores the encoded data from the 1st FfFS address, and stores the encoded data up to the TPIFE address. When stored, the next encoded data is stored at the TPIFS address. At this time, a flag called REVRS (reverse) is set to 1, and the encoded data is stored to the final address of the FIFO to the modem side, and the HPTR is stored in T.
Notifies that the user has returned to the beginning of the FO.

On the other hand, as processing on the modem side, the encoded data from the TPIFS address is sequentially read out and modulated, and then sent out to the line.Then, the data stored at the TPIFE #F address is read out, modulated, and 1 After sending it to the line, it reads the data stored at the TPIFS address, modulates it, and sends it to the line.

At this time, the REVRS (reverse) flag is set to 0 and the encoding side is informed that the modulation and sending of the data to the line at the final address of the FIFO has been completed and the TMDP has returned to the beginning of the FIFO. Let me know what happened.

The main effects of FIFO management in the sending device are as follows.

(2) When the line number changes, the address where the encoded data corresponding to that line number is stored is stored in the memory that stores the retransmission start line number.

■Prevent the modem pointer (DPTR) from overtaking the encoder pointer (TM) IPTR.

■The encoder pointer TMHPTR goes around the FIFO memory so that it does not get too close to the modem pointer TMDPTR (retransmission is performed when a reception error occurs on the receiving side, but the data for this retransmission is stored in the FIFO
(to keep it in memory).

Regarding item L (2), since it has already been explained using FIG. 10, the explanation will be omitted here.

Next, we will explain about the above ■, modem pointer ↑
To prevent MDPTR from overtaking the encoder pointer TMHPTR, the modem pointer TMDP
When TR approaches the encoder pointer TMHPTH, send out a fill. Here, when encoding the read data, EOL consists of 2 bytes.

The data is OQH, 80H (see Figure 10),
The following example can be considered as an example of controlling the item (2).

If the modem pointer TMDPTR detects data of 001 (, 80H) while sending data from the FIFO memory, the REVRS (reverse) flag is checked.

R1: When the VR3 (reverse) flag is 0.

(High address in encoder pointer TMHPTR) - (High address in DPTR in modem pointer T) < 2. If the above conditions are satisfied, fill is sent, and the above conditions are satisfied. When it is not done,
That is, (encoder pointer T)! Address in HPTR) - (High address in modem pointer TMDPTR) ≧2, modem pointer TN[1PT
The data stored in the FIFO memory is sent out by sequentially incrementing R.

On the other hand, when the REVRS (reverse) flag is 1, it is first determined whether the high address in the modem's pointer TNDPTR is equal to TPIFE)I (the byte at the final address of the FIFO). Modem pointer ↑High address in MDPTR is TPI
When FE) is not equal to I, the modem pointer is sequentially incremented to send out the data stored in the FIFO memory.

When the modem pointer TMDPTR is equal to TFIFEH.

(High address in encoder pointer TNHPTR) - TFIFS) Determine whether I<1, and if the above condition is met, send out the fill, if the above condition is not met, ie.

(Encoder pointer T) high address in fHPTR) - TFIFS) If I≧1, the modem pointer TMDP is sequentially incremented to send out the data stored in the FIFO memory.

In the above case, even in the case of transmitting a fill, all encoding is completed (actually, when encoding is completed on the encoding side, the WHEN port flag is set to 1, so the modem side sets this flag to 1). You can check whether all encoding has been completed by checking the modem pointer T.
The data stored in the FIFO memory is sent out by sequentially incrementing MDPTR.

Furthermore, when the transmission of all encoded data is completed, an RTC (Return To Control) @ signal is transmitted. This RTC also includes the last transmitted line number after EOL. The number of HOLs sent is 103.

Next, the above item (2) will be explained. FIG. 14 shows the number of bits and bytes transmitted in 3 seconds at each transmission speed. That is, in order to enable retransmission with a delay of up to 3 seconds in a round trip, the encoder's pointer TNHPTR must match the modem's pointer NDPT.
Must be at least 311,100 bytes away from H.

FIG. 15 shows the relationship between the FIFO memory and various pointers. In this embodiment, when the high address in the encoder pointer TMHPTR is incremented, it is compared with the modem pointer MDPTR.

The encoder pointer TMHPTR is controlled to be separated from the modem pointer τMDPTR by 4098 bytes or more. A specific example of this control is shown below.

When incrementing the high address in the encoder pointer TMHPTR, REVRS (reverse)
Check the flag, REVRS (reverse)
When the flag is 0, (TFIFEH-(encoder pointer TI'1IP
High address in TH)) + ((Modem pointer ↑ High address in MDPTR) -TPIFSH
) <1 [1], and if the above conditions are met, the encoding is interrupted and a wait state is entered. Also, when the above conditions are not met, ie.

(TPIFEH-(Encoder pointer TMHPTR
)) + ((modem pointer TM
High address in DPTR) - TFIFSH)
When ≧16, perform encoding and convert the encoded data to F
Store in IFO memory.

On the other hand, when the REVRS (reverse) flag is 1.

It is determined whether (high address in modem pointer TMDPTR) - (high address in encoder pointer TMHPTR)<16, and if the above condition is satisfied, encoding is interrupted and a wait state is entered.

When the above conditions are not met, i.e. (high address in modem pointer TMHPTR) - (high address in encoder pointer TMHPTR)
When ≧16, encoding is performed and the encoded data is sent to FIF
Store in O memory.

97 Validity of memory capacity for storing retransmission start address The memory area for storing retransmission start address is considered to be 1024 bytes in this embodiment. For this reason.

512 retransmission free addresses can be stored.

That is, it is possible to retransmit one minute of the past 512 line numbers. Here, when the l line is encoded, the shortest data is when the l line is completely white. As mentioned above, the number of bytes when encoding a margin line is 7 bytes.

Since one line number is incremented every l line, the minimum number of bytes for one line number is seven.

Considering retransmission for one line number of 512, a minimum of 3584 bytes is required. At this time, when the transmission speed is 4800b/S.

3584 (bytes) ÷ 600 (bytes 7 seconds) 48 (seconds)
As mentioned earlier, we are considering 3 seconds as the time allowed for delay on the line, so the retransmission start address is 51.
It is sufficient to store it in two memories.

98 Control After All Image Information Is Sent from the Sending Device When all the encoding of the transmission document is completed, a return to control (RTC) signal is written to the FIFO memory. This RTC is
Set to EOL 103 side. Then, following EOL, add the last sent line number. The EOL here is 11 "0"s followed by "1"<12
Consists of bits.

The transmission time of the above-mentioned RTC is o.e seconds for 4800b/S, and 1.2 seconds for 2400b/S.

Generally, when performing error retransmission, the line quality is often poor, so RTG signals are
If it is set to 1, it is expected that RTC detection will not be possible. Therefore, the RTC signal is set to 103 KOLs so that the RTCg signal can always be detected by the receiving side device.

In fact, even when the modem finishes transmitting the RTG signal, it does not immediately start transmitting the procedure signal.9 In this embodiment, the delay for the international line is 1.2 seconds, and the NACK signal (P Is 1 second is considered as the detection time of the signal). Then, after 1.5 seconds have passed after the sending of the RTC signal ends, if 5ED=O, the receiving side sends the PI
It is determined that the S signal is not being sent, and the procedure signal is sent. Specifically, the /I signal is sent to EO as a 1 procedure signal.
IPS/EOP/PRI-EOII/PRI-MPS/
Use PRI-EOP.

Further, after 1.5 seconds have elapsed after the transmission of the R-C signal is completed, if it is 5ED-1, the process proceeds to search for the PIS signal.

If a PIS signal is detected within 2 seconds, error retransmission is performed, and if a PIS signal is not detected even after 2 seconds, the process proceeds to transmit a procedure signal.

@3 Conditions for making a retransmission request from the receiving side device and conditions for making a fallback request (used in Fig. 18) There are three cases in which the receiving side device makes a retransmission request as described below.

■ When an image error occurs for 3 or more lines in a row; ■ When training signal reception fails; ■ After entering image reception mode, a certain period of time (for example, 4.5 seconds for 2400b/S, 4800b) /S: 3.5 seconds) or more when the EOL signal cannot be detected.

In addition, if a retransmission is performed three times while transmitting one document, a fallback request will be made.However, if error-free data is received over a certain number of bytes (for example, 127 bytes) resets the counter that counts the number of retransmissions.

The flowchart shown in FIG. 16 represents the image reception control procedure focusing on the case of making a retransmission request and the case of making a fallback request. The above retransmission request/fall pack operation will be explained in detail with reference to this figure.

Step 8103B is 0 representing the image reception state.
Before image reception, a counter that counts the number of times NSF No. 4 has been sent and a retransmission counter that indicates how many times one document has been retransmitted during reception are cleared.

In step 91038, it is determined whether training reception was successful. Successful training reception means that confirmation of 5ED-1, C0-0 (about half the training time), and CD-1 were correctly confirmed. If training reception is successful within 3.5 seconds, proceed to step 9104G;
If the training reception is not successful within 3.5 seconds,
Step SIQ? Proceed to B.

Normally, training reception ends within 3.5 seconds.

Therefore, if training is not completed within 3.5 seconds after starting training reception, it is determined that training reception has failed. In this way, in this embodiment, it is possible to immediately determine that training reception has failed. Therefore, error retransmission or sending of an NSF signal (which may also be a DON signal) is then enabled.

The selection of whether to perform error retransmission or to send an NSF signal (when the NSFN signal is sent three times, a DCN signal is sent) will be described later.

In step 51040, since the training reception was successful, the counter that counts the number of times the NSF signal is sent is cleared. When performing error retransmission, the receiving device sends out the NSF signal following the PIS signal. This N
The SF @ number includes information such as the retransmission start line and whether there is a fallback. When the transmitting side device correctly receives this NSF signal, it performs control such as fall pack and then retransmits from the retransmission start line.

However, when the transmitting device cannot correctly receive the NSF signal, it goes back to receiving the NSF signal.On the other hand, after transmitting NSF No. 4, the receiving device goes to receive the training signal. Since the training reception is not sent, the training reception will be unsuccessful. At this time, the receiving device receives 5ED- within 3.5 seconds.
1 is detected (step 91078).
), in this case the SED is rOJ since no training signal is sent out. Then, the receiving device starts transmitting the NSF signal again, and the counter is used to count the number of times this occurs.

If the training signal is not sent from the sending side even after sending the NSF signal three times, the D(:N @ signal is sent and the line is disconnected.

Steps 51042 to 5104B represent the image reception state.

In step 51042, it is determined whether or not consecutive errors have occurred in three or more lines. These three lines are just one example, and can be set to any other value. Also, depending on the detail of the received image,
It is also possible to automatically change the number of lines.

If consecutive errors occur on 3 or more lines.

On the other hand, proceed to step 51052 and perform error retransmission.
If no consecutive errors occur in more than one line, the process advances to step 5IQ44.

In step 51044, between a (2400b/
14.5 seconds when S, 48QOb/S ty)
It is determined whether or not the EOL signal is detected over a period of a-3.5 seconds). If no EOL signal has been detected for a seconds, step 910
The process proceeds to step 58 and retransmits the error, and the E
If the OL signal is detected, the process advances to step 5104B.

This a second is determined based on the longest transmission time of one line at each transmission speed. This makes it possible to perform error retransmission even when training reception is successful but correct data is not demodulated.

In step 5104B, RTC (Return)
t.

It is determined whether or not a signal (Gontal) is detected.

If the RTG signal is detected, the process proceeds to step 91048.

On the other hand, if no RTC signal is detected, the process advances to step 51042.

Step 91048 represents a post-procedure.

Step 51050 occurs when a timeout occurs (T-18 minutes) while receiving one document, and represents an error.

In step 81052, it is determined whether or not correct data of a certain number of bytes or more has been received.When the characteristics of line 0 are in a steady state, image reception is good, but errors may occur due to impulsive noise that occurs infrequently. If this occurs, it means that more than a certain number of bytes of correct data have already been received.

In such a line situation, even if fall pack is performed on the transmitting side, an error will occur again.

Therefore, in such cases, it is better not to use unnecessary fall packs. In other words, if correct data of a certain number of bytes or more has been received first, step 5
Proceeding to 1054, the retransmission counter is cleared. If correct data of a certain number of bytes or more has not yet been received, the process advances to step 3105B and the retransmission counter is not reset.

In step 9105B, a PIS signal is sent to interrupt transmission on the transmitting side.

In step 91058, the retransmission counter is incremented by one.

In step 31080, it is determined whether the signal has arrived (ie, 5ED-1).

When it is 5ED-1, the process advances to step 51082.

This case is a case where the transmitting device does not correctly receive the PIS signal sent in step 5105B.

On the other hand, when it is 5ED-0, the process advances to step 31084.

In step 51082, the PfS signal is sent again.

In step 91084, it is determined whether the count value of the retransmission counter is 3 or more (that is, whether fall pack is to be performed). When the count value of the retransmission counter is 3 or more (i.e., when performing fall pack)
If the count value of the retransmission counter is less than 3 (that is, if fall pack is not performed), the process proceeds to step 51074.

In step 3108B, it is determined whether the current transmission speed is 2400 b/s. When the current transmission speed is 2400 b/s, no further fall pack can be performed, so after sending the CN signal (step 5 tos 8), an error ends (step 51070).On the other hand, when the current transmission speed is 2400 b/s
If it is not b/S, proceed to step 51072 and specify fall pack.

In step S10?4, an NSF signal containing information on the presence or absence of a retransmission start line/fall pack is sent.

In step 5107B, the counter for counting the number of times the NSF signal is sent is incremented by 1, and then the process proceeds to receive the image signal.

Step 3107B is a block that branches when training reception fails. If the training signal reception after sending the CFR signal fails,
Error retransmission is performed, but if the training signal reception fails after performing error retransmission once and sending an NSF signal, there are two cases: error retransmission and NSF/DCN/CN signal transmission.

That is, if the transmitting device does not correctly receive the NSF signal (YES in step 31078 if the transmitting device does not send a training signal, and YES in step 51080), the NSF signal is retransmitted. On the other hand, if reception is unsuccessful in the receiving device (NO in steps S10-8)
Here, do an error retransmission.

5ED=1 in "Stella 7'5L07B" indicates that it is determined that the training signal has arrived, and if SE[l-1 is detected in step 91078 (that is, the training signal has not arrived). On the other hand, if 5ED-1 cannot be detected in step 31078 (that is, the training signal has not arrived), the process proceeds to step 31080.

In step 51080, it is determined whether an NSF signal for retransmission was sent immediately before. If the Ni2P @ number for retransmission was sent just before, step 51
If the NSF signal for retransmission has not been sent immediately before, the process proceeds to step 2 5105B.

In step 51082, it is determined whether the NSF signal has already been retransmitted three times. If the NSF signal is retransferred three times, the process ends with an error after sending the DCN signal (step 51084).
se), if the NSF signal has not been retransmitted three times, the process proceeds to step 31084 and the NSF signal is retransmitted.

! 5IONSF Signal Structure (Used in FIG. 17) The receiving side device is provided with a memory area for storing the latest received line number. and.

At the time of initialization, data of 0IOIH is stored.

Each time the decoder detects EOL, it checks the next two bytes of data, ie, the line number. If the line number received this time is incremented by less than 3 compared to the line number correctly received last time, it is determined that the received image is "good". In other words, if the image error is less than 3 lines, it is determined that the reception is "good". This line number is stored in memory and updated each time it is detected.

On the other hand, if the line number received this time is incremented by three or more from the line number correctly received last time, a NACK signal is sent. In other words, if an image error of 3 or more lines occurs, it is determined that the received image is defective and a request is made to retransmit the error.Therefore, after sending the PIS signal, the 300b/S signal is sent. A signal is used to notify the sending device of the retransmission start line number and the presence or absence of a fall pack.

Figure 17 shows an example of a 300b/S signal sent from the receiving device to the transmitting device. In this figure, the preamble is a roll 1110 J pattern that is continuously sent for about 1 second, FFH is address data, and 13H is Control data (sent from the LSD data to the NSH data in order), 2G) 1 is the NSF FCF (Facsimile Control Field), and the line number sent after that is the last 9 digits of the line number. This data focuses on line number 〇 to line number Stt. The line number to be sent at this time is the LS of each byte data.
Do not set 1 to B. For example, line number 〇.

00H, OOH.

The next byte data indicates the presence or absence of fall pack. Specifically, when it is 00H, fall pack is not specified and F
For FH, fall pack is specified.

Fe2 is the frame check sequence, FLAG is ro
Ill 1110J.

When decoding an image when receiving it, the 2-byte data (ie, line number) following EOL is ignored.

III. Operation of the transmitting device when receiving a signal at NA (:) (Figure 18 used) The transmitting device reads the information on the document using the reading means, encodes the data using the encoder, and then encodes the data using the modem. The received data is modulated and sent to the line.At this time, a NACK signal (in this example, a PIS signal)
is being monitored. Then, if the NACK signal is not detected, the image information is transmitted, and if the NACK signal is detected, the image information transmission is interrupted. And 300b/
As described above, the line number (lower 9 digits) at which retransmission is to be started and information on the presence or absence of fallback are stored in this 300b/S heading for receiving the S signal.

When the transmitting device detects the retransmission start line number, the encoder pointer TM) IPTR in the transmitting device
, the address of DPTR in the modem pointer T of the sending device, the REVRS (reverse) flag, and the retransmission start address are checked, and various controls are performed based on the results.As examples of this control, the following three methods are used. A case is possible.

The first case is when the REVRS flag is 0 and the encoder pointer TMHPTR in the sending device is greater than the modem pointer TM[1PTR in the sending device, the modem pointer TMDPT of the sending device is
This is the case when R is larger than the retransmission start address. FIGS. 18(1) to (3) illustrate three cases in which a retransmission start address is recognized and retransmission is performed. The first mentioned here
The case is illustrated in FIG. 18(1). In this case, the modem pointer ↑MDPT on the sending device
A retransmission start address is set in R, and retransmission is performed from that line number.

The second case is illustrated in FIG. 18(2).

That is, the REVRS (reverse) flag is 1, and the modem pointer TM[1PTR
is the encoder pointer in the device ↑NIPTR
This is the case if it is larger. In this case, the retransmission start address is set in the modem pointer TMDP-H in the sending device, and retransmission is performed from that line number.Here, the encoder pointer TMH in the sending device is set.
If the PTR is larger than the retransmission start address, it is determined that an error has occurred, and the line is released by transmitting, for example, a DCH@ number (according to 300b/S) without transmitting image information.

The third case is illustrated in FIG. 18(3).

In other words, REVI? The S (reverse) flag is 0, and the encoder pointer TMHP in the sending device
TR is the modem pointer TMDPTR in the device
This is the case when the retransmission start address pointer is larger than the modem pointer TMDP-R in the sending device. In this case, set the retransmission start address to the modem pointer TNDPTR in the transmitting side device, and retransmit from that line number.
Set the EMS flag to 1. Here, if the encoder pointer TM) IPTR in the transmitting side device is larger than the retransmission start address, it is judged as an error, and image information is not transmitted, for example, DON signal etc. (300b/S
) to open the line.

When receiving an instruction to perform fallback, it falls back and transmits image information.

Also, if a DCN signal is detected following a prs signal, the line is released and the process is terminated with an error.

912 Description of Block Diagram of Sending Device (Used in FIGS. 18 and 20) FIG. 19 jf is a block diagram showing the configuration of the sending side of the facsimile device to which the present invention is applied.

In FIG. 19, 2 is a network control unit NGU (Network Control 11m1t) that maintains the loop.
), and in order to use the telephone network for data communication, etc., it connects to the terminal of the line and controls the connection of the telephone exchange network, or switches to a data communication path.

2a is a telephone line.

4 is a hybrid circuit that separates a transmission system signal and a reception system signal. The transmission signal of the signal line 28a is transmitted to the signal line 2b.
is transmitted to the telephone line 2a via the network control device 2. Further, a signal sent from the other party's facsimile machine is output to the signal line 4a after passing through the network control device 2.

6 is a circuit that detects a retransmission request signal (in this embodiment, a PIS signal is used) sent from the receiver. That is, when the signal 414a is introduced and a retransmission request signal (PIS signal in this embodiment) is detected, a signal of signal level "1" is output to the signal line 6a.

On the other hand, when the signal on the signal line 4a is introduced and the retransmission request signal (P2S5 in this embodiment) is not detected,
A signal of signal level rQJ is output to the signal line 8a.

8 is a 300b/S signal (No. N5Fi is used in this embodiment: 17th (see figure) and a disconnection command (II
CN) signal (300b/S signal). When the binary signal receiving circuit 8 detects the NSF signal, it generates a pulse on the signal line 8a and outputs a retransmission start line number on the signal line 8b. and,
Information on the presence or absence of fall pack (0→no fallback, 1→fallback) is output to the signal line 8d. Further, this binary signal receiving circuit 8 generates a pulse on the signal line 8c when detecting the number 008M.

Reference numeral 10 denotes a reading device which reads image signals corresponding to 1 life in the main scanning line direction from the original to be transmitted, and creates a signal string representing a binary value of white or black. This reading device 10 is composed of an image pickup device such as a CCD (charge coupled device) and an optical system. When a pulse is generated on the signal line 12a, that is, when there is a request to read the image signal of line 1, the image signal of one line is read and the binarized data is output to the signal line 10a.

Reference numeral 12 denotes a double buffer circuit so that while the image signal in one bar memory is being encoded, the image signal of the next line is written into the other buffer memory. The two buffers are BUFO (bar/7
70), call BIJFI (buffer l), BU
When the FO buffer is full of image data,
A signal of signal level "1" is output to the signal line 12b (buffer 0 full). When the BUFO buffer is not full of image data, the signal line +2b (buffer 0
full) outputs a signal with signal level "o". Also, B
When the buffer of UF l is full of image data, the signal level rl is applied to the signal line 12c (buffer 1 full).
” signal is output. When the buffer of BUFI is not filled with image data, a signal of signal level "0" is output to the @ edge line 12c (buffer l full).

After confirming that the buffer is full, the control circuit 30 (described later) transfers the bar 2 to be read next to the signal line 3.
When the signal line 30b is at the signal level rQJ as specified by the signal output to the signal line 0b, the data in the buffer 0 is read out; when the signal line 30b is at the signal level "1", the data in the buffer l is read out), and then the signal A pulse (read pulse) is generated on line 3Qa.

This double buffer circuit 12 outputs the data of the designated buffer to the signal line 12d. When the data of the designated buffer is output to the signal line 12d, the buffer full state of the designated buffer is dropped, that is, the signal level output to the signal m30b is set to "0" (buffer (l constant)). Therefore, the signal 1130a (read)
When a pulse is generated and all the data in the buffer is output, the buffer full 0 is dropped (that is, the signal line 12
b), and the signal level output to signal 1!130b is "l" (buffer l designation), and a (read) pulse is generated on signal line 30a. When all the data in the buffer is output, the buffer full signal is dropped (in other words, the signal line 12c is
outputs a signal with signal level “0”).

Furthermore, when the buffer becomes empty, the double buffer circuit 12 generates a pulse on the signal line 12a, and inputs 1947 worth of data in the main scanning direction from the reading device 10. In this case, the data is stored in an empty buffer, but at the same time, the buffer full in which the data was stored is set to 1. The read data is stored in buffer 0. Buffer 1. Buffer 0 and buffer 1 are stored alternately.

14 is a counter that counts the line number inserted after the end-of-line code (EOL).

When a pulse is generated on the signal line 30c, the line number is set to O (OIOIH). And signal line 30c
The value of the line number is incremented every time a pulse occurs in l. In other words, the line number is O(OIO
When a pulse is generated in the signal 30d in the state of IH), the line number becomes +(0103H).

The same applies below. Further, 2-byte data indicating the line number is output to the signal line 14a.

16 inputs one line of binarized data output to the signal line 30e, and sends the encoded data (modified Huffman encoding in this embodiment) to the signal line 1.
This is a circuit that outputs to 8c. When the binary data of the l line is input and the number of encoded bits becomes 8, that is, when 1 byte of encoded data is complete, a pulse is generated on the signal line IEta. . on the other hand,
When the encoding of one line is completed, the signal line IEl
Generate a (end) pulse at b. When the encoding of one line is completed, if the last data is less than 8 bits, the remaining data is set to O, and the data is processed as if it were 8 bits.

1a is a FIFO memory used to read line data and store encoded data. On the other hand, the modem side reads the data stored in this FIFO memory, modulates it, and sends it out to the line. Encoded data is written to the FIFO memory using three signal lines from the signal line 30f to the signal line 30h. When a (write) pulse is generated on the signal line 30f, the data is written to the address output on the signal line 30g. .

Stores the byte data output to the signal line 30h. In addition, the data stored in the FIFO memory is read out using the three signal lines 30i, 30j, and 18a. When a (read) pulse is generated on the koto line 30i, it is output to the signal line 30j. In this embodiment, the FIFO memory has addresses from 84QOH to AFFFH.

Reference numeral 20 denotes a retransmission start address storage memory, whereby when a reception error occurs on the receiving side, the transmitting side device retransmits from the line number where the error occurred. In this case, it is necessary to recognize from which address in the FIFO memory the data of the line number is stored, and this data is stored in this memory. To the signal line 30, use the signal line 301゜signal line 30m to write information such as "from which address in the FIFO memory the data of a certain line number is stored" to the main memory 20, to the signal line 30m (write) When a pulse occurs, the signal line 30k
The byte data of signal line 30 is stored at the address output to. Further, using the signal line 30, the signal line 30n, and the signal line 20a, information such as "from which address in the FIFO memory data from a certain line number is stored" is read out from the main memory 20.

Then, when a (read) pulse is generated on the signal line 30n, the data at the address outputted to the signal m30k is outputted to the signal line 20a. The retransmission start address storage memory is
It has addresses from GQOOH to C3FFH. The memory configuration for storing the retransmission start address is as shown in FIG.

As shown in Figure 20, addresses COOOH, COO
The address of line number 0.512... is stored in the IH, and the address COO2)1. COO3H stores the line number and address <1,513..., and addresses COO4H and COO5H store the line number 2.
, 514..., and similarly, the line number 51 is stored in addresses C3FCH and C3FDH.
Addresses of 0.1022... are stored, and address 0
3FEH, C: 3FFH has line number 511.1
Addresses of 023... are stored.

22 is a parallel-to-serial conversion circuit (hereinafter referred to as P/S converting circuit) that converts parallel data into serial data. When the parallel data becomes empty, this P/S converting circuit 22 A byte data request pulse is generated at 22a. The control circuit 30 outputs byte data to the signal line 300 when a pulse is generated on the signal line 22a. On the other hand, the P/S conversion circuit 22 inputs the byte data output to the signal line 300, performs parallel-to-serial conversion, and then outputs the serial data to the signal line 22b.

24 is a modulator that performs modulation based on the known CCITT recommendation V27ter (differential phase shift). This modulator 24 inputs the signal of the signal line 22b, performs modulation, and outputs the modulated data to the signal line 24a. do.

26 is a circuit that sends a CN signal (signal 300b/S) to the signal line 28a when a pulse is generated on the signal line 30p. This DON signal sending circuit 2B is
When the signal transmission is completed, a pulse is generated on the signal line 2eb.

Reference numeral 28 denotes an adder circuit that inputs the signal on the signal line 24a and the signal on the signal line 28a, and outputs the added result to the signal line 28a.

30 is a control circuit, which will be explained in detail in items 612 and 1513 described below.

313 General operation explanation of the control circuit in the transmitting side device (Using Fig. 21) The control circuit 3G shown in Fig. 19 performs the control described below.However, encoding is processed according to the main routine, and signal transmission is performed using the interface. Processing is performed using a rhabdo routine.

The encoding by the control circuit 3o, that is, the control process in the main routine, is as shown in FIG. First, the modem pointer TM[1PTR and the encoder pointer TMHPTR are set to the start address of the FIFO memory that stores encoded data (step 5100), and reading of the image information of one main scanning line is completed. In other words, it is determined whether the line buffer is full (step 51G2).

When reading the image information of the main scanning line in the l line is finished (that is, when the line buffer becomes full),
Proceed to step 5104, and read one line of data (step 5IQ4). Here, as described above, bar and Noah are buffered 0. It has a double buffer configuration with buffer 1, and data is read out alternately from these two buffers.

After reading data from each buffer, it is encoded and the encoded data is written to the FIFO memory (step 510B).The main controls during encoding are listed below.

1. Write encoded data to FIFO memory.

2. Write the line end code (EOL signal) (the data to be written to the FIFO memory is OOH, 80H) and the line number to the FIFO memory.

3. If a reception error occurs in the receiving device, the transmitting device retransmits the data from the line number where the error occurred. The following control is performed to enable this retransmission.

That is, when incrementing the bytes in the encoder's pointer ↑MHPTH, the encoder's pointer ↑MHPTR changes to the modem's pointer TMDPTR.
It goes around the FO memory and controls it so that it does not get too close. Specifically, when the encoder pointer ↑MHPTR approaches the modem pointer ↑MDPTH by a certain degree, encoding is interrupted and the encoder is placed in a wait state. When waiting, it is checked whether or not a PIS signal is detected, and if a PIS signal is detected, N
Receives SF signals.

Then, the pointer of the modem is set to the retransmission start address, and the data is retransmitted from that data. When performing this retransmission, training is performed again. This is the same control as in steps 5108 to 5112, which will be described later.

4. When retransmitting data from a certain line number, it is necessary to recognize from which address in the FIFO memory the data of that line number is stored. This information is stored in the retransmission start address storage memory.

Then, when the encoding of a certain line is completed, it is determined whether or not a retransmission request signal, that is, a PIS signal is detected (step 5108).
When an IS signal is detected, the transmission of image information is interrupted and the NS signal is detected.
Receive the F signal (step 5ilo), where:
If there is a fall pack instruction, reduce the modem's transmission speed and perform the fall pack. Furthermore, if the mouth CN signal is received, the process ends with an error.

Next, the modem pointer TMDPTR is set to the retransmission start address (this information is included in the NSF signal), and the data is retransmitted starting from that address (step 5112).
.

After that, it is determined whether the encoding of one page of the manuscript is completed (
Step S+14): If the encoding of one document is not completed yet, the process returns to step 5102. Furthermore, when the encoding of one document sheet is completed, the process proceeds to step 2 stte.

When the encoding of one document sheet is completed, it is determined whether or not there remains unencoded data in the double buffer memory (Step 2, step 5tte).

If unencoded data remains in the double buffer memory, the process returns to step 5102. Also,
If there is no unencoded data remaining in the double buffer memory, the process advances to step 5118 and a control return signal RTC (Return T) is sent.

Control) is written to the FIFO memory.

After that, it waits for the data stored in the FIFO memory to be sent out by the modem. And FIFO
After the data stored in the memory has been sent out, 1.
Wait for only 5 seconds. At that time, if SH[+-0, proceed to the post-procedure (step 5122), on the other hand, 5ED=1
If so, it means that a PIS signal is being sent from the receiving device, so the device detects the PIS signal and retransmits the error (step 5120).

On the other hand, the transmission processing (that is, interwoven processing) includes (a) modulating the data stored in the modem pointer TMDPTH and sending it to the line, and (b) sequentially incrementing the modem pointer TMDPTR.

(c) The main content is to control the modem pointer MDPTR so that it does not overtake the encoder pointer TMHPR.

914 Detailed operation explanation of the control circuit in the transmitting side device (using FIGS. 22 and 23) M11 procedure (main process, i.e., the main process) performed by the control circuit 30 with reference to the flowcharts shown in FIGS. Encoding processing procedure) will be explained.

First, various types of non-initialization processing are performed in steps 5128 to 5144.

In step 312B, a flag TRNEND indicating whether all encoded data stored in the F rFo memory has been sent out is set to 0.

In step 8130, CQOO is set to the pointer AGAPTR that controls the memory that stores the retransmission start address.
Set H.

In step 5132, the encoder pointer T
Set 840QH in NHPTR.

Step S! 34, the modem pointer TMD
Set PTH to 8400)1.

The line number is incremented every certain number of lines (one line in this embodiment), and this control is controlled by a LINCMT line counter. In step 913B, this counter LINCNT is set to 1.

In step 5138, the aforementioned REVRS flag is set to O.

In step 5140, HEND is set to 0 as a flag indicating whether or not encoding has ended.

In step 5142, a flag BAF indicating which buffer is currently reading data is set.
Save and save. When flag BAF is O, data is being read from buffer 0. Further, when the flag BAF is 1, data is being read from the buffer l.

In step 5144, the line number is initialized.

In steps 814G to 5154.

Determine whether the buffer T is full, that is, whether reading of l line has finished, and if the buffer is full,
Proceed to step 515B, where the data in the buffers is read alternately from buffer O and buffer l.

In step 5tse to step 5IBO, l
Read the line data from the double buffer and output it to the encoder.

In steps 5162 to 3182 shown in FIG. 22(2), the data of a specific line number is
The starting address of the FO memory is stored in the retransmission start address storage memory.

Here, when the line number changes, the retransmission start address is stored in the retransmission start address storage memory.

In step 3182, in step 516, control is performed to increment the line number for each line.
In steps 5188 from 4, the low byte data at the retransmission start address is stored in the retransmission start address storage memory.

In step 5170, the retransmission start address pointer AGAPTH is incremented.In step 5172 to step 8176, the high byte data at the retransmission start address is stored in the retransmission start address storage memory. In step 9178, the retransmission start address pointer AGAPTR is incremented. In step 9180, it is determined whether the retransmission pointer AGAPTR has advanced to the end of the retransmission start address storage memory. When the process reaches the end of the start address storage memory, CQOOH is set in the retransmission pointer AGAPTR (Step 5182).

In steps 8184 to 5188 shown in FIG. 22(3), OOH is stored in the FIFO memory.

In step 5190, the encoder pointer τ
M) Increment IPTR. This TMHPTH
The increment of will be described later.

In steps 5132 to 519El,
Store 800H in FIFO memory.

In step 5138, the encoder pointer T
M) Increment IPTR.

In steps 5200 to 5216,
Input the line number and store the line number in FIFO memory. That is, in step 5200, a line number is input. In steps 5202 to 5208, high byte data of the line number is stored in the FIFO memory. In step 8208, the encoder pointer TMHP
Increment TR.

In steps 9210 to 5214 shown in FIG. 22(4), the low byte data of the line number is stored in the FIFO memory. In step 921B, the encoder pointer TI)IPTR is incremented.

In steps 3218 to 5230.

Store encoded data in FIFO memory.

First, in step 2 5218, it is determined whether 1 byte of data has been encoded. Once one byte of data has been encoded, the data is input (step 522).
0) L, store 1 byte of encoded data in FIFO memory (steps 5222 to 52)
2B).

In step 5228, the encoder pointer T
Increment MHPTR. In step 5230, it is determined whether encoding of one line is completed, and
If the encoding of the line is not completed, step 3
The process proceeds to 218. Also, when the line encoding is completed,
Proceed to step 5232.

In steps 5232 to 5238 shown in FIG. 22 (5), it is checked whether or not the line number should be incremented, and if it is necessary to increment, the line number is incremented. Increments the line number.

In steps 5240 to 5248,
It is determined whether a retransmission request signal, that is, a PIS signal has been received. If a prs signal is received, the NSF
Receive the signal and input the line number to start retransmission. Then, set the retransmission start address to the modem pointer TMDPTR and transmit data from that address.If there is a fallback instruction here,
Reduce transmission speed.

Also, if a DCN signal is received, the line is disconnected.

Furthermore, even after a certain period of time (for example, 30 seconds), the NS
If the F signal cannot be detected, the line is also considered disconnected.

In step 5250, it is determined whether encoding of one document sheet has been completed. If encoding of one document is completed, the process advances to step 5252.

If the encoding of one document sheet has not yet been completed, the process advances to step 514B.

In step 5252 and step 5254,
Determine whether either buffer is full. If either buffer O1 or buffer l is full, the process advances to step 514B. If neither buffer 0 nor buffer l is full, the process advances to step 825B.

Step 825 shown in FIG. 22 (8) and FIG. 22 (7)
B or step 5300, a control return signal RTC (Return↑o Cont) is sent to the FIFO memory.
rol) Store @ issue.

First, in steps 525B to 5280, 00! Store the data of (in FIFO memory).

In step 5282, the encoder pointer T
Increment MHPTR.

In steps 5284 to 5268,
Store 80H data in FIFO memory.

In step 927G, the encoder pointer T
Increment MHPTR.

In steps 5274 to 5304 (see FIG. 22 (7)) and steps 31088 to 31128 (see FIG. 22 (8) and (9)), only 103 signals with line numbers added to the EOL are stored in the FIFO memory. The EOL in this embodiment is a signal consisting of 11 consecutive 0's and 1 1.

In step Sl 130, since the encoding has been completed, the flag MHENII is set to 1.

In steps St 132 to 51170 shown in FIG. 22 (10), all data stored in the memory is waited for to be sent out by the modem.

When a PIS signal is detected, an NSF signal is received and a retransmission start line number is input. Then, set the retransmission start address to the modem's pointer ↑1lIDPTH, and transmit data from that address.If there is a fallback instruction, reduce the transmission speed, and if a DON signal is received. If so, the process ends with an error. Furthermore, if the NSF signal cannot be detected even after 30 seconds have elapsed, the process will be terminated as an error.

If it is 5ED-Q after 1.5 seconds have passed after the RTC is sent from the modem, that is, after the TRNEN port becomes 1,
It determines that the image transmission is complete, and proceeds to send the procedure signal. Conversely, if it is 5ED-1 after 1.5 seconds have elapsed, it proceeds to search for the PIS signal, and within 2 seconds, the PIS signal is sent. ! When an S signal is detected, error retransmission is performed, and when a PIS signal is not detected after 2 seconds,
It is determined that the image transmission has been completed, and the process proceeds to transmit the procedure signal.

Steps 5306 to 532B shown in FIG.
This is a subroutine when detecting the signal) and setting the modem pointer TMHPTR to the retransmission start address (
Step 9248, Step 334B, Step 5
11BB).

The set of retransmission start addresses is 1) R as described above.
EVRS7 When lag is O 1-1) When TMHPTR>TMDPTR and retransmission address is TMDPTR 1-2) TMHPTR>TMDPTR1 and retransmission address>TMHPTH1 and retransmission address>TMHPT
H (in this case, set REVRS to 1) 2) When REVRS75 is 1, when child MDPTR > TMHPTR and retransmission address > TMHPTH, set the retransmission address to modem pointer TMI)PTR.
Otherwise, it is considered an error.

From step 5328 to step 5354 shown in FIG. 22 (12), the encoder pointer TMHPTR
is incremented.

Here, in step 5330, the encoder pointer TNHPTR is incremented. And T
If the high byte of MHPTR is not incremented, the process returns immediately, but if the high byte of TMHPTR is incremented, the process advances to step 5334.

In steps 5334 to 5338,
The encoder pointer TMI (PTR is controlled so that it does not go around too close to the modem pointer TNDPTH. In other words, the encoder pointer TMHP
TR, M<, modem novo y ta T) lDP ding R ni 40
If the distance is 9E1 or more, return. At this time, it is checked whether the encoder pointer TMHPTR has reached the end of the FIFO memory, and if it has reached the end of the FIFO memory, the encoder pointer TMHPTR 8400)1 is saved.

If the encoder pointer TMHPTR is not more than 409B away from the modem pointer TMDPTR, encoding is interrupted and a wait state is entered. While waiting, it is determined whether or not a retransmission request signal (ie, PIS signal) is detected (step 934Q).

If a P■S signal is detected, the transmission is interrupted (step 5342), the NSF signal is received (step 5344), and the retransmission start line number is input (step 534B), modem pointer TM). Set the retransmission address to IPTH.

Here, if there is a fall pack instruction, the transmission speed will be reduced, and if an Il(:N signal is received, the line will be disconnected. Furthermore, the line will be disconnected for a certain period of time (for example, 30
If the NSF signal cannot be detected even after 3 seconds), the line will be disconnected.

The flowchart shown in FIG. 23 shows a detailed control process regarding encoded data transmission processing (i.e., interwoven processing). In this embodiment, a pulse (i.e., byte data request pulse) is generated on the signal line 22a. Then, this interwoven processing is executed.

The main control here is to sequentially read data stored in the FIFO memory from step 5370 to step 9.
37B), output to the P/S conversion circuit 22 (steps 5380 to 938B, step 539)
0 to step 939B), at this time,
Control is performed so that the modem pointer TNDPTR does not overtake the encoder pointer. That is, when OOH, 80) 1 data is detected while transmitting encoded data, as described above, if HPTR is not a certain amount of light at the encoder pointer T than the modem pointer, a fill is transmitted. (Steps 5380 to 5392, Step 54)
04 to step 5410), where MHEN[
This is not the case when l is 1 (that is, when all encoding of one sheet of original is completed).

When the modem pointer reaches the end of the FIFO memory, set the modem pointer τMDPTR to the first address 8400H of the FIFO memory (step 7"53).
98°54QQ).

Also, all encoding is completed (NHEMD=l) L,
Sends all data encoded by the modem (TMHPTR=
(step 93B4), T
RNEN [set 1 to step 538B),
The main processing routine (encoding processing routine) is notified that the transmission of all encoded data has been completed.

915 Receiving side device block structure #t (24th rl!J
(Use) FIG. 24 is a block diagram showing the configuration of the receiving side of a facsimile machine to which the present invention is applied.

The conditions for performing error retransmission and the conditions for performing fall pack have already been described in detail, so we will not discuss them here; only the processing after actual image signal reception will be described below. .

In FIG. 24, 40 is the same network control device (NGIJ) as 2 shown in FIG. 18, and 40a represents a telephone line.

42 is a hybrid circuit similar to 4 shown in FIG. The signal sent to signal line 54a is transmitted to signal line 40b.
is sent to the telephone line 40a via the network control device 40. In addition, the signal sent from the other party's facsimile machine is sent via the network control device i4G and then sent to the signal line 42.
It is output to a.

44 is a circuit that inputs the signal of the signal line 42a and detects whether or not the signal is present. When receiving a signal of -43 dBm or higher, the signal level rl is sent to the signal line 44a.
When a signal of less than -43 dBm is received, a signal of signal level "O" is output to the signal line 44a.

4B is the well-known CCITT recommendation V2? This is a demodulator that performs demodulation based on ter (differential phase modulation). Demodulator 4
B inputs the signal of the signal line 42a, performs demodulation, and outputs the demodulated data to the signal line 48a.

4B is a serial-to-parallel conversion circuit that converts serial data into parallel data (hereinafter abbreviated as S/P conversion circuit). When 8-bit parallel data is available, this S/P conversion circuit 48 connects the signal line 48a. generates a pulse to
The received data is output to the signal line 48b. The control circuit 8B recognizes that one byte of data has been received by detecting that a pulse is generated on the signal line 48a.

50 is @kotosen5 when a pulse is generated on the signal line B8b.
This is a circuit that sends the N5FN number (see FIG. 17) to 0a. The NSF M number includes a line number. This line number is set to the value output to the signal line 88a. NSF M contains fallback information. This fallback information is output to signal line 86b. And signal line 8Bh
When signal line 6Bh is at "0" level, fall pack is not instructed, and when signal line 6Bh is at "1" level, fall pack is instructed. The NSF signal sending circuit 50
When the transmission of the F@ signal is completed, a pulse is generated on the signal line 50b.

52 is a circuit that sends out a retransmission request signal (that is, a PIS signal in this embodiment). #! In other words, it is a circuit that sends a PIS signal (462Hzc7) signal to the signal line 52a for 3 seconds when a pulse occurs on the signal line 18c. When the transmission of the PIS signal is completed, a pulse is generated on the signal line 52b.

Reference numeral 54 denotes an adder circuit that inputs the signal on the signal line 50a and the signal on the signal line 52a, and outputs the added result to the signal line 54a.

56 is an F used to demodulate data sent from the other party's facsimile machine and store the demodulated data.
This is IFO memory. This FIFO memory is the F
It is the same as the IFO memory (see 18 in FIG. 19).

On the other hand, the decoder reads the data stored in the FIFO memory, decodes it, records it through the double buffer circuit 62, and writes the demodulated data to the FIFO memory using the signal line 88c or signal line 88e. When a (write) pulse is generated on the signal line 88c, the signal line 6
The byte data output to the signal line Bee is stored at the address output to 8d.

In addition, 3 signal lines 66f, 68g, and 58a
The data stored in the FIFO memory is read using the main signal line. When a (read) pulse is generated on the signal line 88f, the data at the address that is output on the signal line BBg is output to the signal line 58a. In the example, F
IFO memory address is 840GH to AFFF
It is H.

58 is a line number storage memory that stores the latest correctly received line number. When writing a line number (-) to this line number storage memory 58, the line number is output to the signal line 8flh and a (write) pulse is generated on the signal line 813i.On the other hand, when reading the latest correctly received line number When a (read) pulse is generated on the signal line 1118j, the latest correctly received line number is output on the signal line 88h.

80 is a decoder that reads demodulated data from the FIFO memory and outputs the decoded data to the signal line 80c. When preparations for decoding the demodulated 1-byte data are completed, a byte data request pulse is generated on the signal line Boa. When the pulse is generated, the time control circuit B6
reads 1 byte of demodulated data from the FIFO memory and outputs it to the signal line 86k. When the decoding of the l line is completed, the decoder BO generates a pulse on the signal line BOb. Then, the decoded data of the l line is output to the signal line 80c.

62 is a double buffer circuit for writing the next line of image signals into the other buffer memory while the image signals in one buffer are being recorded. This buffer is the same as the transmitter's double buffer (see 12 in FIG. 12). 2 wood buff 7 is BUF
When this buffer BUFO, called BUFI (buffer 1) is full of image data, a signal of signal level "1" is output to the signal line 82a (buffer O full). When the image data is not packed in the BUFO par or Noah, the signal line 62
A signal of signal level rQJ is output to a (buffer O full).

Furthermore, when the buffer of BUF 1 is full of image data, a signal of signal level "k" is output to the signal line 82b (buffer l full). When the BUFI buffer is not full of image data, the signal line 82b (
A signal of signal level "O" is output to the buffer l full).

A control circuit 6B, which will be described later, recognizes that the buffer is empty and specifies which buffer to write data in. That is, when the signal line 138m is at the signal level rQJ, data is written to buffer 0: signal line When 88m is the signal level rlJ.

Write data to buffer l), then output the recorded data to signal line 88n, and (write) to signal line 88JL.
Generates a pulse.

The double buffer circuit 62 sets the buffer full value of the designated buffer to 1.

On the other hand, when the recording device 64 finishes recording the line data stored in a certain buffer, it generates a recording request pulse on the signal line E14a.

Furthermore, when the double buffer circuit 62 detects the recording request pulse, if the buffer is full of data,
Record data is output to the signal line 82c. When all the data in the buffer is output to the recording device B4, the buffer full corresponding to that buffer is dropped. Here, the buffers used are buffer O, buffer 1 . Buffer 0. Alternating with buffer l.

A recording device 64 generates a recording request pulse on a signal line 84a when preparation for recording is completed. Then, the recording data outputted to the signal line 82c is input, and recording is performed.

68 is a control circuit, and its operation will be explained in detail in item 916, which will be described next.

91B Description of operation of control circuit in receiving side device (using FIGS. 25 and 26) The control circuit 6B shown in FIG. 24 performs the following control.

Reception of transmission data is processed by the previously described interwoven routine, and decoding is processed by the main routine.

In order to receive data, one byte of data is input every time a pulse is generated on the signal line 48a and stored in the FIFO memory. At this time, the modem pointer RNDPTR
Increment sequentially. On the other hand, the modem pointer R
When MDPTR reaches the end of the FIFO memory, it sets the modem pointer to the beginning of the FIFO memory. At this time, the REVRS flag is set to 1.

FIG. 25 is a flowchart showing detailed control procedures regarding reception of demodulated data (ie, interwoven processing).

When a pulse is generated on the signal line 48a, interwoven processing starts (step 5F100). In steps 5602 to 8606, demodulated data is input and stored in the FIFO memory.

In step 8608, the modem pointer RM port PTR is incremented.

In step 5810, the modem's pointer is
Determine whether it has reached the end of the FO memory, and if it has reached the end of the FIFO, pointer RMDP of the modem
TR1, :8400) Set 1 / To L, So L Te RE
Set VR975 to 7-2.

The main processing content of the main processing (decoding processing) process is first to search for the line end code EOL. E
The two bytes following OL indicate the line number. If the line number is incremented by less than 3 compared to the previous time, it is determined that image reception is good. At this time, the line number is updated every time a new line number is received. Therefore, if the line number is three or more higher than the previous one, it is determined that the image reception is not good. Then, the PIS signal and the NSF signal in which the retransmission start line number is stored are sent to the transmitting device. At this time, as described above, fallback and other controls are performed, and the receiving device receives data from that line number.

When image data is being received correctly, each line of image data is output to the double buffer and recorded. Output to the double buffer T is performed alternately with buffer O and buffer I.

When the encoder pointer reaches the end of the FIFO, the encoder pointer is set to the beginning of the FIFO. At this time, the REVRS flag is set to O.

Figure 26 (1) to (4) are decoding process (main process)
2 is a flowchart showing details.

Steps 5820 to 5630 shown in No. 281N(1) represent various initializations.

In step 51m2G, the modem pointer RM
Set 8400H to DPTR.

In step 5622, the encoder pointer R
Set 8400H to NHPTR・Stella 7'58
At step 24, the flag BAF (a flag indicating which buffer the recording data is to be stored in now) is set to 1.

In step 5626, the modem's pointer is
Flag REVR indicating returning from the end of FO to the beginning
Set S to 0.

In steps 3828 to 5630,
Initialize the line number (set to 0IOIH).

In steps 5632 to 5640, E
Determine whether or not the office lady has been found. If EOL is found, proceed to step 5642.

In steps 5634 to 9838, one byte of demodulated data is input from the FIFO memory.

In step 5840, the encode pointer is incremented. This will be discussed later (see steps 5720 to 5734).

In steps 5642 to 5654,
It is determined whether the control return signal RTC signal is detected.

In step 5842, it is determined whether there is a possibility of an RTC signal, that is, whether the data after ignoring the 2-byte data following EOL is EOL. If there is a possibility of RTG@ issue, step 5
In steps 844 to 5852, it is determined whether an RTC signal is detected. When the RTC@ number is detected, image reception ends (step 9584).

Here, for the detection of the RTC signal, for example, rE
Following OL J, after controlling 11 rQJs, 2 rlJs
When detected twice. In this case as well, each time EOL is detected, the following 2 bytes of data are ignored.

In steps 5644 to 5848,
Input 1 byte of demodulated data from FIFO memory.

In step 5850, the encoder pointer R
Increment MHPTR. Here, if there is no possibility of detecting an RTC signal, that is, if it is detected that the data after ignoring the 2-byte data following EOL is not EQL, the process advances to step 885B.

In step S85f1, the 2-byte data following the EOL signal, ie, the line number received this time, is input. In steps 5858 and 5880, the latest correctly received line number is input.

In step 2 5662, it is determined whether the currently received line number is 3 or more larger than the latest correctly received line number, that is, whether an image reception error has occurred. If the line number received this time is 3 or more larger than the latest correctly received line number, that is, if an image reception error has occurred, step 8
Proceed to 698.

If the currently received line number is less than 3 greater than the most recently correctly received line number, that is, if the image reception is good, the process proceeds to step 8664.

In step 5664 and step 886B,
The line number received this time is stored in the line number storage memory 5B.

In step 5eee to step 5680 shown in FIG. 26(2), demodulated data is input and decoded to create l-line recording data.

In steps 5868 to 5872.

Input 1 byte of demodulated data from FIFO memory.

In step 5874, the encoder pointer R
M) Increment IPTR.

When the decoder requests byte data (step Sf!7
B), 1 byte of data is sent to the decoder (
Step 5878) Then, in step 5680, it is determined whether one line of decoding has been completed. If the decoding of one line has not yet been completed, the process advances to step 8888. On the other hand, if the decoding of one line has been completed, the process advances to step 5882.

In step 5882, the decoded data of line l is input, the corresponding buffer is selected, and output to that buffer (step 8884 or step 2 S[1
98) When writing one line of data to the buffer, buffer O and buffer I are selected alternately. Then, the process advances to step 5632 to decode the primary line.

If the image reception is not good, the process proceeds to step 8698 shown in FIG. 2B (3). First, the PIS signal is transmitted. Step 8698 to step S? OO), interrupts the sending device's transmission. Then, add 1 to the latest correctly received line number and send it to the NSF.
signal, and transmit the NSF signal (Step 5)
702 to step 570B), at this time, as described above, control such as fallback is also performed, and 8400FI is set to the modem pointer RNDPTH, and 8400H, BAF is set to the encoder pointer RNHPTR.
1. Set REVMS to 0, perform various initializations, and perform image reception again.

FIG. 26 (Step S?2G or Step 5 shown in 0)
734 is a subroutine that increments the encoder pointer RNIPTR. When incrementing the encoder pointer RMHPTR, it is necessary to control it so that it does not overtake the modem's inter RNDPTR (steps 5722 to 5724).

In step 872B, the encoder point R
Increment MHPTR. If the encoder pointer reaches the end of the FIFO memory, set the start address of the FIFO memory to the encoder pointer and set O to the REVRS flag (step 5).
728 to step 5732).

In addition, various timers are running even while control is being performed, and for example, if the timer is over,
The line will be disconnected.

917 Other Embodiments When configuring a facsimile apparatus equipped with an automatic call function, it is also possible to control the facsimile apparatus to select another line and perform automatic call when image transmission fails.

Furthermore, in the embodiments described so far, the document image is divided into multiple line information and transmitted, but it is also possible to divide the original image into multiple areas for each block and transmit the area information obtained as one unit. (hereinafter referred to as blank space) [Effect] As explained above, according to the present invention, conventional) IDL
Since the block transmission method according to the C procedure is not adopted,
Even if a transmission error occurs, the erroneous image can be retransmitted from the corresponding line. This makes it possible to arbitrarily set the allowable error frequency, and to perform error retransmission efficiently even in response to delays on the line.

Since the present invention does not provide a method that fundamentally changes the conventional encoding method, it is easy to implement.

Furthermore, according to the present invention, the criterion for recognizing that a reception error has occurred can be arbitrarily changed on the receiving side, so that special effects as described below can also be obtained.

(2) If a reception error occurs in even one area, it can be determined that the received image is not good and retransmission can be performed, so that the received recorded image will have no errors at all.

■ The criteria for recognizing a reception error on the receiver side is, for example, if 3 lines 3947 or more occur.
Therefore, it is possible to determine that the received image is not good and retransmit it only when reception errors occur in three or more lines, and to ignore errors in two lines or less.

■ Judgment criteria can be changed depending on the type of image, such as font size.

Thus, the item r! mentioned regarding [prior art]! 53
Problems caused by error retransmission using HrJLC frame structure, gJ for 9361 line errors
JI, 93.2 Effects of bit position where error occurred”
It is now possible to clear.

According to an embodiment to which the present invention is applied, more specifically, the following effects can be obtained.

1) Regarding the effect on line errors, the line number is added after "EOL" (end of line code) by modified Huffman encoding or modified read encoding.Since it is 1-, the conditions for requesting retransmission can be arbitrarily set on the receiving side. be able to.

For example, on the receiving side, if an error occurs only in line 1, it can be determined that reception is good, and a retransmission request can be made only when consecutive errors occur in two or more lines.

In order to make such a retransmission request, for example, a) the transmitting side transmits a line number for each line, and the receiving side changes the algorithm for determining that the received image is defective.

b) On the transmitting side, the same line number is assigned to several lines. Then, by changing the numerical values indicating these several lines, the conditions for retransmission are changed.

By changing these various conditions, it is possible to arbitrarily set a continuous allowable error line.

Particularly in facsimile transmission using a telephone line, it is difficult to reduce error lines to zero, so errors of several lines or tens of lines are allowed for one received image. In other words, even if the received image has errors of several lines or tens of lines, it is determined that the nine received images are good.

From this point of view, training e
A transmission speed suitable for the line is selected based on the TCF. This determination makes it possible to obtain a fairly good received image in a steady state, but a problem arises when impulsive noise or the like is added to the line.

To solve this problem, according to the error retransmission method according to the present invention, reception is performed without requesting retransmission when errors occur infrequently, and burst errors occur when impulsive noise is added to the line. In this case, a retransmission request can be made. In this way, efficient retransmission becomes possible.

il) Effect of bit position where error occurs According to the error retransmission method according to the present invention, retransmission from a desired area becomes possible. In other words, (a) shown in Figure 3
Even if an error occurs in the data in part (a), it is possible to retransmit the data from the beginning of part (a). On the other hand, in the case of blocking using the conventional IDLC frame, it was necessary to retransmit the data starting from (a). In this way, even if an error occurs in a received image, it is possible to retransmit it from the area where the error occurred, eliminating the need to transmit data redundantly.

1ii) Effects based on propagation delay characteristics of communication lines When performing error retransmission according to the present invention, data is not blocked, so error retransmission is possible even when the delay time inherent to the line is long. become.

iv) Regarding ease of encoding, conventional encoding is used because the bits of a fixed length following the above "EOL" are defined as line numbers.

The decoding technique can be used as is, and the encoding according to the present invention can be easily implemented. this is[
This eliminates the disadvantage of item r93.4 Difficulty in encoding J mentioned in regard to [Prior Art].

(Margin below)

[Brief explanation of drawings]

Figure 1 is an HDLC frame former and transport diagram; Figure 2 is a diagram showing a specific example of error retransmission using the HDLC frame data shown in Figure 1; Figure 3 is a diagram of two) IDLC A diagram showing a frame. FIG. 4 is a diagram showing an example of HDLC frame transmission when there is a delay in the line; FIG. 5 is a schematic diagram showing the state when the receiving device fails to receive the training signal in the conventional error retransmission method; FIGS. 6(1) to 6(3) are waveform diagrams illustrating reception of training signals and image signals, and FIG. 7 is a flowchart showing a conventionally known control procedure for training reception/image signal reception. FIG. 8 is a schematic diagram illustrating a control procedure according to an embodiment of the present invention. 9 (1) to (7) are bit configuration diagrams showing specific examples of line numbers; FIG. 10 is a diagram showing an example in which encoded data and retransmission start addresses corresponding to each line number are stored in memory; FIG. 11 is a block diagram showing the transmitting side configuration of the facsimile machine according to this embodiment, FIG. 12 is a flowchart showing the control procedure to be executed by the control circuit shown in FIG. 11, and FIG. 13 (1) and (2) is a diagram explaining the relationship between the FIFO memory and various pointers, and FIG. 14 is a diagram showing the number of beats, totes, and bytes sent out in 3 seconds at each transmission speed. 15 (1) and (2) are diagrams showing the relationship between the FIFO memory and various pointers; FIG. The figure shows 30 steps for the receiving side to notify the sending side of the retransmission start address and information on the presence or absence of fallback.
The figure which shows an example of the signal of 0b/S. FIGS. 18(1) to 18(3) are diagrams illustrating a method of setting a retransmission start address. FIG. 19 is a block diagram showing an embodiment of the sending side of a facsimile machine to which the present invention is applied, FIG. 20 is a configuration diagram showing a retransmission start address storage memory, and FIG. 21 is a control circuit 30 shown in FIG. 18. 22 (1) to (12) are detailed encoding processing (i.e., details of the main processing) of the control circuit 30 shown in FIG. 19.
23 is a flowchart showing the encoded data transmission procedure (i.e., interwoven processing) controlled by the control circuit 30 shown in FIG. 18.
Flowchart showing. FIG. 24 is a block diagram showing an embodiment of the receiving side of a facsimile apparatus to which the present invention is applied, and FIG.
26(1) to (4) are flowcharts showing demodulated data reception processing (i.e., interwoven processing) controlled by the control circuit 6B shown in FIG.
6 is a flowchart showing a decoding process (ie, main process) controlled by the computer 6. 2... NCU, 4... Hybrid circuit, 6... Retransmission request signal detection circuit, 8... Binary signal receiving circuit, 10... Reading device, 12... Double buffer circuit, 14. ...Line number counter circuit, 1B...
Encoding circuit, 18... FIFO memory, 20... Retransmission start address storage memory, 22...P
/S conversion circuit, 24... Modulator, 28... DCN signal sending circuit, 28... Addition circuit, 30... Control circuit, 40... NCU. 42...Hybrid circuit, 44...Signal presence/absence detection circuit. 46... Demodulator, 48... S/P conversion circuit, 50... NSF signal sending circuit, 52... Retransmission request signal sending circuit. 54...Addition circuit, 5B...FIFO memory, 58...Line number storage memory. 60...Decoder. 62... Double buffer circuit, 64... Recording device, 68... Control circuit, 87... NCU, 68... Hybrid circuit, 68... Binary signal output path, 70... Tonal Signal sending circuit. 71...Addition circuit. 72... Tonal signal detection circuit, 73... Binary signal detection circuit, 74... Start button. 75...Error retransmission mode selection switch, 76...Control circuit, 77...Mode conversion notification sound generation circuit. Figure 1 Figure 2 Figure 3 (In Figure 4 (Tf l + Tr 1 Figure 7 Figure 8 Figure 9 Figure 14 Beat I/U I:/7 No. 8 - Line number - 2 (7) .tsuyu, yoe yoe, yo Figure 10 θφHφ/Hφ3Hβ2H69Hpis eel 1
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Claims (1)

[Claims] In an image communication device that transmits and receives image information divided into a plurality of area information, if it is determined that the area information has been received in error, code information corresponding to the area information is transmitted. What is claimed is: 1. An image communication device comprising: means for requesting retransmission of the area information by sending the area information back to the user; and means for variably setting determination criteria for requesting retransmission of the area information.