JPS61196612A - Automatic off-set compensating circuit for switched capacitor filter - Google Patents

Abstract

PURPOSE:To prevent the receiving of the influence for the initial value deviation and change and to decrease the off-set voltage by being provided with a low- pass filter (off-set voltage detecting circuit) and an adder circuit whose cut-off frequency is sufficiently lower than the signal component, and synthesizing the extracted off-set voltage and the output of the filter facing forwards or facing backwards. CONSTITUTION:When a sine wave voltage Vi is inputted into a switched capacitor filter 1, a step waveform Ve1 including the off-set of an operational amplifier and an off-set voltage Ve1 by a switching noise, etc., is outputted. By inputting the output voltage Ve1 and the output voltage Vof of an off-set voltage detecting circuit 3 with a gain as 1 into the adder circuit, a step waveform Ve2 whose off-set voltage is reduced by half and goes to be Ve2 is outputted. A time constant and a gain of an off-set voltage detecting circuit 3 is obtained sufficiently largely, thereby an automatic off-set compensation of a switched capacitor filter 1 can be executed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a switched capacitor filter, and more particularly to an automatic offset compensation circuit that automatically compensates for an offset voltage generated in a switched capacitor filter.

[Background of the invention]

In recent years, due to advances in microfabrication technology and MOS analog technology, switched capacitor films that can realize monolithic ICs have been attracting attention.

Switched capacitor filters have the problem that large offset voltages are generated due to spike noise and the like accompanying switching operations of switching elements, making it impossible to ensure a wide input range.

A method to solve the above problem is to provide a subtraction circuit 9 judgment circuit, an attenuation circuit, an integration circuit, etc. after the filter.
By extracting the difference (error voltage) between the input and output voltages of the determination circuit, passing it through an attenuation circuit, and integrating it in an integrating circuit, the amount of offset is estimated, and by subtracting the amount of offset from the output signal of the filter. There is a method for obtaining a signal without offset (Japanese Patent Laid-Open No. 58-3308).

In this method, the algorithm for offset compensation is complex, and the judgment circuit, subtraction circuit, and attenuation circuit for extracting the error voltage must be highly accurate, so each element must be highly accurate. There are drawbacks. That is, it has the disadvantage of being affected by initial value deviations and fluctuations of elements, and is not suitable for LSI implementation. Furthermore, when integrating the above-mentioned offset erasing circuit, since resistors and capacitors are formed with high precision on a semiconductor chip, 1) it is difficult to set the resistance value, 2) a large chip area is required,
Furthermore, a large number of circuits having functions of subtraction 9 judgment and attenuation for offset removal are required, which is insufficient as an LSI circuit.

[Purpose of the invention]

An object of the present invention is to provide an integrated switched capacitor filter that is less susceptible to initial value deviations, fluctuations, and dispersions of elements, and that can automatically reduce offset voltage with a simple circuit configuration and a rough offset detection circuit. The object of the present invention is to propose a suitable offset voltage automatic compensation circuit.

[Summary of the invention]

In order to achieve the above object, the automatic compensation circuit for a switched capacitor filter according to the present invention includes a low-pass filter (offset voltage detection circuit) and an adder circuit in which the new station wave number is sufficiently lower than the signal component. The present invention is characterized in that by combining the offset voltage and the output of the filter in a forward or backward direction, the offset voltage can be reduced without being easily affected by initial value deviations and fluctuations of the elements.

Examples of embodiments of the present invention include the following means.

(1) Connect the output of the switched capacitor field to an adder circuit, connect the output of this adder circuit to an offset voltage detection circuit with a gain of n, and further connect the output of the offset voltage detection circuit to the above adder circuit (feedback) By doing so, it is combined with the output of the switched capacitor filter to obtain an output voltage with automatically reduced offset voltage.

(2) By connecting the output of the switched capacitor filter to an offset voltage detection circuit with a gain of 1, and further connecting the above offset voltage detection circuit and the output of the switched capacitor filter to an adder circuit, the offset voltage can be automatically adjusted. to obtain an output voltage with reduced offset voltage.

(3) By connecting the output of the switched capacitor filter to an offset voltage detection circuit with a gain of n times, and further connecting the output of the offset voltage detection circuit to the + side terminal of the operational amplifier of the switched capacitor filter, Combined with the output of the switched capacitor filter,
The offset voltage automatically allows a reduced output voltage to be obtained. In the methods (1) and (3) above, the offset voltage detection circuit is provided facing backward, and in the method (2), the offset voltage detection circuit is provided facing forward.

[Embodiments of the invention]

Embodiments of an automatic offset voltage compensation circuit for a switched capacitor filter according to the present invention will be described below with reference to the drawings. As shown in the figure, a known switched capacitor filter 1. Addition circuit 2. It is composed of an offset voltage detection circuit 3.

The adder circuit 2 shown in FIG. 1 includes switched capacitor equivalent resistances 4, 5, and 6. The offset voltage detection circuit 3 is composed of an operational amplifier 7, and has switched capacitor equivalent resistances 8 and 9. Capacitor 10. It consists of an operational amplifier 11.

Next, detailed circuits of the switched capacitor equivalent resistors 4, 5, and 6 forming the adder circuit 2 in FIG. 1 are shown in FIG. 2(a) and FIG. 2(b).

In FIGS. 2(a) and (b), analog switch 1
2, 13, 19, and 20 are ON when the clock signal in FIG. 3(a) is at the "H" level, and are OFF when the clock signal is at the "L" level. In addition, analog switches 14, 15,
17 and 18, the clock signal in FIG. 3(b) is "H"
It is ONL when the level is low, and OFF when the level is L''. By repeating these series of operations at the clock frequency f8, the equivalent resistance R shown in the following equation is realized.

(2) In the switched capacitor equivalent resistance shown in FIG. 2(a), a capacitor C□ or 01' is always connected between terminals A and B. Further, the switched capacitor equivalent resistance shown in FIG. 2(b) has a characteristic of inverting the polarity of the voltage at input terminal A and transmitting it to terminal B, that is, a characteristic as an inverter. Therefore, it is constructed with the switched capacitor equivalent resistance shown in FIGS. 2(a) and 2(b). The adder circuit 2 is an adder circuit that has a subtraction function because the - input terminal and the output terminal are not open, so the output is not saturated, and one of the inputs has the polarity inverted.

Next, in FIG. 1, a detailed circuit of the switched capacitor equivalent resistors 8 and 9 constituting the offset voltage detection circuit 3 is shown in FIG. 2 (Q). In FIG. 2(Q), the analog switches 22 and 23 are ONL when the clock signal in FIG. and 2
5 is turned on when the clock signal in FIG. 3(b) is at the "H" level, and turned off when it is at the 'L' level.By repeating these series of operations at the clock frequency f8,
The input side equivalent resistance R and the feedback side equivalent resistance R shown in the following equations can be realized.

In addition, the above-mentioned switched capacitor equivalent resistances R and R',
The time constant τ, gain coefficient K, and transfer function of the offset voltage detection circuit (3 in FIG. 1) constituted by the integrating capacitor Ca (10 in FIG. 1) are shown in the following equation.

ω, ω, ω.

FIG. 4(a) shows an example of the gain-frequency characteristic of the switched capacitor filter 1 shown in FIG. 1, where the center frequency is f.

FIG. 4(b) shows an example of the gain-frequency characteristics of the offset voltage detection circuit shown in FIG. 1.

The offset voltage detection circuit detects the DC component, which is the offset voltage, and applies it to the adder circuit with its polarity inverted. Therefore, as shown in Figure 4(b), in order to minimize the gain and phase error, must be sufficiently attenuated. Therefore, the offset voltage detection circuit (
According to equation 6), a large time constant is required.

Next, the present invention will be explained in detail.

In FIG. 1, a switched capacitor filter 1 includes:
When the sine wave voltage vi shown in Fig. 5(a) is input, the staircase waveform ■0 shown in Fig. 5(b), which includes an offset voltage v, 1 due to the offset of the operational amplifier and switching noise, is output. .

This output voltage V. By inputting the output voltage v,7 of the offset voltage detection circuit 3 with a gain of 1 and a gain of 1 to the adder circuit, the offset voltage is halved to 2, as shown in FIG. A staircase waveform va2 is output.

Furthermore, in FIG. 1, if the gain of the offset voltage detection circuit 3 is increased by, for example, 10 times, the output of the addition circuit 2 is
As shown in FIG. 5(d), a staircase waveform v,2' with a sufficiently small offset voltage v,2' is output.

That is, in FIG. 1, the offset voltage V can be reduced as the gain of the offset voltage detection circuit 3 is increased, as shown in FIG.

As described above, in the circuit shown in FIG. 1, by making the time constant and gain of the offset voltage detection circuit 3 sufficiently large, automatic offset compensation of the switched capacitor filter 1 becomes possible. Furthermore, it goes without saying that the offset voltage generated in the adder circuit 2 and the offset voltage detection circuit 3 can also be compensated for.

In FIG. 1, it goes without saying that the switched capacitor equivalent resistance of the adder circuit 2 and the offset voltage detection circuit 3 can be constructed from conventional resistance elements. Furthermore, when implemented as a monolithic IC, the adder circuit 2 can perform calculations using the capacitance ratio of the switched capacitor equivalent resistance on the input side and the feedback side, so that higher accuracy is possible. The offset voltage detection circuit 3 does not need to be highly accurate, and only needs to have a large time constant τ and gain. Therefore, an integrating capacitor 10 with a large capacity is provided outside the IC, and the switched capacitor equivalent resistance is replaced with a conventional resistance. It is also possible to configure it with elements (diffused resistors, etc.), and it can be realized in a sufficiently small area.

Next, FIG. 7 shows a second embodiment of the present invention.

30.

The adder circuit 2 shown in FIG. 7 is the adder circuit described in FIG. It consists of an operational amplifier 7. The offset voltage detection circuit 30 shown in FIG.
7. It consists of a capacitor 29° and an operational amplifier 28.

Next, in FIG. 7, a detailed circuit of the switched capacitor equivalent resistance 27 constituting the offset voltage detection circuit 30 is shown in FIG. 2(Q). In FIG. 2(Q), the analog switches 22 and 23 are ON when the clock signal of FIG. 3(a) is at the IIH13 level, and OFF when the clock signal is at the "L" level.

Further, the analog switches 24 and 25 are as shown in FIG. 3(b).
ONL, 'L' when the clock signal is at "H'" level.
By repeating these series of operations at the clock frequency f, the switch capacitor equivalent resistance R9 configured with the integral capacitor c4 shown in the following equation is turned off.
The time constant τ and transfer function of the offset voltage detection circuit are shown in the following equation.

ω・　　　　　　　　　　　　　　　ω.

FIG. 4(b) shows an example of the gain-frequency characteristics of the offset voltage detection circuit 30 shown in FIG. 7. In this case, since the operational amplifier 28 is of a voltage follower type, the gain coefficient is 1. In FIG. 7, the offset voltage detection circuit 30 detects a DC component that is an offset voltage,
In order to add the polarity directly to the adder circuit with inverted polarity,
), it is necessary to sufficiently attenuate the signal frequency domain in order to make the gain and phase errors extremely small. Therefore, the offset voltage detection circuit requires a larger time constant than equation (9), which is exactly the same as the embodiment shown in FIG. 1 above.

Next, the present invention will be explained in detail.

In FIG. 7, in the switched capacitor filter 1,
When the sine wave voltage Vi shown in FIG. 8(a) is input, a staircase waveform v,1 shown in FIG. 8(b) including an offset voltage V,1 due to the offset of the operational amplifier, switching noise, etc. is output. By inputting this output voltage v,1 to the offset detection circuit 30, the offset voltage v,1 can be detected as shown in FIG. 8(c). Furthermore, the output voltage V 61 of the switched capacitor filter 1 and the output voltage 1 of the offset voltage detection circuit are input to the adder circuit 2 . Therefore, the adder circuit 2 is as shown in FIG. 8(d).
As shown in , the slight offset voltage v generated by itself
, 3, the output voltage V is the signal component minus the offset voltage. 3 is obtained, and offset voltage can be automatically compensated.

The present invention is characterized in that the offset voltage detection circuit 30 has a gain coefficient of 1 in order to faithfully compensate for the offset voltage generated in the switched capacitor 1.

In FIG. 7, it goes without saying that the added circuit 2 and the offset voltage detection circuit 30 can be constructed by using conventional resistance elements as the switched capacitor equivalent resistance.

Furthermore, when converting into a monolithic IC, the adder circuit 2 is
As in FIG. 1, since calculations can be realized by increasing the capacitance of a switched capacitor equivalent resistance, high accuracy is possible. The offset voltage detection circuit does not need to be highly accurate; it only needs to have a gain of 1 and a sufficiently large time constant τ. Therefore, a large-capacity integrating capacitor is provided outside the IC, and the switched capacitor equivalent resistance is replaced with the conventional one. It is also possible to configure it with a resistive element (diffused resistor, etc.), and it can be realized in a sufficiently small area.

Filter 39. It is composed of an offset voltage detection circuit 3.

The switched capacitor band pass filter 39 shown in FIG. 9 has switched capacitor equivalent resistances 31, 32, 3
3 and 34, capacitors 35 and 36, operational amplifier 37
and 38.

Next, in FIG. 9, detailed circuits of the switched capacitor band-pass filter 39 and the switched capacitor equivalent resistances 31, 32, 33 and 34 that constitute the offset voltage detection circuit 3 are shown in FIGS. 2(Q) and (d). . Second
In FIGS. 3(c) and 3(d), the analog switches 22 and 23 are ON when the clock signal in FIG. 3(a) is at the H" level, and OFF when the clock signal is at the 'L' level. Further, the analog switches 24 and 25 are ON when the clock in FIG. 3(b) is at the "H" level, and OFF when the clock is at the "L" level.These series of operations are illustrated in FIG. The transfer function of the filter is shown in the following equation.

G = (10)s”
10-s+ω,'ω, New station wave number Q: Selectivity H: Gain coefficient Next, the present invention will be explained in detail.

In FIG. 9, when the sine wave voltage shown in FIG. 1(a) is input to the switched capacitor bandpass filter 39, the voltage shown in FIG. 10(b) including the offset voltage v0 due to operational amplifier offset and switching noise, etc. The staircase waveform V shown in FIG. 1 is output. This output voltage is input to the offset voltage detection circuit 3 with a gain of 1, and the output voltage of the offset voltage detection circuit 3 is further input to the + side input terminal of the operational amplifier 38 of the bandpass filter 39)
As a result, as shown in FIG. 10(c), a staircase waveform v,2 in which the offset voltage is halved to v,2 is output.

Furthermore, in FIG. 9, when the gain of the offset voltage detection circuit 3 is increased by a factor of 10, the output V of the switched capacitor band-pass filter 39 has an even smaller offset voltage, as shown in FIG. 10(d). vv
A staircase waveform v,2' reduced to , ,' is output.

That is, in FIG. 9, the offset voltage V can be reduced as the gain of the offset voltage detection circuit 3 is increased, as shown in FIG.

From the above, in the circuit of FIG. 9, offset voltage detection times! ! By making the time constant and gain of 83 sufficiently thick, the switched capacitor band pass filter 39
Offset automatic compensation is possible. Furthermore, it goes without saying that in the switched capacitor band-pass filter shown in FIG. 9, the offset voltage detection circuit 3 can configure the switched capacitor equivalent resistance with a conventional resistance element (such as a diffused resistor) to add the offset voltage and the signal component.

Furthermore, when fabricating a monolithic IC, the offset voltage detection circuit 3 does not need to be highly accurate, and only needs to have a large time constant τ and gain, so an integrating capacitor 10 with a large capacity is provided outside the ID. By configuring the switched capacitor equivalent resistance with a conventional resistance element (diffused resistance, etc.), it can be realized in a small area.

Furthermore, automatic offset compensation is possible not only for bandpass filters but also for lowpass filters. FIG. 12 shows a configuration example of an automatic offset voltage compensation circuit for a switched capacitor low-pass filter. In FIG. By connecting to the + side terminal of the operational amplifier 37, the offset voltage of the operational amplifier and the offset voltage generated by the switching operation can be suppressed in the switched capacitor filter according to the present invention as described above. Since it can be automatically compensated and the offset voltage extraction section can be realized with rough accuracy, it is possible to sufficiently deal with initial value deviations and fluctuations of the elements, and the characteristics of the switched capacitor filter can be greatly improved. Therefore, the practical advantages are very large.

[Brief explanation of drawings]

FIG. 1 shows a first embodiment of an automatic offset voltage compensation circuit for a switched capacitor filter according to the present invention, FIG. 2 is a circuit diagram showing an example of a switched capacitor equivalent resistance, and FIG.
The figure is a waveform diagram showing the drive waveform of the switching element, and FIG. 4 is an example of the gain-frequency characteristics of the switched capacitor filter and offset voltage detection circuit in the first embodiment.
FIG. 5 is a waveform diagram showing the waveforms of various parts in the first embodiment, FIG. 6 is the offset voltage with respect to the gain of the offset voltage detection circuit in the first embodiment, and FIG. 7 is the offset of the switched capacitor filter according to the present invention. A second embodiment of the automatic voltage compensation circuit, FIG. 8 is a waveform diagram showing waveforms of various parts in the second embodiment, and FIG. 9 is a third embodiment of the automatic offset voltage compensation circuit for a switched capacitor filter according to the present invention. For example, Fig. 10 is a waveform diagram showing the waveforms of each part in the third embodiment, Fig. 11 is the offset voltage with respect to the gain of the offset detection circuit in the third embodiment, and Fig. 12 is the waveform diagram of the third embodiment. A modified example is shown.

Claims (1)

[Scope of Claims] 1. In a switched capacitor filter composed of an operational amplifier, a switching element switched at a predetermined frequency, and a capacitor, a circuit for detecting a DC component from the output of the switched capacitor filter is configured to face the switched capacitor. Alternatively, an automatic offset compensation circuit for a switched capacitor filter, which is provided facing backward and is combined with the output of the switched capacitor filter circuit. 2. In the above item 1, the filter output is connected to an adder circuit, the adder circuit output is connected to a DC component detection circuit with a gain of n times, and the DC component detection circuit output is feedback-connected to the adder circuit. An offset automatic compensation circuit characterized by: 3. In the first term above, the filter output has a gain of 1.
An automatic offset compensation circuit characterized in that it is connected to a double DC component detection circuit, and further inputs the DC component detection circuit and the filter output to an adder circuit. 4. In the first term above, the filter output has a gain of n
An automatic offset compensation circuit characterized in that it is connected to a double DC component detection circuit, and its output is connected as a feedback to the + side terminal of an operational amplifier in the above-mentioned switched capacitor filter.