JPS61196559A - Resin sealed semiconductor device - Google Patents
Resin sealed semiconductor deviceInfo
- Publication number
- JPS61196559A JPS61196559A JP60036972A JP3697285A JPS61196559A JP S61196559 A JPS61196559 A JP S61196559A JP 60036972 A JP60036972 A JP 60036972A JP 3697285 A JP3697285 A JP 3697285A JP S61196559 A JPS61196559 A JP S61196559A
- Authority
- JP
- Japan
- Prior art keywords
- conductive
- region
- conductive supporting
- mold layer
- support plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Description
【発明の詳細な説明】 〔発明の技術分野〕 本発明は、樹脂封止型半導体装置に関する。[Detailed description of the invention] [Technical field of invention] The present invention relates to a resin-sealed semiconductor device.
従来、パワートランジスタアレー等の半導体素子と放熱
板とが絶縁された樹脂封止型半導体装置は、動作時に発
熱するだめこの熱を外部に放出する放熱構造を採用して
いる。第３図はその一例を示すものであシ、図中１は、
両面にメタライズ層２を形成したアルミナ基板である。Conventionally, a resin-sealed semiconductor device in which a semiconductor element such as a power transistor array and a heat sink are insulated has adopted a heat dissipation structure that emits heat to the outside when it generates heat during operation. Figure 3 shows an example of this, and 1 in the figure is
This is an alumina substrate with metallized layers 2 formed on both sides.
一方のメタライズ層２上には、半導体素子３及びリード
フレーム４の一端部が装着されている。On one metallized layer 2, a semiconductor element 3 and one end of a lead frame 4 are mounted.
リードフレーム４と半導体素子３の電極間には、アルミ
細線からなるデンディング線５が架設されている。他方
のメタライズ層２は、金属放熱板６上に装着されている
。なお、同図中７は、リードフレーム４の一端部を外部
に導出し、がっ、金属放熱板６０所定領域を外部に露出
するようにしてアルミナ基板１、半導体素子３等を一体
に封止したモールド層である。このように構成された樹
脂封圧型半導体装置は、リードフレーム４を半田によっ
てアルミナ基板１に固着する必要がちるため製造工程が
複雑になる。また、アルミナ基板１が高価なため製造コ
ストが高くなる問題がある。Between the lead frame 4 and the electrodes of the semiconductor element 3, a bending wire 5 made of a thin aluminum wire is installed. The other metallized layer 2 is mounted on the metal heat sink 6. Note that 7 in the same figure shows one end of the lead frame 4 being brought out to the outside, and a predetermined area of the metal heat sink 60 being exposed to the outside, thereby sealing the alumina substrate 1, the semiconductor element 3, etc. together. This is the mold layer. The resin-sealed semiconductor device constructed in this manner requires a complicated manufacturing process because it is necessary to fix the lead frame 4 to the alumina substrate 1 with solder. Furthermore, since the alumina substrate 1 is expensive, there is a problem in that the manufacturing cost becomes high.
第４図は、従来の樹脂封止型半導体装置の他の例を示し
ている。図中１０は、アルミ鋼張絶縁基板である。アル
ミ銅張絶縁基板１０上には、接着剤層１ノを介して銅箔
１２が貼着されている。銅箔１２上には、リードフレー
ム１３のマウントヘッド部が固着されている。マウント
ヘッド部上には、半導体索子１４が装着されている。半
導体素子１４の電極とリードフレーム１３間には、ビン
ディング線１５が架設されている。FIG. 4 shows another example of a conventional resin-sealed semiconductor device. 10 in the figure is an aluminum steel-clad insulating substrate. A copper foil 12 is adhered onto the aluminum copper-clad insulating substrate 10 with an adhesive layer 1 interposed therebetween. A mount head portion of a lead frame 13 is fixed onto the copper foil 12. A semiconductor cord 14 is mounted on the mount head. A binding wire 15 is installed between the electrode of the semiconductor element 14 and the lead frame 13.
なお、同図中１６は、リードフレーム１３の一端部を外
部に導出し、かつ、アルミ鋼張絶縁板１００所定領域を
外部に露出するようにして銅箔１２、半導体素子１４等
を一体に封止したそ一ルド層である。このような樹脂封
止型半導体装置は、リードフレーム１３を半田によって
銅箔１２上に固着するため製造工程が複雑になる。In addition, 16 in the figure is a structure in which the copper foil 12, the semiconductor element 14, etc. are integrally sealed by leading one end of the lead frame 13 to the outside and exposing a predetermined area of the aluminum steel-clad insulating board 100 to the outside. This is the first layer that has stopped. Such a resin-sealed semiconductor device has a complicated manufacturing process because the lead frame 13 is fixed onto the copper foil 12 with solder.
また、アルミ鋼張絶縁板１ｏが高価なため製造コストが
高くなる問題がある。Furthermore, since the aluminum steel-clad insulating plate 1o is expensive, there is a problem in that the manufacturing cost becomes high.
第５図は、これらの問題を解消するために開発された樹
脂封止型半導体装置である。図中２０は、半導体素子２
１をマウント部に装着すると共に、半導体素子２１との
間にメンディング線２２を架設して回路配線を構成した
リードフレームである。リードフレーム２０の素子非装
着面と所定の絶縁間隔を保って金属基板２３が配置され
ている。リードフレーム２００所定領域及び金属基板２
３０所定面が外部に導出するようにして高熱伝導樹脂か
らなるモールド層２４により、半導体素子２１、デンデ
ィング線２２等が封止されている。このような樹脂封止
型半導体装置は、第６図囚俤）に示す如く、トランスフ
ァーモールド法によりモールド層２４を形成する際の樹
脂の注入圧力によシリードフレーム２０が変形し、所定
のリード間耐圧が得られな 。FIG. 5 shows a resin-sealed semiconductor device developed to solve these problems. 20 in the figure is a semiconductor element 2
1 is attached to a mount portion, and a mending wire 22 is installed between the lead frame and a semiconductor element 21 to form circuit wiring. A metal substrate 23 is arranged with a predetermined insulating distance from the non-element mounting surface of the lead frame 20. Lead frame 200 predetermined area and metal substrate 2
30 A semiconductor element 21, a extending wire 22, etc. are sealed with a mold layer 24 made of a highly thermally conductive resin so that a predetermined surface thereof is exposed to the outside. In such a resin-sealed semiconductor device, as shown in FIG. 6, the series lead frame 20 is deformed by the injection pressure of the resin when forming the mold layer 24 by the transfer molding method, and the series lead frame 20 is deformed to form a predetermined lead. The breakdown voltage cannot be obtained.
い問題がある。There is a problem.
本発明は、熱特性が安定して信頼性が高いと共に、リー
ド間耐圧が高く、シかも安硬な樹脂封止型半導体装置を
提供することをその目的とするものである。SUMMARY OF THE INVENTION An object of the present invention is to provide a resin-sealed semiconductor device that has stable thermal characteristics and high reliability, has a high inter-lead breakdown voltage, and is durable and durable.
本発明は、モールド層の内部及びモールド層から導出し
た所定領域の導電性支持板の肉厚を他の領域よりも厚く
シ、かつ、導電性支持板の素子非装着に所定間隔で対向
して放熱板を設けたことにより、熱特性が安定して信頼
性が高いと共に、リード間耐圧が高く、シかも安価な樹
脂封止製半導体装置である。The present invention is characterized in that the thickness of the conductive support plate in a predetermined area led out from the inside of the mold layer and from the mold layer is thicker than in other areas, and that the conductive support plate is opposed at a predetermined interval from the non-mounted element on the conductive support plate. By providing a heat sink, this resin-sealed semiconductor device has stable thermal characteristics and high reliability, has a high inter-lead breakdown voltage, and is inexpensive.
以下、本発明の実施例について図面を参照して説明する
。第１図（Ａ） （Ｂ） （Ｃ）は、本発明の一実施例
の構成を示す説明図である。図中３０は、所定パターン
の厚肉領域３１と薄肉リード領域３２とからなる導電性
支持板である。厚肉領域３１の肉厚は例えば１．５ ｍ
に設定され、薄肉リード領域３２の肉厚は０．６ ｗｘ
に設定されている。厚肉領域３１の主面には、所定の仕
様を満足した半導体素子３３が高融点半田（３００〜３
５０℃）を介して装着されている。導電性支持板３０の
近傍には、厚肉領域と薄肉領域からなる導電性細片３４
が導電性支持板３０とほぼ同一平面上に配置されている
。厚肉領域及び薄肉領域の肉厚は、導電性支持板３０と
ほぼ同様の値に設定されている。半導体素子３３の電極
と導電性細片３４との間には、例えば２００μｍφのＡ
Ｌ線からなる導電性細線３５が超音波？ンディングによ
り架設されている。導電性支持板３０の素子非装着面と
対向する側には、所定の間隔を設けて放熱板３６が設け
られている。半導体素子３３、導電性細線３５、導電性
支持板３０、導電性細片３４及び放熱板３６は、第２図
（４）■）に示す如く、導電性支持板３０及び導電性細
片３４の厚肉領域３１の所定部分と薄肉リード領域３２
、薄肉領域を外部に導出すると共に、放熱板３６の所定
の面を外部に露出するようにして高熱伝導性の樹脂から
なるモールド層３７によシ一体に封止されている。なお
、放熱板３６は、放熱性に優れた金属で形成されている
。Embodiments of the present invention will be described below with reference to the drawings. FIGS. 1A, 1B, and 1C are explanatory diagrams showing the configuration of an embodiment of the present invention. In the figure, numeral 30 denotes a conductive support plate consisting of a thick region 31 and a thin lead region 32 in a predetermined pattern. The thickness of the thick region 31 is, for example, 1.5 m.
The thickness of the thin lead region 32 is 0.6 wx.
is set to . On the main surface of the thick region 31, a semiconductor element 33 that satisfies predetermined specifications is coated with high melting point solder (300 to 3
50°C). Near the conductive support plate 30, there is a conductive strip 34 consisting of a thick region and a thin region.
are arranged substantially on the same plane as the conductive support plate 30. The thicknesses of the thick region and the thin region are set to approximately the same values as those of the conductive support plate 30. Between the electrode of the semiconductor element 33 and the conductive strip 34, there is, for example, an A of 200 μmφ.
Is the conductive thin wire 35 made of L wire an ultrasonic wave? The bridge was constructed by grounding. A heat dissipation plate 36 is provided at a predetermined interval on the side of the conductive support plate 30 that faces the non-element mounting surface. The semiconductor element 33, the conductive thin wire 35, the conductive support plate 30, the conductive strip 34, and the heat sink 36 are connected to the conductive support plate 30 and the conductive strip 34, as shown in FIG. A predetermined portion of the thick region 31 and the thin lead region 32
, the thin area is led out to the outside, and a predetermined surface of the heat sink 36 is exposed to the outside, and is integrally sealed with a mold layer 37 made of a highly thermally conductive resin. Note that the heat sink 36 is made of metal with excellent heat dissipation properties.
このように構成された樹脂封止型半導体装置ＬＡによれ
ば、モールド層３７内に埋設された導電性支持板３０及
び導電性細片３４は、十分に厚肉の領域に設されている
。また、導電性支持板３０と放熱板３６との間には、適
度な間隔が設けられている。このためモールド層３７を
形成する際のトランスファーモールド処理によって発生
する圧力による影響を抑えて、導電性支持板３０及び導
電性細片３４が変形するのを防止することができる。こ
のため、導電性支持板３０、導電性細片３４、放熱板３
６の配置を所定のものに保って絶縁耐圧の低下を防止す
ることができる。また、これにより安定した放熱特性を
得ることができると共に、導電性細線３５の剥れを防止
して素子の信頼性を向上させることができる。また、外
部リードとなる外部に導出された導電性細片３４は、モ
ールド層３７の付根部で厚肉であるため、その配置状態
を所定のものに正しく保持して、隣接するものとの間隔
を適正なリードピッチに保つことができる。According to the resin-sealed semiconductor device LA configured in this way, the conductive support plate 30 and the conductive strip 34 buried in the mold layer 37 are provided in a sufficiently thick region. Further, an appropriate distance is provided between the conductive support plate 30 and the heat sink plate 36. Therefore, the influence of pressure generated by the transfer molding process when forming the mold layer 37 can be suppressed, and deformation of the conductive support plate 30 and the conductive strips 34 can be prevented. For this reason, the conductive support plate 30, the conductive strip 34, the heat sink 3
By keeping the arrangement of 6 at a predetermined value, it is possible to prevent a decrease in dielectric strength voltage. Moreover, this makes it possible to obtain stable heat dissipation characteristics, and also to prevent peeling of the conductive thin wires 35 and improve the reliability of the element. In addition, since the conductive strips 34 led out to the outside, which serve as external leads, are thick at the base of the mold layer 37, it is necessary to properly maintain the arrangement in a predetermined manner and maintain the distance between adjacent ones. can be maintained at an appropriate lead pitch.
このためリード間耐圧を向上させることができる。更に
、従来のように高価な部品を構成材料に使用する必要が
ないので製造コストを低減させることができる。Therefore, the breakdown voltage between the leads can be improved. Furthermore, manufacturing costs can be reduced because there is no need to use expensive parts as constituent materials as in the past.
以上説明した如く、本発明に係る樹脂封止型半導体装置
によれば、熱特性を安定にして信頼性を向上すると共に
、リード間耐圧を高くし、更に製造コストを低減するこ
とができるものである。As explained above, according to the resin-sealed semiconductor device according to the present invention, it is possible to stabilize thermal characteristics, improve reliability, increase lead-to-lead breakdown voltage, and further reduce manufacturing costs. be.
第１図（Ａ） （Ｂ） （Ｃ）は、本発明の一実施例の
構成を示す説明図、第２１囚の）は、同実施例の要部を
示す説明図、第３図乃至第５図は、従来の樹脂封止型半
導体装置の構成を示す説明図、第６図（４）の）は、従
来の樹脂封止型半導体装置の欠点を示す説明図である。
３０・・・導電性支持板、３１・・・厚肉領域、３２・
・・薄肉リード領域、３３・・・半導体素子、３４・・
・導電性細片、３５・・・導電性細線、３６・・・放熱
板、３７・・・モールド層、４０・・・樹脂封止型半導
体装置。
出願人代理人 弁理士 鈴 江 武 彦ＷＥ３図Figures 1 (A), (B), and (C) are explanatory diagrams showing the configuration of one embodiment of the present invention; FIG. 5 is an explanatory diagram showing the structure of a conventional resin-sealed semiconductor device, and FIG. 6 (4) is an explanatory diagram showing the drawbacks of the conventional resin-sealed semiconductor device. 30... Conductive support plate, 31... Thick wall region, 32...
...Thin lead region, 33...Semiconductor element, 34...
- Conductive strip, 35... Conductive thin wire, 36... Heat sink, 37... Mold layer, 40... Resin-sealed semiconductor device. Applicant's agent Patent attorney Takehiko Suzue WE3 diagram
Claims (1)
体素子と、この半導体素子に形成された電極と、厚肉領
域及び薄肉リード領域とからなり、かつ、厚肉領域の片
面に前記半導体素子を装着した導電性支持板と、この導
電性支持板とほぼ同一平面に配置され、厚肉領域及び薄
肉領域からなる導電性細片と、この導電性細片と前記電
極とを電気的に結ぶ導電性細線と、前記導電性支持板の
素子非装着面に対向して設けられた放熱板と、この放熱
板の所定領域を露出し、前記導電性細線、半導体素子、
導電性支持板及び導電性細片の厚肉領域の所定部分を埋
設するようにして設けられたモールド層とを具備するこ
とを特徴とする樹脂封止型半導体装置。A conductive device comprising a semiconductor element having at least one active or passive region, an electrode formed on the semiconductor element, a thick region and a thin lead region, and the semiconductor element is mounted on one side of the thick region. a support plate, a conductive strip disposed substantially on the same plane as the conductive support plate and consisting of a thick region and a thin region, and a conductive thin wire electrically connecting the conductive strip and the electrode; A heat dissipation plate provided opposite to the non-element mounting surface of the conductive support plate, a predetermined area of the heat dissipation plate exposed, and the conductive thin wire, the semiconductor element,
1. A resin-sealed semiconductor device comprising a conductive support plate and a mold layer provided to bury a predetermined portion of a thick region of a conductive strip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60036972A JPS61196559A (en) | 1985-02-26 | 1985-02-26 | Resin sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60036972A JPS61196559A (en) | 1985-02-26 | 1985-02-26 | Resin sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61196559A true JPS61196559A (en) | 1986-08-30 |
Family
ID=12484660
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60036972A Pending JPS61196559A (en) | 1985-02-26 | 1985-02-26 | Resin sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61196559A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63151055A (en) * | 1986-12-16 | 1988-06-23 | Matsushita Electronics Corp | Composite type semiconductor device |
| JP2003264265A (en) * | 2002-03-08 | 2003-09-19 | Mitsubishi Electric Corp | Power semiconductor device |
| JP2010032510A (en) * | 2008-07-21 | 2010-02-12 | Robert Bosch Gmbh | Casing for semiconductor component |
-
1985
- 1985-02-26 JP JP60036972A patent/JPS61196559A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63151055A (en) * | 1986-12-16 | 1988-06-23 | Matsushita Electronics Corp | Composite type semiconductor device |
| JP2003264265A (en) * | 2002-03-08 | 2003-09-19 | Mitsubishi Electric Corp | Power semiconductor device |
| JP2010032510A (en) * | 2008-07-21 | 2010-02-12 | Robert Bosch Gmbh | Casing for semiconductor component |
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