JPS61190949A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS61190949A JPS61190949A JP60031257A JP3125785A JPS61190949A JP S61190949 A JPS61190949 A JP S61190949A JP 60031257 A JP60031257 A JP 60031257A JP 3125785 A JP3125785 A JP 3125785A JP S61190949 A JPS61190949 A JP S61190949A
- Authority
- JP
- Japan
- Prior art keywords
- tube
- reaction tube
- cooling gas
- boat
- reaction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 41
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000000112 cooling gas Substances 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 7
- 239000012535 impurity Substances 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 abstract description 28
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 abstract description 10
- 230000000694 effects Effects 0.000 abstract description 7
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 5
- 239000010931 gold Substances 0.000 abstract description 5
- 229910052737 gold Inorganic materials 0.000 abstract description 5
- 229910052697 platinum Inorganic materials 0.000 abstract description 5
- 238000009792 diffusion process Methods 0.000 abstract description 2
- 239000012495 reaction gas Substances 0.000 abstract description 2
- 230000000903 blocking effect Effects 0.000 description 14
- 238000001816 cooling Methods 0.000 description 8
- 238000002347 injection Methods 0.000 description 5
- 239000007924 injection Substances 0.000 description 5
- 230000005855 radiation Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 241000406668 Loxodonta cyclotis Species 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、半導体装置の製造方法に係り、特に、キャ
リアライフタイムの低下に用いられる金または白金の拡
散後の半導体ウェハの急冷処理に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a rapid cooling treatment of a semiconductor wafer after diffusion of gold or platinum used to reduce carrier lifetime.
従来、半導体装置に高速スイッチング特性を付与するた
め、ライフタイムキラーとして半導体ウェハに対して金
または白金を必要温度で熱拡散する方法が実用化されて
いる。Conventionally, in order to impart high-speed switching characteristics to semiconductor devices, a method has been put into practical use in which gold or platinum is thermally diffused into a semiconductor wafer at a required temperature as a lifetime killer.
この方法では、処理温度下でのタイムキラーの状態を保
持する必要から、金または白金を熱拡散した後の半導体
ウェハを急速に冷却するのが通例である。In this method, it is customary to rapidly cool the semiconductor wafer after the gold or platinum has been thermally diffused, since it is necessary to maintain a time-killer state under the processing temperature.
この場合、半導体ウニへの冷却は、反応管の高温部から
半導体ウェハを載置した処理ボートを急速に取り出して
冷却する方法が採られている。In this case, the semiconductor wafer is cooled by rapidly taking out the processing boat on which the semiconductor wafer is placed from the high-temperature part of the reaction tube and cooling it.
半導体ウェハを急速に冷却する場合、反応管の高温部か
ら処理ボートを引き出しても、その熱容量のため、半導
体ウェハの急速な冷却を行うことができない。When rapidly cooling a semiconductor wafer, even if the processing boat is pulled out from the high temperature section of the reaction tube, the semiconductor wafer cannot be rapidly cooled due to its heat capacity.
特に、処理ボート上の半導体ウェハの枚数を増加させる
と、その熱容量が太き（なり、その急速冷却の効果は減
少し、１回の処理枚数を増加することができない。In particular, when the number of semiconductor wafers on a processing boat is increased, the heat capacity thereof becomes larger, the rapid cooling effect decreases, and the number of semiconductor wafers processed at one time cannot be increased.
また、反応管から処理ボートを引き出して冷却ガス雰囲
気中に半導体ウェハを設置する場合、その冷却用のＮ２
ガスが反応管に逆流し、反応管温度やその雰囲気を乱す
おそれがあり、また、反応管に近い側の半導体ウェハに
反応管の高温部からの熱輻射があるため、冷却しに＜＜
、冷却が不均一になるおそれがあった。In addition, when pulling out the processing boat from the reaction tube and placing the semiconductor wafer in a cooling gas atmosphere, N2
Gas may flow back into the reaction tube and disturb the reaction tube temperature and its atmosphere. Also, the semiconductor wafer on the side closer to the reaction tube is exposed to heat radiation from the high temperature part of the reaction tube, so it is difficult to cool down the semiconductor wafer.
, there was a risk of uneven cooling.
そこで、この発明は、反応管に対する冷却用ガスの逆流
を防止するとともに、反応管の高温部からの熱輻射を遮
断し、半導体ウェハを急速に冷却する半導体装置の製造
方法を提供しようとするものである。Therefore, the present invention aims to provide a method for manufacturing a semiconductor device that prevents the backflow of cooling gas into the reaction tube, blocks heat radiation from the high temperature portion of the reaction tube, and rapidly cools the semiconductor wafer. It is.
すなわち、この発明は、半導体ウェハに不純物を熱拡散
した後、反応管に対して連結したエレファントと称され
る延長管に前記半導体ウェハを設置するとともに、前記
延長管の連結側を遮断し、前記延長管の内部に冷却用ガ
スを充満させて前記半導体ウェハを急速に冷却する。That is, in the present invention, after thermally diffusing impurities into a semiconductor wafer, the semiconductor wafer is placed in an extension tube called an elephant connected to a reaction tube, the connection side of the extension tube is cut off, and the The semiconductor wafer is rapidly cooled by filling the extension tube with cooling gas.
したがって、この発明は、半導体ウェハの冷却に対して
反応管側の延長管の端部を遮断し、その延長管の内部に
冷却用ガスを充満させるので、延長管の遮断によって、
反応管の高温部からの熱輻射を遮蔽するとともに、反応
管に対する冷却ガスの影響を除去し、延長管内で半導体
ウェハを均一にかつ急速に冷却することを可能にしてい
る。Therefore, in this invention, the end of the extension tube on the reaction tube side is blocked from cooling the semiconductor wafer, and the inside of the extension tube is filled with cooling gas, so that by blocking the extension tube,
This shields heat radiation from the high-temperature part of the reaction tube, eliminates the influence of cooling gas on the reaction tube, and makes it possible to cool semiconductor wafers uniformly and rapidly within the extension tube.
以下、この発明の実施例を図面を参照して詳細に説明す
る。Embodiments of the present invention will be described in detail below with reference to the drawings.
第１図はこの発明の半導体装置の製造方法に用いる製造
装置の実施例を示している。FIG. 1 shows an embodiment of a manufacturing apparatus used in the method of manufacturing a semiconductor device of the present invention.
第１図において、反応管２に対して延長管４が設置され
、この延長管４の下側および上側の内壁部には、Ｎ２ガ
スなどの不活性ガスからなる冷却ガスを噴射する複数本
、この実施例では３本の噴射ノズル６が反応管２の長さ
方向に向かって設置され、その両端部は延長管４の外部
に引き出されて特定の冷却ガス源に連結され、第２図に
示すように、各噴射ノズル６に対して矢印Ｂで示す方向
から冷却ガスが供給される。この実施例の噴射ノズル６
は、細い管体の側壁部に複数の噴射孔８を形成したもの
である。In FIG. 1, an extension tube 4 is installed with respect to the reaction tube 2, and a plurality of tubes for injecting cooling gas made of an inert gas such as N2 gas are installed on the lower and upper inner walls of the extension tube 4. In this embodiment, three injection nozzles 6 are installed along the length of the reaction tube 2, and both ends thereof are drawn out to the outside of the extension tube 4 and connected to a specific cooling gas source, as shown in FIG. As shown, cooling gas is supplied to each injection nozzle 6 from the direction shown by arrow B. Injection nozzle 6 of this embodiment
1 has a plurality of injection holes 8 formed in the side wall of a thin tube.
また、延長管４の反応管２側の開口部近傍の内壁には、
第２図および第３図に示すように、延長管４を遮断する
ための遮断壁１０が設置され、延長管４の内部に移動可
能に設置される処理ボート１２の端面部にも遮断壁１４
が設置されている。In addition, on the inner wall near the opening of the extension tube 4 on the reaction tube 2 side,
As shown in FIGS. 2 and 3, a blocking wall 10 for blocking the extension pipe 4 is installed, and a blocking wall 10 is also installed at the end face of the processing boat 12 that is movably installed inside the extension pipe 4.
is installed.
この実施例では、遮断壁１０は、第２図に示すように、
２つの部分からなり、その一方は延長管４の内径に沿っ
た円環状でその下側をほぼ９０°の範囲で除いて処理ボ
ート１２の通路とした形状であり、その一方は処理ボー
ト１２の下側の部分を閉じる円弧状をなしている。In this embodiment, the barrier wall 10, as shown in FIG.
It consists of two parts, one of which is shaped like an annular ring along the inner diameter of the extension tube 4 and whose lower side is removed within a range of approximately 90° to form a passage for the processing boat 12 . It has an arc shape that closes the lower part.
一方、処理ボー１−１２の端面部に取り付けられた遮断
壁１４は、遮断壁１０と相互に延長管４を閉じる円板状
をなし、処理ボート１２は、反応管２と延長管４とが連
結された際に、矢印Ａで示す方向に移動させて反応管２
の内部に設置することが可能である。On the other hand, the blocking wall 14 attached to the end face of the processing boat 1-12 has a disc shape that mutually closes the extension tube 4 with the blocking wall 10. When connected, move the reaction tube 2 in the direction shown by arrow A.
It is possible to install it inside.
そして、処理ボート１２の上面には、複数枚の半導体ウ
ェハ１６を設置した補助ボート１８が載置され、半導体
ウェハ１６の延長管４への出入れは、この補助ボー１−
１８を以て行う。なお、処理ボー１−１２および補助ボ
ート１８は、熱容量を少なくするために軽量化するもの
とする。An auxiliary boat 18 on which a plurality of semiconductor wafers 16 are installed is placed on the top surface of the processing boat 12, and the semiconductor wafers 16 are taken in and out of the extension tube 4 from this auxiliary boat 18.
18. Note that the processing boat 1-12 and the auxiliary boat 18 are designed to be lightweight in order to reduce their heat capacity.
したがって、このような製造装置を用いて半導体装置を
製造する場合、第４図に示すように、矢印Ｃの方向に延
長管４を移動させ、反応管２に延長管４を結合させると
ともに、半導体ウェハ１６を載せた補助ボート１８は、
矢印りの方向から延長管４の内部に挿入し、第５図に示
すように、処理ボート１２の中央に載置する。Therefore, when manufacturing a semiconductor device using such a manufacturing apparatus, as shown in FIG. The auxiliary boat 18 carrying the wafers 16 is
It is inserted into the extension tube 4 from the direction indicated by the arrow, and placed in the center of the processing boat 12 as shown in FIG.
次に、第５図において、矢印Ｅに示すように、処理ボー
ト１２を延長管４から反応管２の内部に移動させ、反応
管２に矢印Ｇの方向から反応ガスを供給して金または白
金の熱拡散処理を行い、矢印Ｆで示す方向に処理ボート
１２を移送し、再び処理ボート１２を延長管４に移す。Next, in FIG. 5, as shown by arrow E, the processing boat 12 is moved from the extension tube 4 into the reaction tube 2, and a reaction gas is supplied to the reaction tube 2 from the direction of arrow G to produce gold or platinum. The processing boat 12 is transferred in the direction shown by arrow F, and then transferred to the extension tube 4 again.
その場合、処理ボート１２の遮断壁１４は、延長管４の
遮断壁１０に接触させて延長管４を閉じる。In that case, the blocking wall 14 of the processing boat 12 is brought into contact with the blocking wall 10 of the extension tube 4 to close the extension tube 4 .
次に、第６図に示すように、反応管２と延長管４とを分
離するとともに、噴射ノズル６に対して冷却ガス源から
冷却ガス２０を供給し、噴射ノズル６から延長管４の内
部に冷却ガス２０を供給し、半導体ウェハ１６を急速に
冷却した後、補助ボート１８とともに半導体ウェハ１６
を延長管４から取り出す。Next, as shown in FIG. 6, the reaction tube 2 and the extension tube 4 are separated, and the cooling gas 20 is supplied from the cooling gas source to the injection nozzle 6. After rapidly cooling the semiconductor wafer 16 by supplying the cooling gas 20 to the auxiliary boat 18, the semiconductor wafer 16 is
from the extension tube 4.
なお、実施例では延長管４の開口部側に遮断壁１０を形
成したが、第７図に示すように、反応管２と延長管４と
の間に両者を結合する補助延長管としてのアダプタ管２
２を設置し、その内部に同様の遮断壁１０を設置しても
よい。このようにした場合、延長管４の洗浄が容易にな
る。In the embodiment, the blocking wall 10 was formed on the opening side of the extension tube 4, but as shown in FIG. tube 2
2 may be installed, and a similar blocking wall 10 may be installed inside it. In this case, the extension tube 4 can be easily cleaned.
また、延長管４またはアダプタ管２２に設置した遮断壁
１０．１４の形状は、処理ボート１２が移動でき、かつ
、延長管４またはアダプタ管２２を遮断できる形状であ
れば、どのような形状でもよく、同様の効果が期待でき
る。Further, the shape of the blocking wall 10.14 installed on the extension pipe 4 or the adapter pipe 22 may be any shape as long as the processing boat 12 can be moved and the extension pipe 4 or the adapter pipe 22 can be blocked. Similar effects can be expected.
以上説明したように、この発明によれば、次のような効
果が得られる。As explained above, according to the present invention, the following effects can be obtained.
Ｔａ） 延長管の反応管側の開口部を遮断して延長管
に冷却用ガスを供給するので、半導体ウェハを強制的に
急速に冷却することができ、ライフタイムキラー効果を
持つ半導体装置が実現できる。Ta) By blocking the opening on the reaction tube side of the extension tube and supplying cooling gas to the extension tube, the semiconductor wafer can be forcibly cooled rapidly, realizing a semiconductor device with a lifetime killer effect. can.
（ｂｌ 延長管の反応管側の開口部を遮断するので、
冷却用ガスの反応管側への流入を防止でき、炉内温度へ
の影響を防止でき、雰囲気を乱すことがない。(bl Since the opening on the reaction tube side of the extension tube is blocked,
It is possible to prevent the cooling gas from flowing into the reaction tube side, prevent the influence on the temperature inside the furnace, and do not disturb the atmosphere.
（Ｃ） 延長管の反応管側の開口部を遮断するので、
反応管の高温部からの輻射熱の影響を防止でき、冷却効
果を高めることができるとともに、半導体ウェハ間の冷
却が均一になり、特性の均一化が実現できる。(C) Since the opening on the reaction tube side of the extension tube is blocked,
The influence of radiant heat from the high temperature part of the reaction tube can be prevented, the cooling effect can be enhanced, and the semiconductor wafers can be cooled uniformly, achieving uniform characteristics.
・ 第１図はこの発明の半導体装置の製造方法に用いる
製造装置の実施例を示す説明図、第２図は第１図のＩＩ
−ＩＩ線に沿う断面図、第３図は反応管および処理ボー
トの遮断壁を示す切欠き断面図、第４図ないし第６図は
半導体装置の製造方法を示す説明図、第７図は製造装置
の他の実施例を示す説明図である。
２・・・反応管、４・・・延長管、１０．１４・・・遮
断壁、１６・・・半導体ウェハ、２０・・・冷却ガス。- FIG. 1 is an explanatory diagram showing an embodiment of the manufacturing apparatus used in the method of manufacturing a semiconductor device of the present invention, and FIG. 2 is an illustration of II of FIG. 1.
3 is a cutaway sectional view showing the reaction tube and the blocking wall of the processing boat, FIGS. 4 to 6 are explanatory diagrams showing the method for manufacturing the semiconductor device, and FIG. 7 is the manufacturing method. It is an explanatory view showing other examples of a device. 2... Reaction tube, 4... Extension tube, 10.14... Blocking wall, 16... Semiconductor wafer, 20... Cooling gas.
Claims (1)
連結した延長管に前記半導体ウェハを設置するとともに
、前記反応管の連結側を遮断し、前記延長管の内部に冷
却ガスを充満させて前記半導体ウェハを急速に冷却する
ことを特徴とする半導体装置の製造方法。After thermally diffusing impurities into the semiconductor wafer, the semiconductor wafer is placed in an extension tube connected to the reaction tube, the connection side of the reaction tube is shut off, and the inside of the extension tube is filled with cooling gas. A method for manufacturing a semiconductor device, characterized in that the semiconductor wafer is rapidly cooled.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60031257A JP2610809B2 (en) | 1985-02-19 | 1985-02-19 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60031257A JP2610809B2 (en) | 1985-02-19 | 1985-02-19 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61190949A true JPS61190949A (en) | 1986-08-25 |
| JP2610809B2 JP2610809B2 (en) | 1997-05-14 |
Family
ID=12326297
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60031257A Expired - Lifetime JP2610809B2 (en) | 1985-02-19 | 1985-02-19 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2610809B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6468921A (en) * | 1987-09-09 | 1989-03-15 | Tel Sagami Ltd | Heat treatment of semiconductor wafer |
| JPH01296628A (en) * | 1988-05-25 | 1989-11-30 | Fujitsu Ltd | Equipment and method for manufacturing semiconductor device |
| JPH0470733U (en) * | 1990-10-30 | 1992-06-23 | ||
| US5300453A (en) * | 1992-03-27 | 1994-04-05 | Rohm Co., Ltd. | Method for producing semiconductor device |
| KR20020070769A (en) * | 2001-03-02 | 2002-09-11 | 미쓰비시덴키 가부시키가이샤 | Heat-Treatment Apparatus, Heat-Treatment Method Using the Same and Method of Producing a Semiconductor Device |
| JP2010141100A (en) * | 2008-12-11 | 2010-06-24 | Shin-Etsu Chemical Co Ltd | Diffusion furnace device and diffusion method |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5379389A (en) * | 1976-12-24 | 1978-07-13 | Nippon Telegr & Teleph Corp <Ntt> | Heat treatment apparatus for mos |
-
1985
- 1985-02-19 JP JP60031257A patent/JP2610809B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5379389A (en) * | 1976-12-24 | 1978-07-13 | Nippon Telegr & Teleph Corp <Ntt> | Heat treatment apparatus for mos |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6468921A (en) * | 1987-09-09 | 1989-03-15 | Tel Sagami Ltd | Heat treatment of semiconductor wafer |
| JPH01296628A (en) * | 1988-05-25 | 1989-11-30 | Fujitsu Ltd | Equipment and method for manufacturing semiconductor device |
| JPH0470733U (en) * | 1990-10-30 | 1992-06-23 | ||
| US5300453A (en) * | 1992-03-27 | 1994-04-05 | Rohm Co., Ltd. | Method for producing semiconductor device |
| KR20020070769A (en) * | 2001-03-02 | 2002-09-11 | 미쓰비시덴키 가부시키가이샤 | Heat-Treatment Apparatus, Heat-Treatment Method Using the Same and Method of Producing a Semiconductor Device |
| JP2010141100A (en) * | 2008-12-11 | 2010-06-24 | Shin-Etsu Chemical Co Ltd | Diffusion furnace device and diffusion method |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2610809B2 (en) | 1997-05-14 |
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