JPS61189681U - - Google Patents

Info

Publication number
JPS61189681U
JPS61189681U JP7357685U JP7357685U JPS61189681U JP S61189681 U JPS61189681 U JP S61189681U JP 7357685 U JP7357685 U JP 7357685U JP 7357685 U JP7357685 U JP 7357685U JP S61189681 U JPS61189681 U JP S61189681U
Authority
JP
Japan
Prior art keywords
signal
variable delay
delay means
video
clock signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7357685U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7357685U priority Critical patent/JPS61189681U/ja
Publication of JPS61189681U publication Critical patent/JPS61189681U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示すブロツク図、
第2図は従来例を示すブロツク図、第3図は再生
RF信号のスペクトラムを示す図である。 23,30……可変遅延回路、25,27……
イコライザ、26,28……電圧制御発振器(V
CO)。
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is a block diagram showing a conventional example, and FIG. 3 is a diagram showing a spectrum of a reproduced RF signal. 23, 30... variable delay circuit, 25, 27...
Equalizer, 26, 28...Voltage controlled oscillator (V
CO).

Claims (1)

【実用新案登録請求の範囲】 記録媒体を再生して得られるそれぞれ別キヤリ
アで変調された映像信号及び音声信号を検出し復
調する映像再生装置において、 前記映像信号の復調後の信号と復調前の前記音
声信号とに対する伝送路にそれぞれ独立に設けら
れた可変遅延手段と、 各可変遅延手段に対応して設けられ該可変遅延
手段を駆動するクロツク信号を発生するクロツク
信号発生手段と、 前記可変遅延手段を通過後の映像信号に基づき
異なる処理により前記クロツク信号発生手段の各
々に印加する遅延時間制御信号を得る信号処理手
段とを備えることを特徴とする時間軸変動補正装
置。
[Claims for Utility Model Registration] In a video playback device that detects and demodulates a video signal and an audio signal modulated with separate carriers obtained by playing back a recording medium, a signal after demodulation and a signal before demodulation of the video signal, variable delay means provided independently on the transmission path for the audio signal; clock signal generation means provided corresponding to each variable delay means for generating a clock signal for driving the variable delay means; and the variable delay means. 1. A time axis fluctuation correcting device comprising: signal processing means for obtaining a delay time control signal to be applied to each of the clock signal generating means through different processing based on the video signal passed through the means.
JP7357685U 1985-05-20 1985-05-20 Pending JPS61189681U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7357685U JPS61189681U (en) 1985-05-20 1985-05-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7357685U JPS61189681U (en) 1985-05-20 1985-05-20

Publications (1)

Publication Number Publication Date
JPS61189681U true JPS61189681U (en) 1986-11-26

Family

ID=30613075

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7357685U Pending JPS61189681U (en) 1985-05-20 1985-05-20

Country Status (1)

Country Link
JP (1) JPS61189681U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS586506A (en) * 1981-06-30 1983-01-14 Pioneer Video Corp Time axis correcting device for reproducing signal
JPS5934215U (en) * 1982-08-26 1984-03-02 シャープ株式会社 microwave oven

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS586506A (en) * 1981-06-30 1983-01-14 Pioneer Video Corp Time axis correcting device for reproducing signal
JPS5934215U (en) * 1982-08-26 1984-03-02 シャープ株式会社 microwave oven

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