JPS6118857B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an apparatus for aligning a mask and a wafer, and more particularly, the present invention relates to an apparatus for aligning a mask and a wafer, and in particular, an alignment pattern provided on a mask or a wafer is sliced by detection pulses of a scanning signal obtained along a scanning line. The present invention relates to an alignment device that automatically sets a level. For example, alignment patterns MP1 to MP4 provided on a mask or alignment pattern WP1 provided on a wafer.
~WP2 is located as shown in Figures 1 and 2a, and when laser scanning is performed as shown by solid lines A to B, the signal detected by the photodetector PD is as shown in Figure 2b. The digital pulse signal after amplitude discrimination is as shown in c in the same figure.

The signal in Fig. 2b is a pedestal signal PS (in Fig. b, a trapezoidal signal corresponding to the range from A to B in Fig. a) caused by the reflected light from the laser scanning area (on the solid line indicated by A to B). Mask signal M1,
It consists of M2, M3, M4 and wafer signals W1, W2. The amplitude and shape of these signals depend on the thickness of the resist applied to the wafer, the material of the wafer,
It varies considerably depending on various conditions such as the width of the pattern carved on the wafer, the step difference in etching, the pattern width and material of the mask, and the interference between the mask and the wafer. Furthermore, the DC level of the pedestal signal PS also changes from wafer to wafer. Furthermore, NS1 in Figure 2 a,
If dust is deposited on the laser scanning line as shown by NS2, NS3, NS4, N1, N2, N in Figure 2b
3, N4 false signals are added to show a complicated shape.

Conventional amplitude discrimination methods have no problem in detecting pulse signals with stable amplitudes, but it is difficult to perform amplitude discrimination on such signals and automatically extract only desired signals.

The present invention provides a method for automatically slicing a target signal at a variable voltage level even if the signal is as described above.

FIG. 3 shows an overall block diagram of an embodiment of a convenient device to which the present invention is applied.

The photodetector PD converts the reflected light from the mask and wafer into an electrical signal and applies it to the amplifier AM. The output of AM is the amplitude discrimination circuit LC according to the present invention.
Amplitude discrimination is performed so that only a predetermined number of pulses are passed, and the predetermined number of pulses obtained thereby are applied to C. C is a pulse interval counting circuit that calculates the intervals P1, P2, P of each pulse from LC.
3, P4, and P5 and send their respective outputs to the microprocessor M. Microprocessor M
confirms the position of the mask and wafer by referring to the values of each count P1 to P5, then performs the necessary calculations to align them to the correct position, and generates a signal to correct the misalignment between the mask and wafer. Provided to the drive motor control unit MC in the X, Y, and θ directions. In this way, the mask and wafer are properly aligned.

The detailed configuration of the amplitude discrimination circuit according to the present invention is explained in the fourth section.
The operation is shown in FIG. 5. In Figure 4,
CO1 and CO2 are comparators, CC1 and CC2 are 16
DA is a digital-to-analog converter, IH is an integrator with sample and hold function, TC is a timing circuit that controls the operation of the integrator, AD is an analog-to-digital converter, L is a data latch, B1, B2, B3, B4 indicates a three-state bus buffer, DC is a decoder, and C1 to C5 are pulse interval counting circuits. Further, 11, 12, 13, 14, 15, and 16 are lines that connect various parts of the circuit, and FIG. 5 shows the relationship between the timings of signals placed on these lines.

Next, the outline of its operation will be explained below.

In the case of the example in FIG. 2, the number of pulses to be detected is six; if there are more than that, the amplitude discrimination level is too low and noise etc. are also being counted, so the level must be increased. Also, if there are fewer than six, the level must be lowered somewhat.
In this way, we search for a level to accurately detect 6 pulses, and if found, we fix that level from now on, and then we start counting each interval of the 6 pulses to align the wafer and mask. .

Therefore, in FIG. 4, first, during the first scanning period T1 of the laser beam, the complement 10 of the predetermined number of pulses 6 to 16 is taken into the buffer B1 from the microprocessor M, and at the same time, it is taken into the hexadecimal counter CC1. Stored. It is also stored in buffer B2 and latch L, and stored in latch L. It is also taken into counter CC2. During this time T1, the comparator CO2 starts slicing operation at a voltage level _S0 near the ground potential, and the timing control circuit TC responds to this by driving the integrator IH, so the integrator IH is a mask on the line l1. and the integration of the detection signal from the wafer, as shown in Figure 5 l5.
It outputs an integral signal as shown in , and when it reaches saturation, its sample value is held. This hold value is close to the pedestal value of the wafer, for example S1.
voltage level. When the output of the comparator CO2 falls, this hold value is taken into the converter AD under the control of the timing control circuit TC and converted into a digital value. This S1 level digital value is taken into the microprocessor M and set to a counter value 2 to 3 higher than it, and this value is stored in the counter CC1 through the buffer B1. At this time, Batsuhua B
Since the output gate of 2 is closed under the control of M, the value of latch L does not change. Also, during the time T1, the output gate of the converter DA is also closed under the control of M, so no output is produced from the comparator CO1. In this way, during the first laser beam scanning period T1, the complementary value of the desired number of pulses is set to the latch L, the pedestal value of the wafer is measured, it is AD converted, and a value somewhat higher than that is set. Perform the work to set the counter CC1.

After this state setting is completed, when the second scan T2 of the laser beam begins as shown in the timing chart of FIG. 5, the reflected light from the mask and wafer starts to be detected again as an electric signal on the line l1 as described above. Data with a value 2 to 3 more than S1 stored in counter CC1 from M is converted to an analog value, for example, a voltage level of S1 + Δ, by converter DA and is applied to comparator CO1 via line l6, so the detection signal is sliced at level S1 + Δ. is,
The output signal is sent to the counter CC via line l3.
2. Therefore, the counter CC2 starts to be incremented by 1 sequentially from the current content 10, and the pulse M in FIG.
When counting 3 (seventh from the beginning), the hexadecimal counter CC2 has a count value of 17, which causes an overflow, and the gate G opens and sends a carry signal CR to the microprocessor M and the counter CC1. Inform. M detects this and uses a comparator
Determine that the CO1 level setting was inappropriate. Therefore, at this time, the values taken into the decoder DC and counted by C1 to C5 for each pulse interval are considered invalid and are not used for counting the next necessary pulse interval. This carry signal CR is also applied to the counter CC1, so the previous content S
The value of 1+Δ is further increased by +1. Further, since it is not necessary to measure the pedestal value of the wafer after T2, the output gate of buffer B3 is closed. Further, the counter CC2 is reset by the falling signal of the comparator CO2, and then stores the value 10 of the latch L again. At time T3, the contents of counter CC1 are increased by 1 from the previous contents (S1+Δ+1)
is converted by the converter DA, so the detection signal on line l1 is sliced at a level slightly higher than the slice level at T2. Even at this level, if the number of pulses detected is more than 6, T2
As in the case of , the carry signal CR is sent from the counter CC2.
appears and further increases the counter CC1 by 1 to further raise the slice level. Other operations are the same as at T2. Repeating this operation and gradually increasing the slice level of comparator CO1, for example, when time T5 comes as shown in Figure 5, the microprogram will indicate that the carry signal CR has not been generated within that time. Assume that the setter M has detected it. The output level of converter DA at that time is, for example, S2, and the output level of counter CC1 at that time is S2.
Open the output gate of buffer B4 to take the stored contents into M and store it. This stored content (digitized value of level S2) is the lowest level from which the desired number of pulses, 6, can be extracted accurately. Further, when M detects that the carry signal CR is not generated, the decoder DC decodes the division of each pulse, and the contents of the counters C1 to C5, which were counting the intervals of each pulse, are taken into M. If we explain the operation of this part in more detail,
When the first pulse M1 is applied to the decoder DC, the input gate of the counter C1 is opened, and the reference clock pulse CLK is taken into the counter C1 to perform a counting operation. Next, when the pulse M2 is applied to the decoder DC, the input gate of the counter C1 is closed, the input gate of the counter C2 is opened, and this time the input gate of the counter C1 is opened.
2 starts counting CLK. In this way, CLK is sent to the counters C1, C2, C3, C4, and C5 sequentially.
, the pulse intervals P1, P2, P3, P4, and P5 shown in FIG. 2c can be set as digital values in each of the counters C1 to C5. M takes in each value and compares, collates, and calculates each pulse interval value with the value of each pulse interval when the mask and wafer match exactly, and a motor Y, θ
By driving , the alignment will be performed correctly.

In the present invention, as described above, the pedestal value of the wafer is first measured, and the slicing operation is started from a level slightly above the pedestal value and gradually raised to detect the desired level. This makes it possible to align the wafer. FIG. 6 shows a flowchart of the aforementioned operation.

Generally, a pulse signal has a shape as shown in Figure 7a, and if noise appears at point A or B in the figure, the amplitude will be at a voltage level V1 or V2 that cuts A or B in the figure. After discrimination, Figure 7b,
As shown enlarged in Figure 7c, errors of Q1 and Q2 occur in the output of amplitude discrimination, respectively, but the amplitude discrimination occurs at a level where the slope of the pulse is steep, in the example of Figure 7, at point B. It is more advantageous to do so because there are fewer errors.

Therefore, by detecting the voltage level S4 at which the number of pulses that is one pulse less than the desired number of pulses is detected, and setting the intermediate value level S ³ = S ² + S ⁴ /2, stable and highly accurate pulse interval measurement can be achieved. It is possible to provide an amplitude discrimination method that allows for

That is, this time, the number 5, which is one less than the above-mentioned correct number of pulses of 6, is stored in the latch L and counter CC2 as a value of 11, which is the complement of 16. Further, the value of level S2 is stored in counter CC1 by the above operation, and CO1 is sliced at level S2 by scanning with a similar laser beam.
Therefore, the number of pulses is 6 and the counter CC
2. Since the counter CC2 is set to a number that is 1 less than before, a carry signal CR that was not generated in the previous case is generated, and in the same manner as above, the counter CC1 counts up by 1 and the slice level increases. is slightly higher than S2. After repeating the same operation several times, the number of pulses finally reaches 5, and the counter CC2 no longer generates the carry signal CR, so the slice level value S4 at this time is taken into M using the same method as last time. M performs the calculation S2+S ⁴ /2 to obtain S3.

This level S3 is the safest and most accurate with 6 pulses.
This is the level at which it is detected.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the mask and wafer of a convenient alignment device using the method of the present invention, FIG. 2 is a diagram explaining the signals detected from each pattern of the mask and wafer, and FIG. FIG. 4 is a basic block diagram of the alignment device, FIG. 4 is a partially detailed diagram thereof, FIG. 5 is an explanatory diagram of its operation, FIG. 6 is a diagram showing its flowchart, and FIG. 7 is an enlarged diagram of detected pulses. CO1, CO2...Comparator, IH...Integrator, AD, DA...Converter, CC1, CC2, C
1-C5...Counter, L...Latch.

Claims (1)

[Claims] 1. In an apparatus that scans an alignment pattern provided on a mask or a wafer along a scanning line, and aligns the mask and the wafer based on a scanning signal obtained by this scanning, The pulse number comparing means compares a desired number of pulses with the number of detected pulses of the scanning signal, and a level setting means sets a slice level of the detected pulse in response to control of the comparing means, the level setting means 1. An alignment device that aligns a mask and a wafer by detecting a desired number of pulses. 2. The alignment apparatus according to claim 1, wherein the level setting means includes means for calculating an average level of an upper limit and a lower limit of a desired level.