JPS6118780B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrated circuit device having a classification function that converts a set of codes arranged in an arbitrary order into an ordered set of codes permuted in a specified order.

BACKGROUND ART In an information processing device such as an electronic computer, a classification operation (so-called sorting) in which a large number of records (called records in electronic computers) are replaced in a specified order, for example, alphabetical order, is an important operation. Such classification work can be performed using a program stored in a storage device such as a computer, but in that case, high-speed processing is not possible and the central processing unit is used for other tasks during the classification work. There is a drawback that it cannot be done. Furthermore, it is also possible to realize a classification device using an integrated circuit or the like and perform classification work at high speed. However, in this case, the types of codes to be classified and the rules for ordering are fixed, and the classification lacks the flexibility of classification using a program built into the storage device of an electronic computer.

An object of the present invention is to provide a classification function integrated circuit device that is capable of high-speed processing and has flexibility similar to that of an electronic computer program.

The present invention is characterized in that a classification circuit network for arranging and changing inputs of a unique code system in a fixed order and a code conversion circuit connected to its input/output terminals are integrated on the same integrated circuit board.

According to this invention, high-speed processing of classification work is possible, and by preparing multiple types of code conversion circuits and selecting them according to the input code system, it is possible to perform the classification work with the same flexibility as in the case of a computer program. This makes it possible to perform classification tasks with flexibility.

Furthermore, according to the present invention, complex functions that would be practically impossible to implement using individual parts can be constructed in a simple and compact manner.

An embodiment of the present invention will be described with reference to the drawings. In Fig. 1, 11, 12, 13, and 14 are input terminal groups for the integrated circuit, and each of the four terminals has a
A 32-bit code can be entered. The 32-bit code that enters each input terminal may be a 4-character ASCII code, a binary integer, or an 8-digit binary code.
May be a decimal integer. In this embodiment, a set of elements of these 32-bit 4-character ASCII codes, binary integers, or 8-digit binary coded decimal integers is the object of classification. 21, 22, 23, and 24 are code conversion circuit groups that convert input codes into codes specific to a predetermined classification network, and 3 is a classification network.
It is sufficient for the classification circuit network 3 to perform classification based on the classification order relationship of the code system specific to the circuit network. In this embodiment, the four 32-bit codes input to the direct input terminal groups 41, 42, 43, and 44 to the classification circuit network 3 are regarded as 32-bit unsigned binary integers, and are rearranged in ascending order. Classification work is performed to directly output to output terminal groups 51, 52, 53, and 54. For example 41, 42, 43, 44
Assume that four 32-bit codes (expressed in hexadecimal numbers for simplicity) are input to each terminal group in the following order. (FAO8OEAO, 88AO1AEO,
CAOOEEAA, 1A1AOOOO) Then, the signals are output to the output terminal group 51, 52, 53, 54 in the following order. (1A1AOOOO,
(88AO1AEO, CAOOEEAA, FAO8OEAO) As in the above example, the classification circuitry 3 can only perform sorting of 32-bit unsigned binary integers in ascending order.

Reference numerals 61, 62, 63, and 64 are a group of code conversion circuits on the output side, which convert codes from a code system specific to the classification circuit network 3 to a code system required as an output. In this example, the necessary encoding system is created from a 32-bit unsigned binary integer, that is,
Convert to ASCII, binary integer, or 8-digit binary coded decimal number.

71, 72, 73, 74 are output terminal groups,
The classification results using the code system required on the output side are listed here in order. 8 is an input side code conversion circuit 21, 2
2, 23, and 24, and 81 is an input terminal for the control signal. Depending on whether the input code is regarded as an operator code, a binary number, or a binary coded decimal number, a predetermined signal is input to the control signal terminal 81 to drive the control circuit 8, and further the code conversion circuit group 21 , 22, 23, and 24 as to how to perform code conversion. 9 is a control circuit for the output side code conversion circuit groups 61, 62, 63, and 64, and 91 is an input terminal for the control signal. The output result of the classification circuit network 3 is output to the output terminal 7.
Required at 1, 72, 73, 74. ASCII2
The control circuit 9 controls this so that the code conversion circuit groups 61, 62, 63, and 64 can convert into which code system, base or binary coded decimal, according to the specification from the control signal terminal 91. .

FIG. 2 is a detailed diagram of the classification circuitry 3 in one embodiment shown in FIG. Classification circuit 3a, 3
b, 3c, 3d, and 3e each treat the 32-bit sign as a binary number without a positive or negative sign, and control which side to output as an output according to its magnitude. For example, in the classification circuit 3a, inputs to terminals 41 and 42 are regarded as 32-bit unsigned binary numbers, and the smaller one is outputted to the terminal 31 and the larger one is outputted to the terminal 32. In the classification circuit 3b, the smaller one of the codes on the terminals 43 and 44 is outputted to the terminal 33, and the larger one is outputted to the terminal 34. The classification circuit 3c outputs the smaller one of the codes on the terminal 31 and the terminal 33 to the terminal 51, and outputs the larger one to the terminal 35. The classification circuit 3d outputs the smaller one of the signs of the terminal 32 and the terminal 34 to the terminal 36, and outputs the larger one to the terminal 54. The classification circuit 3e outputs the smaller sign of the terminal 35 and the terminal 36 to the terminal 52, and the larger one to the terminal 53.

As described above, input terminals 41, 42, 4
Any four 32-bit signs on 3, 44 are output as binary numbers without positive or negative signs at output terminals 51, 52,
The terminals are arranged on 53 and 54 in such an order that the value of the terminal is the minimum and the value of the terminal 54 is the maximum.

FIG. 3 shows a specific example of the classification circuit 3a, and the other classification circuits 3b to 3e are all constructed in the same manner.
41 and 42 are 32-bit input terminals, and 311 and 312 are signal lines indicating whether the signals on the input terminals are valid. Input circuits 301 and 302 hold the input signals 311 and 312 when they indicate that they are valid, and output them to terminals 313 and 314, respectively.
Signal lines 315 and 316 indicate whether the outputs of the input circuits 301 and 302 are valid. signal line 31
When the AND circuit 306 determines that both signals 5 and 316 have become valid, the comparison circuit 303 is activated by its output. Comparison circuit 303 regards the signals at terminals 313 and 314 as 32-bit unsigned binary numbers and compares them in magnitude. As a result, if the sign on terminal 313 is smaller than the sign on terminal 314, "1" is sent to signal line 318 indicating the result.
Output. A signal line 317 is a signal indicating completion of comparison. Multiplexer 304 connects signal line 318
When is "1", the terminal 313 is selected and the signal is output to the terminal 31. Also, multiplexer 30
5, when the signal line 318 is "0", the terminal 314 is selected by a signal inverted by the inverter 304, and the signal is outputted to the terminal 32. Signal line 3
19 and 320 output signals indicating whether the signals at terminals 31 and 32 are valid, respectively.

FIG. 4 shows a specific example of the input side code conversion circuit group 21, and the other code conversion circuit groups 22 to 24 have similar configurations. Although the code conversion circuit group on the input side will be described in detail here, the same applies to the code conversion circuit groups 61 to 64 on the output side. The code conversion circuit group 21 includes three types of code conversion circuits 2a,
2b and 2c are arranged in parallel. The conversion code selection terminal 81 receives a signal specifying whether the input code is to be regarded as a binary number with plus/minus signs, an ASCII code, or an 8-digit binary coded decimal code. When a “00” signal is input to the conversion code selection terminal 81, the control circuit 8
outputs "1" to the signal line 801, and the signal line 80
2. Output “0” to the signal line 803. Then, the conversion circuit 2a performs a conversion operation, converting the sign of the input terminal from a binary number with a plus/minus sign to a binary number without a plus/minus sign, and outputs it to the output terminal 41. Further, when the conversion operation is completed, the signal line 201 changes from "0" to "1". However, when the signal line 801 is “0”, the signal line 201 is always “1”, and the signal line 801
When the signal line 201 becomes "1" and the conversion circuit 2a is selected, the signal line 201 becomes "0", and when the conversion operation is completed, the signal line 201 becomes "1". The conversion circuit 2b converts the ASCII code into an unsigned binary number according to the classification order, and the signal line 802 is "1".
Selected when . The operation of the signal line 202 is the same as that of the signal line 201. The conversion circuit 2c is 2
It converts an evolved decimal code into an unsigned binary number, and is selected when the signal line 803 is "1".
The operation of the signal line 203 is also the same as that of the signal line 201. In this way, the code conversion circuits 2a to 2c selectively operate according to the input code system, and when the conversion operation is completed, the output of the AND circuit 204 becomes "1", which is a signal indicating that a valid conversion operation has been performed. is served.

It should be noted here that in this example, the number of bits per code allowed for the input and output code systems must be equal to or less than that of the handling code system specific to the classification network. be.

In the above embodiment, the code conversion circuit is controlled from outside the integrated circuit to change the code system to be converted, but even if there is no such need and the input/output code system is fixed, the code conversion circuit part can be changed. The code system handled can be easily changed by changing only the configuration and design.
By doing so, the classification circuit network can be changed to handle other code systems without redesigning it, making the design easier.

Furthermore, by replacing the contents of the fields of a record with a code conversion circuit, it is also possible to change the priority order of the classification keys within the record. For example, the input code is a record with 4 characters, and the priority of the classification key specific to the classification circuit network is the first.
If the order of characters is 2nd character, 3rd character, and 4th character, if you want to give the 2nd character the highest priority, the input side code conversion circuit changes the 2nd character to the 1st character, then the 1st character. is replaced with the second character, inputted into the classification circuit network, and the output side code conversion circuit converts the second character and the first character.

Furthermore, if the input/output code conversion circuit is a program-controlled code conversion circuit with a built-in program, a more flexible classification function integrated circuit can be created by changing the program.

In the above embodiment, the number of input and output records is prepared for the code conversion circuit on both the input and output sides, but this is not always necessary and a multiplexer can be inserted between the classification circuit network and the code conversion circuit to convert the code conversion circuit. It is also possible to have one each for input and output.

The effects of this invention are listed below.

(1) It is possible to realize an integrated circuit that can classify into any code system without changing the configuration of the classification circuit network, and it is easy to design a classification function integrated circuit.

(2) By controlling the code conversion circuit externally, a general-purpose classification function integrated circuit can be realized.

(3) By realizing a classification circuit network and a code conversion circuit on the same integrated circuit board, an extremely compact classification function integrated circuit capable of high-speed processing can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a schematic configuration diagram of an embodiment of the present invention, FIG. 2 is a diagram showing the configuration of the classification circuit network in detail, FIG. 3 is a diagram showing the configuration of one classification circuit in detail, Similarly, FIG. 4 is a diagram showing the configuration of the input side code conversion circuit in detail. 3...Classification network, 3a, 3b, 3c, 3d, 3
e...Classification circuit, 301+302...Input circuit, 30
3... Comparison circuit, 304, 305... Multiplexer, 21-24, 61-64... Code conversion circuit group,
2a, 2b, 2c... code conversion circuit, 8, 9... control circuit.

Claims (1)

[Claims] 1. A classification circuit network that rearranges the input of a unique code system into a certain order, and a first code that is connected to the input end of this classification circuit network and converts a predetermined code system into a code system that can be processed by the classification circuit network. a second code converting circuit group connected to the output end of the classification circuit network and converting a code system output from the circuit network into a code system input to the first code converting circuit group; The first and second code conversion circuit groups are each composed of complex types of code conversion circuits for different code systems, and these code conversion circuits are configured in accordance with the input code system. A classification function integrated circuit device characterized in that: