JPS61187257A - Vessel for integrated circuit - Google Patents

Vessel for integrated circuit

Info

Publication number
JPS61187257A
JPS61187257A JP60027092A JP2709285A JPS61187257A JP S61187257 A JPS61187257 A JP S61187257A JP 60027092 A JP60027092 A JP 60027092A JP 2709285 A JP2709285 A JP 2709285A JP S61187257 A JPS61187257 A JP S61187257A
Authority
JP
Japan
Prior art keywords
integrated circuit
transmitting window
ultraviolet
vessel
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60027092A
Other languages
Japanese (ja)
Inventor
Satoru Morino
森野　悟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP60027092A priority Critical patent/JPS61187257A/en
Publication of JPS61187257A publication Critical patent/JPS61187257A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To inhibit the quantity of projection of ultraviolet rays transmitted from an ultraviolet transmitting window within a range that data programmed and written to an UVEPROM are not erased by forming the window to the base of a dual-in-line type integrated circuit vessel. CONSTITUTION:An integrated circuit vessel 1 takes a dual-in-line type, and an ultraviolet transmitting window 2 is shaped to the base of the vessel 1. Since the integrated circuit vessel 1 is handled normally while the base is directed downward and mounted while the base is directed onto a substrate, beams are hardly projected to the ultraviolet transmitting window 2 directly when the ultraviolet transmitting window 2 is shaped to the base of the integrated circuit vessel 1. Beams are reflected by trays for transporting the integrated circuit vessel, conductive mats, conductive sponge, the substrate, desks, etc. as bodies existing around the ultraviolet transmitting window 2, and there are only beams including slightly projected ultraviolet rays. Accordingly, possibility of which ultraviolet rays in an extent that data programmed and written to an UVEPROM are erased are transmitted from the ultraviolet transmitting window 2 is eliminated approximately.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、紫外線消去可能なプログラマブル・ＩＪ−）
”−オｙｌＪ−メモ＋）−ＩＣ（ＵＶＥＰＲＯＭと通称
されるので、以下ではこの通称を用いる）用の、紫外線
透過窓付デュアル・イン・ライン型集積回路容器に関す
る。[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a programmable IJ-) that can be erased by ultraviolet rays.
This invention relates to a dual-in-line integrated circuit container with an ultraviolet-transmissive window for an IC (commonly called UVEPROM, so this common name will be used below).

〔従来の技術〕[Conventional technology]

従来の集積回路容器は、第２図（ａ）　、　（ｂ）　、
　（Ｃ１に示すように、デュアル・イン・ライン型集積
回路容器３の上面に、紫外線透過窓４が設けられ、この
紫外線透過窓４にカバーフィルム５が貼付されていた。Conventional integrated circuit containers are shown in FIGS. 2(a), (b),
(As shown in C1, an ultraviolet transmitting window 4 was provided on the upper surface of the dual-in-line integrated circuit container 3, and a cover film 5 was attached to the ultraviolet transmitting window 4.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このような従来のＵＶＥＰＲＯＭ用の集積回路容器３は
、その上面に、紫外線透過窓４が設けられておシ、通常
、前記集積回路容器４が、底面を下向きにして、取扱わ
れること、および、底面を基板上に向けて実装されるこ
とから、紫外線を含んだ光が存在する空間において、上
記紫外線透過窓４から透過してくる紫外線照射量が多く
なる可能性があり、一旦プログラムされ書き込まれたデ
ータが消去されないよう、紫外線の透過を防止するだめ
の、カバーフィルム５を上記紫外線透過窓４に貼らなけ
ればならないという欠点があった。Such a conventional integrated circuit container 3 for UVEPROM is provided with an ultraviolet light transmitting window 4 on its upper surface, and the integrated circuit container 4 is usually handled with the bottom surface facing downward; Since it is mounted with the bottom surface facing the substrate, in a space where light containing ultraviolet rays is present, there is a possibility that the amount of ultraviolet rays transmitted through the ultraviolet transmitting window 4 will be large. There is a drawback in that a cover film 5 that prevents the transmission of ultraviolet rays must be attached to the ultraviolet ray transmitting window 4 so that the stored data is not erased.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の集積回路容器は、プーアル・イン・ライン型で
あり、その底面に、紫外線透過窓を設けて構成される。The integrated circuit container of the present invention is of a pull-in-line type, and is configured with an ultraviolet-transmitting window on the bottom surface.

〔実施例〕〔Example〕

次に、本発明の実施例について、図面を参照して説明す
る。Next, embodiments of the present invention will be described with reference to the drawings.

第１図（ａ）　、　（ｂ）　、　（ｅ）は、本発明の一
実施例を示す底面図、正面図および側面図である。FIGS. 1(a), (b), and (e) are a bottom view, a front view, and a side view showing one embodiment of the present invention.

第１図に示す集積回路容器１は、デュアル・イン・ライ
ン型であシ、その底面に、紫外ｆＩＭ透過窓２が設けら
れている。The integrated circuit container 1 shown in FIG. 1 is of a dual-in-line type, and an ultraviolet fIM transmission window 2 is provided on the bottom surface thereof.

通常、集積回路容器１は、第１図（ａ）に示すように底
面を下向きにして取扱われ、底面を基板上に向けて実装
されることから、集積回路容器３の上面に紫外線透過窓
４が設けられていると、紫外線を含んだ光が存在する空
間においては、上記紫外線透過窓４に直接照射される紫
外線を含んだ光の量が多いのに対し、集積回路容器ｌの
底面に、上記紫外線透過窓２が設けられていると、この
紫外線透過窓２に直接照射される光は、はとんどなく、
上記紫外線透過窓２のまわりに存在する物体である集積
回路容器運搬用のトレイや、導伝性マット。Usually, the integrated circuit container 1 is handled with the bottom facing downward as shown in FIG. 1(a), and is mounted with the bottom facing the substrate. is provided, in a space where light containing ultraviolet rays exists, the amount of light containing ultraviolet rays that is directly irradiated onto the ultraviolet ray transmitting window 4 is large; When the ultraviolet ray transmitting window 2 is provided, the amount of light that is directly irradiated onto the ultraviolet ray transmitting window 2 is extremely small.
Objects that exist around the ultraviolet transmitting window 2 are a tray for transporting an integrated circuit container and a conductive mat.

導伝性スポンジ、基板や、机などによって反射されて、
かすかに照射される紫外線を含んだ光だけとなるため、
ＵＶＥＦＲＯＭにプログラムされ書き込まれたデータが
消去されてしまう程の、紫外線が、上記紫外線透過窓２
から透過してくる可能性は、はとんどなくなる。It is reflected by conductive sponges, circuit boards, desks, etc.
Because only light containing faint ultraviolet rays is emitted,
The ultraviolet rays are so strong that the data programmed and written in the UVEFROM will be erased.
There is almost no possibility that it will come through.

〔発明の効果〕〔Effect of the invention〕

通常、集積回路容器は、底面を下向きにして取扱われ、
底面を基板上に向けて実装されることから、以上説明し
たように、本発明の集積回路容器は、デュアルΦイン・
ライン型集槓回路容器の底面に、紫外線透過窓を設ける
ことによって、紫外線を含んだ光が存在する空間におい
て、上記窓から透過してくる紫外線照射量を、ＵＶＥＰ
ＲＯＭにプログラムされ書き込まれたデータが消去され
ない範囲内に抑えることが可能であり、上記紫外線透過
窓に、紫外線の透過を防止するための、カバーフィルム
を貼らなくてもよくなるという効果がある。Integrated circuit containers are usually handled with their bottoms facing down.
Since the integrated circuit container of the present invention is mounted with the bottom surface facing the substrate, as explained above, the integrated circuit container of the present invention has a dual Φ-in design.
By providing an ultraviolet ray transmitting window on the bottom of the line type integrated circuit container, in a space where light containing ultraviolet rays exists, the amount of ultraviolet rays transmitted through the window can be
It is possible to keep the data programmed and written in the ROM within a range where it will not be erased, and there is an effect that there is no need to apply a cover film to the ultraviolet ray transmitting window to prevent the transmission of ultraviolet rays.

【図面の簡単な説明】[Brief explanation of drawings]

第１図（ａ）　、　（ｂ）　、　（Ｃ）は本発明の一実
施例を示す底面図、正面図および側面図、第２図（ａ）
　、　（ｂ）　、　（Ｃ）は従来の紫外線透過窓付集柑
回路容器の一例を示す上面図、正面図および側面図であ
る。 １．３・・・・・・集積回路容器、２，４・川・・紫外
線透過窓、５・・−・・・カバーフィルム。 （ｂ）（り 隼　ｌ　図 ８２　図Figures 1 (a), (b), and (C) are a bottom view, front view, and side view showing one embodiment of the present invention, and Figure 2 (a)
, (b), and (c) are a top view, a front view, and a side view showing an example of a conventional filter container with an ultraviolet-transmitting window. 1.3... Integrated circuit container, 2, 4... Ultraviolet transmitting window, 5... Cover film. (b) (Rihayabusa l Figure 82

Claims (1)

【特許請求の範囲】[Claims] 紫外線透過窓が、デュアルインライン型集積回路の底面
に設けてあることを特徴とする集積回路容器。An integrated circuit container characterized in that an ultraviolet transmitting window is provided on the bottom surface of a dual in-line integrated circuit.
JP60027092A 1985-02-14 1985-02-14 Vessel for integrated circuit Pending JPS61187257A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60027092A JPS61187257A (en) 1985-02-14 1985-02-14 Vessel for integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60027092A JPS61187257A (en) 1985-02-14 1985-02-14 Vessel for integrated circuit

Publications (1)

Publication Number Publication Date
JPS61187257A true JPS61187257A (en) 1986-08-20

Family

ID=12211430

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60027092A Pending JPS61187257A (en) 1985-02-14 1985-02-14 Vessel for integrated circuit

Country Status (1)

Country Link
JP (1) JPS61187257A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009050839A (en) * 2007-08-27 2009-03-12 Jong Seung Chung High-speed tunnel fan with electrostatic filter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009050839A (en) * 2007-08-27 2009-03-12 Jong Seung Chung High-speed tunnel fan with electrostatic filter

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