JPS6118619U - Frequency characteristic adjustment circuit - Google Patents

Frequency characteristic adjustment circuit

Info

Publication number
JPS6118619U
JPS6118619U JP10229484U JP10229484U JPS6118619U JP S6118619 U JPS6118619 U JP S6118619U JP 10229484 U JP10229484 U JP 10229484U JP 10229484 U JP10229484 U JP 10229484U JP S6118619 U JPS6118619 U JP S6118619U
Authority
JP
Japan
Prior art keywords
circuit
adjustment circuit
frequency characteristic
variable resistor
characteristic adjustment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10229484U
Other languages
Japanese (ja)
Inventor
優 井田
Original Assignee
ヤマハ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ヤマハ株式会社 filed Critical ヤマハ株式会社
Priority to JP10229484U priority Critical patent/JPS6118619U/en
Publication of JPS6118619U publication Critical patent/JPS6118619U/en
Pending legal-status Critical Current

Links

Landscapes

  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Adjustable Resistors (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この考案の一実施例を示す回路図である。 第2図は、従来の周波数特性調整回路を示す回路図であ
る。 第3図は、第2図bにおける可変抵抗器VRIQの構造
を示す図である。 第4図は、第3図の可変抵抗器VRIQの特性図である
。 第5図は、笹2図bおよび第1図における可変抵抗器V
Rl3の構造を示す図である。 第6図は、第1図における可変抵抗器VRl4の構造を
示す図である。 10・・・入力端子、11・・・オペアンプ、12・・
・低音調整回路、13・・・高音調整回路、14・・・
出力端・子、VRI,VR2,VRIO,VR11,V
R12tVRI3,VRI4・・・可変抵抗器、VRi
la,VR12b,VRI3c,VR14c・・・導体
、VRIlb,VRI,2a,VRI3a,VR13b
,VRj4a,VR14b・抵塾体、20,21,23
,25・・・摺動子、22・・・調整用つまみ、24・
・・高音調整用つまみ。
FIG. 1 is a circuit diagram showing an embodiment of this invention. FIG. 2 is a circuit diagram showing a conventional frequency characteristic adjustment circuit. FIG. 3 is a diagram showing the structure of variable resistor VRIQ in FIG. 2b. FIG. 4 is a characteristic diagram of the variable resistor VRIQ of FIG. 3. Figure 5 shows the variable resistor V in Figure 2b and Figure 1.
FIG. 3 is a diagram showing the structure of Rl3. FIG. 6 is a diagram showing the structure of variable resistor VRl4 in FIG. 1. 10... Input terminal, 11... Operational amplifier, 12...
・Bass adjustment circuit, 13...Treble adjustment circuit, 14...
Output terminal/child, VRI, VR2, VRIO, VR11, V
R12tVRI3, VRI4...variable resistor, VRi
la, VR12b, VRI3c, VR14c...Conductor, VRIlb, VRI, 2a, VRI3a, VR13b
, VRj4a, VR14b・Resistive body, 20, 21, 23
, 25...Slider, 22...Adjustment knob, 24...
...Treble adjustment knob.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] コンデンサに可変抵抗器を並列接続した回路を有する低
音調整回路と、コンデンサに可変抵抗器を直列接続した
回路を有する高音調整回路とを帰還回路に具えたNF形
周波数特性調整回路において、前記低音調整回路および
前記高音調整回路の可変薇抗器が平坦特性指示位置でそ
れそれ開放状態となるようにしたことを特徴とする周波
数特性調整回路。
In the NF frequency characteristic adjustment circuit, the feedback circuit includes a bass adjustment circuit having a circuit in which a variable resistor is connected in parallel to a capacitor, and a treble adjustment circuit having a circuit in which a variable resistor is connected in series to a capacitor in a feedback circuit. A frequency characteristic adjustment circuit characterized in that the circuit and the variable resistor of the treble tone adjustment circuit are each in an open state at a flat characteristic indicating position.
JP10229484U 1984-07-05 1984-07-05 Frequency characteristic adjustment circuit Pending JPS6118619U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10229484U JPS6118619U (en) 1984-07-05 1984-07-05 Frequency characteristic adjustment circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10229484U JPS6118619U (en) 1984-07-05 1984-07-05 Frequency characteristic adjustment circuit

Publications (1)

Publication Number Publication Date
JPS6118619U true JPS6118619U (en) 1986-02-03

Family

ID=30661695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10229484U Pending JPS6118619U (en) 1984-07-05 1984-07-05 Frequency characteristic adjustment circuit

Country Status (1)

Country Link
JP (1) JPS6118619U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS497902B1 (en) * 1968-04-19 1974-02-22

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS497902B1 (en) * 1968-04-19 1974-02-22

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