JPS61185147U - - Google Patents

Info

Publication number
JPS61185147U
JPS61185147U JP6625085U JP6625085U JPS61185147U JP S61185147 U JPS61185147 U JP S61185147U JP 6625085 U JP6625085 U JP 6625085U JP 6625085 U JP6625085 U JP 6625085U JP S61185147 U JPS61185147 U JP S61185147U
Authority
JP
Japan
Prior art keywords
request
latching
dma
response
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6625085U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6625085U priority Critical patent/JPS61185147U/ja
Publication of JPS61185147U publication Critical patent/JPS61185147U/ja
Pending legal-status Critical Current

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  • Bus Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案によるDMA装置の一実施例を
示すブロツク図、第2図は同実施例におけるDM
A装置1のの制御系の一構成例を示すブロツク図
、第3図はDMA装置における処理内容を示すフ
ローチヤートである。 1……DMA装置、2……ソース側I/O装置
、3……デイステイネーシヨン側I/O装置、B
F……ラツチ用バツフア、FF……フリツプフロ
ツプ。
FIG. 1 is a block diagram showing an embodiment of a DMA device according to the present invention, and FIG. 2 is a DM device in the same embodiment.
FIG. 3 is a block diagram showing an example of the configuration of the control system of the A device 1. FIG. 3 is a flowchart showing the processing contents in the DMA device. 1...DMA device, 2...Source side I/O device, 3...Destination side I/O device, B
F...Latch buffer, FF...Flip-flop.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 外部リクエストによつてDMAによるデータ転
送を行なわせるものにおいて、ソース側のI/O
装置から送られてくるデータをソース側からのリ
クエストに応じて受けとり、その受けとつたデー
タをラツチさせる手段と、デイストネーシヨン側
からのリクエストに応じてそのラツチされている
データをデイストネーシヨン側のI/O装置に転
送させる手段とを設けたことを特徴とするDMA
装置。
In a device that performs data transfer using DMA based on an external request, the I/O on the source side
A means for receiving data sent from the device in response to a request from the source side and latching the received data, and a means for latching the received data in response to a request from the destination side. DMA characterized in that it is provided with means for transmitting data to an I/O device on the side of the system.
Device.
JP6625085U 1985-05-02 1985-05-02 Pending JPS61185147U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6625085U JPS61185147U (en) 1985-05-02 1985-05-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6625085U JPS61185147U (en) 1985-05-02 1985-05-02

Publications (1)

Publication Number Publication Date
JPS61185147U true JPS61185147U (en) 1986-11-18

Family

ID=30598977

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6625085U Pending JPS61185147U (en) 1985-05-02 1985-05-02

Country Status (1)

Country Link
JP (1) JPS61185147U (en)

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