JPS61179490A - Method and apparatus for transferring data indicating alphanumeric character, symbol or the like - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application] The present invention relates to direct memory access (DMA) controllers, and more particularly to DMA controllers for interfacing data processing equipment and high speed printing equipment. It is related to the controller.

[Prior art]

The data in at least one aspect with the alphanumeric characters is stored in memory for subsequent display or printout by a computer. . Alphanumeric characters, symbols, etc. stored in computer memory may be used for display on a cathode ray tube (CRT) or for hard copy printing using one of a variety of computer printers. , may be transferred to the video display buffer. The speed at which a data processing device can print data is generally limited by the speed of a particular printer or printing device. For example, daisy-wheel printing devices are generally slower than high speed dot matrix printing devices and line printers. Therefore, the printing speed of the device is not limited by the processing speed of the computer, but rather by the printing speed of the particular printing device. Recently, laser printing devices have become commercially available. Laser marking devices are capable of very high printing speeds at a moderate cost and can produce graphical representations not possible with conventional daisy wheel printing devices or high speed dot matrix printing devices. In addition to graphics, laser printing devices allow the user to print various objects using various fonts stored in random access memory (RAM) or read only memory (ROM). Magazine “High Technology (HLgh T@ehnolog)
y) J Vol. 4, No. 9, September 1984 issue, page 52, "Laser printing device
as@r Pr1nters Zap Pr1ceBa
See rri@r)J.

In order to obtain maximum efficiency and speed with modern printing devices, it is important that the data to be printed be efficiently transferred from the computer device to the video display buffer. Typical data processing devices use memory that is bit mapped. Each bit of computer memory represents one point (pixel) on the page to be displayed or printed. The printing device scans a video display buffer coupled to the host computer with bit rows representing the pixels to be displayed. After printing one line of data, the printing device or display advances to the next line in the bit map and displays the points along that line. Alphanumeric characters typically stored in bit map memory are comprised of multiple stored bits arranged in sequential rows within the bit map. font·
Transfer of alphanumeric characters or graphic symbols from memory to the video display buffer is under central processing unit (CPU) control. Therefore, to store a particular character in a bit map, the CPU requires that each row of bits of the character be sequentially transferred to the location in the bit map memory where the character is to be stored, and displayed sequentially. It will be done.

[Summary of the invention]

As will be explained below, the present invention discloses a high speed printer controller that is controlled to transfer data from font memory to video display memory at very high speeds. Data can be transferred at speeds up to 1.56MB/s 16
Transmitted in Bitto language.

Direct Memory Access (DMA) is placed between the 16-bit microprocessor (CPU) and the printer controller to handle the actual data without the need for supervision by the CPU. The CPU is free to continue processing new data or perform other tasks for the next data transfer operation. Although the present invention has particular utility for use in devices that utilize laser printing devices, it will be appreciated that it can be used in a variety of applications requiring high speed data transfer.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Disclosed herein is a high speed marking device controller tailored for use with laser printing devices. The present invention includes a central processing unit (CPU) that identifies alphanumeric characters or symbols to be displayed, and a direct memory located between the CPU and a bit-rimmed random access memory (RAM) video display buffer.・
access (DMA). Each alphanumeric character or symbol is written as a sequence of bytes by the DMA controller.
Stored in font RAM addressable by the A controller. In addition to identifying which characters should be displayed,
The CPU determines the first X6+To position in the bit map at which the character is to be stored (directly above the character)--face-to-face history 14, plus the character "insert". (DMA control is on) Retrieve the desired character byte by byte from RAM, make any necessary data offset adjustments, and move each byte containing the character to the appropriate location in the bit map via the video display control. send to place The DMA controller stores the received byte in the appropriate memory location of the bit map.
Incrementing the position allows bit addressing to be displayed on the printout medium.Unlike other conventional data transfer methods, the present invention
DMA transfers are used to store each complete character in the desired bit map location. Thereby, the data transfer method of the present invention reduces the number of operations required by the CPUK to transfer data from the RAM to the video display bit φ map.

In the present invention, the video display buffer is 32K RA
It is partitioned into four banks of M and is used as a periodic buffer array to simulate an entire bit-mapped page using only 128 of the RAM.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the drawings.

A high speed printing device controller is described herein that has particular application for use in conjunction with a computer controlled laser printing device. In the following description, numerous details are set forth, such as specific numbers of bits, central processing units, binary operations, etc., in order to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that the invention may be practiced without such specific details. In other instances, well-known circuits and structures are shown in block diagrams or not described in detail in order to avoid unnecessarily obscuring the present invention.

Referring initially to FIG.
It includes a central processing unit (CPU) 10. The CPU 10 is used to store the data to be printed, along with a system EPROM 15 containing an operating system to control the operation of the printer, and various algorithms for handling those data, including changing the size of fonts and rotating characters. System RAM 18 used for
are coupled via internal paths 14 to various memory resources, including. An EFROM 22 is also coupled to the internal bus 14 so that when power is applied to the device of the present invention, a standard EFROM 22 is provided for alphanumeric characters without the need for the user to provide a font prior to operation of the device of the present invention. gives a fixed 7-ont format. In addition, CPU1G is
various standard parallel and serial interface ports, and printer control interface signal ports,
Coupled to display interface boat. CPUl
Csntronies parallel interface 24 and R8232 interface 26 are available for 0 to communicate with other host computers.

Internal bus 14 is coupled to a system path or device bus 30. Device path 30 allows data transfer between CPU 10 and video display RAM 32 and DMA controller 36. DMA controller 36 is coupled as shown to communicate and transfer data between video display RAM 32 and CPU 10, which are coupled to device bus 30 and printer control and video interface path 40. Make it. DMA controller 36 is also coupled to font RAM 32. This 7 on) RAM3
2 is used to store fonts such as alphanumeric characters, logos and other graphics, and data to be printed. Font and data register 46 and channel command register 50 are coupled to DMA controller internal path 38. As will be explained later, the -y ont and other character sets can be downloaded via CPU 10 along device bus 30 and DMA controller internal path 38 and stored in font RAM 44. can. The alphanumeric character data to be displayed is specified by CPU 10, and DMA controller 36 retrieves the desired character from RAM 44 and transfers it to video display RAM 32.

As shown in the figure, the video display RAM 32 is
Use bank sand switching of part-time job in 1732 3
Equipped with boat memory. By rotating and using each η-ward bank, a full page bit map can be simulated using only 128 of the RAM memory.

As explained later, byte video display RA is set to 128.
M32 is configured such that at any particular time one of the four banks is displayed (printed) and the remaining three banks can receive new data for later display (printing). It behaves like a periodic buffer. As shown, the CPU 10 and the DMA controller 36 are connected to the display RA
Can access M32.

Video display controller 56 connects to video display control internal path 58
is coupled to video display RAM 32 via.

As explained in more detail below, video display controller 56 includes:
Banks 1-4 of video display RAM 32 are accessed periodically to properly apply address and control signals to the four banks of dynamic RAM.

Reference is now made to FIG. 2(a) in which a conventional bit map raster scan line storage technique is shown. Alphanumeric characters to be stored in the video bit map for later display or printing are made up of pixels represented by bits in the video bit map. When the processing unit updates the logical state of the bits constituting the bit map, it stores the data in the bit map. In other words, the processing unit must individually transfer each byte or word of the character to the BitFist map until the entire character has been transferred. For example, if the character size is 16 dots by 32 dots, a 16 bit word to be transferred must be viewed 32 times. This consists of reading a byte from font memory, transferring it to the CPU, and retransferring it to the appropriate video bit map memory. In Figure 2(a), this one process (32 transfers for a character size of 16 dots by 32 dots) must be repeated for each character as many times as there are characters.

The points on each scanline that make up the letter A are turned "on", thereby storing an alphanumeric character in the bit map. The next alphanumeric character to be displayed or printed is similarly stored in the bit map. Section 2(a)
Storing each character in the bit map shown in the figure requires a number of iterative processing operations by the CPU,
That is, in order to store all pages of text and graphic data, a 7-ontomesori and a video bitmap are required.
It will be appreciated that this requires repeated memory access operations. This transfer operation uses a lot of CPU time and
The transfer process is relatively slow due to the read/write access cycle time of the CPH.The alphanumeric characters and other data are then transferred to the video display R.
Reference is made to FIG. 2(b) where the method used by the present invention to store in AM32 is shown.

Unlike conventional storage techniques, the present invention stores each character on a character-by-character basis without CPU intervention. In other words, the present invention stores each character in one motion sequence at any location on the video display bit map without requiring repeated transfers by CPU K for every character.

As will be explained later, addresses and control information necessary to search for a specific character stored in the font RAM 44 are provided to the CPU1OIIiDM&controller 46. To properly position the pixel, mμ controller 36
After a certain data offset operation by font R
The characters in AM 44 are transferred to the appropriate location in video display RAM 32. DMA controller 36 stores all characters in the correct location in bit map memory before retrieving from font RAM 44 the next character to be displayed (address and control information again provided by the CPU). As shown in FIG. 3, the user initially stores each character in the font RAM 44 through a download operation via the CPU 10 and the device path 30, so that the desired font library is stored in the RAM 44. do.

Each character stored in the font RAM 44 is
Phono) Consists of multiple bytes stored sequentially in the RAM 44. As shown in Figure 3, each character
The bytes that make up the insert (an insert is defined as the matrix of bytes that define each character) define the height and width of the character insert, and the first XI) + Y6 position is incremented. and Kyoshi, assemble the character, phono)
The video display RAM is stored sequentially in the RAM 44, but after adjusting the data offset by the DMA controller 38.
Can be stored in 32 suitable banks.

Reference is now made to FIG. 5, where the structure of the DMA controller 36 of the present invention is shown. CPolo provides data identifying the desired character, its font type, and the first XolYo position of the round to store in video display RAM 32 to DMA controller 36 over device path 30. The data is detected by address decoder 70 coupled to device path 30. Destination address information defining the location in video display RAM 32 where the character is to be stored and information for the location of the desired font character in font RAM 44 are coupled to channel command register 72. The first source address (x,,y,
) is incremented by 1 font address generation counter 74 so that the sequential bytes (1 to N+1) defining the character to be printed are retrieved from phono RAM 44 as described above with reference to FIG. I am made to do so.

A multiplexer T6 is coupled to the font address generation counter and the device bus 30 to enable the CPU I O to provide direct address information to the font 44 to download various font types for storage in the font RAM 44. To print data, multiplexer 76 selects font address generation counter 74 and sets the font address of the character to be displayed.
Coupled to address bus 80 and address decoder 82.

7 on) Dynamic RAM controller 84 selects the appropriate character specified by the first address in font RAM 44 provided by CPU 10 so that the first specified address in RAM 44 is sent to font data bus 86. Select. As previously explained, as all character inserts are read from RAM 44, the specified address in RAM 44 is incremented by font address generation counter 74.

(Phono that constitutes the desired character to be displayed) RA
The byte string read from M is sent to the data offset adjustment circuit via the font data bus 86! Sent to 10. The data offset adjustment circuitry properly reassembles the byte sequences read from font RAM 44 to form the desired character at the designated location in video display RAM 32. In the embodiment described herein, data offset adjustment circuit 90 may offset each data word transferred by .theta..about.15 bits. 7 ON) Data read from RAM 44 is shifted to the right 0-15 bits before being sent to video display RAM and video display controller 56.

The pit to the right of the shifted offset bit is written to the next word location in video memory. The bit value to the left of the offset e bit in the video word is not changed by the offset operation. Non-zero offset
In a data transfer operation, the actual number of words transferred for each horizontal scan line pixel of the display is one greater than the specified character width in the embodiment described herein.

Once any necessary data offset adjustments have been made, the character is transferred to printer control and video interface bus 40 and stored in video display RAM 44. This will be explained later.

If one repeating pattern is desired to be displayed, one 16-pit value defines the repeating pattern (eg, dots, solid lines, etc.) to be coupled directly to the font data bus 86 for later data offset and display. A font data register 46 is provided coupled to a font address bus 80 that provides a font address bus 80 . By using this font data register 46, simple repeating patterns to be displayed can be generated quickly and efficiently without the need to access characters in RAM 44. o Video address generation circuit 12 is coupled to an interrupt controller 94 for CPU 10 and reaches the specified height of the character when the specified width (in bytes) of the character insert is reached. Responsible for arranging and formatting the data read from RAM 44 so that additional bytes defining characters are placed in the next row (scanline) of video display RAM 320 (up to 7 on). Also, 7 on) R
A video interface control circuit 96 is provided to synchronize data sent to video display controller 56 so that characters read from AM 44 or font-data register 46 are placed in the appropriate punctures in video display RAM 32. . The character is m Buddha controller 36
Once retrieved from the standard font RAM 44 and coupled to the printer control and video interface path 40, an interrupt signal is generated by the interrupt controller 94, thereby terminating the desired data transfer. CPU
Inform 10.

Then, the CPU can further search for and display the character.

Next, the operation of video display controller 56 and video display RAM 32 will be described with reference to FIGS. 6 and 7. Since video display RAM 32 can be accessed by CPU 10, DMA controller 36, and video display controller 56, video display RAM 32 is conceptually a three-bottom RAM. FIG. 6 shows an address and control flow diagram. RAM 2
11! In this flowchart, two dynamic RAMs 100 and 1
02 is used. In the embodiment described herein, video display RAM 32 is accessed in 16-bit words and CPU 10 cannot access the video display RAM during read/modify/write cycles. DMA controller 36 is currently in read/modify/write mode and the video display R
Access AM36. The data at the specified location is first read and then "ORed" with the new data before it is actually written back to the RAM memory.

Therefore, the data output from the DMA controller 36 has zeros in bit locations that are not desired to be changed. Accessing video display controller 56 memory in such a way as to read/modify/write such that the specified word location is automatically zeroed after the contents of the word location are transferred to the display shift register. . This significantly increases the speed of the video display circuit. Previously, software routines were used to perform these functions, thus wasting processing time.

Data representing characters to be displayed may be generated from CPU 10 via device bus 30 or from DMA controller 36 via printer control and video interface bus 40. The address provided by CPU 10 or controller 36 specifies where the desired character is to be stored in video display RAM 32. The DRAM controller 100° 102 is a video display RAM
Specify in which bank of 32 the character should be stored. Reference is now made to FIG. In the embodiment described here, the characters to be displayed according to the invention can be formed in different sizes for subsequent display. For example, in the page of data shown in FIG.
Stored in byte bank 1 at 32 of AM32. However, the large letters rBJ, rCJ shown in FIG.
In this case, many banks of video display RAM 32 must be utilized to generate large alphanumeric characters for printing. In the embodiment described herein, bank 1 is bank 2 in the example shown in FIG.
~4 is printed first, and when bank 4 is printed, the next bank to be printed is again bank 1, so RA is printed at once.
Only one bank of M can be scanned for printing.

By using banks 1 to 4 of the video display RAM as periodic buffers, the RAM memory no.
All pages of data can be printed as a bit map using only Hide.

Although the detailed described embodiment of the invention utilizes a four-bank switching configuration to conserve memory space, video display RAM 32 comprises one 1 megabyte bit map. Those skilled in the art will appreciate that in the bit map there is a one-to-one correspondence between each bit of the bit map and each display element (pixel) that makes up the page of data. Probably. From the above explanation, video display RAM 32
will appear to the DMA controller 36 as a periodic buffer representing equally sized banks or segments from the entire page to be printed. Therefore, the controller 36 attempts to prefill three banks of display data while the fourth bank is being printed. However, if necessary, the video display RAM 32
The actual DMA transfer to is delayed to wait for an available bank to fill.

Reference is now made to FIG. 7, where the data paths utilized by video display controller 56 and video display RAM 32 are shown. As shown, according to the appropriate MA controller signal,
Data from the DMA controller 36, which constitutes character data, is stored in sequential banks of random access O memory 32 via appropriate multiplexers. Through a repetitive periodic process, each bank of RAM is serially coupled to a video buffer 110, 112.
is read into. Character data is serially printed by a printing device (
Video conferencing buffers 110 and 112 are used alternately so that data is continuously provided to a parallel-to-serial converter and multiplexer 114 for shifting out (not shown).

What has been described above is a printer controller configured to rapidly transfer data from a font memory to a video display memory. Although the present invention is particularly useful for laser printing, it will be appreciated that the present invention can be used in a variety of applications requiring high speed transfer operations of characters into a bit mapped environment. Character inserts are used as in the present invention to allow the DMA controller to write all characters to the bitmap, thereby eliminating the need for repeated access by the OPU. This greatly increases the speed with which characters can be transferred to video display memory for printing.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the architecture of the printer controller of the present invention, FIG. 2(a) is a diagram illustrating a conventional bit map/raster scan line storage method, and FIG. 2(b) is a block diagram of the printer controller architecture of the present invention. A diagram illustrating the method of bit-map/character storage,
FIG. 3 is a schematic diagram illustrating the storage of fonts in RAM of the present invention; FIG. 4 is a video display of the present invention to create a limited memory full bit map for all printed pages of data. FIG. 5 is a block diagram illustrating the printer controller of the present invention; FIG. 6 is a diagram illustrating the use of bank switching with RAM; FIG. 6 is a block diagram of the present invention; FIG. FIG. 7 is a block diagram showing the display circuit of the video controller. 1a...Fist/Central processing unit, 16...KFROM,
18...System RAM, 32-φ-Video display RAM, 3G---DMA controller, 38...
...DMA controller internal bus, 44...font RA
M, 46...117 Ont and data 0 register, 5
6...Video display controller, 72...-Channel command register, 74... Font address generation counter, 76...Multiplexer, 82...Address decoder, 84...・Dynamic RAM controller,
90...Data offset adjustment circuit, 94...
- Interrupt control s, ss...video interface control circuit.

Claims (19)

[Claims] (1) a bitmap representation of the alphanumeric characters, symbols, etc. stored in the first memory means corresponding to the X, Y coordinates of a display including a plurality of display elements that are selectively enabled; A method of transferring to a second memory means comprising: (a) storing a plurality of alphanumeric characters, symbols, etc. as a series of bytes in said first memory means; and (b) including the desired characters, symbols, etc. , a series of bytes defining a character insert having a predetermined height and width, the series of bytes stored in said first memory means; (c) said desired character insert; to a specified location defined by the first X_0, Y_0 coordinates in said second memory means, and each byte containing said character insert is incrementing said X, Y location so that said character, symbol, etc. is transferred to said bit map at high speed; A method of transferring data representing symbols etc. (2) A method according to claim 1, wherein said display means includes a plurality of raster scan lines forming said display elements defining said display. (3) The method according to claim 2, including the step of reading out the data stored in the second memory means in the order in which the display element is scanned by the display. A method characterized by: (4) A method according to claim 3, wherein said transfer step (c) is such that said characters, symbols, etc. are transferred to appropriate X, Y locations within said second memory means. A method comprising the step of performing a data offset adjustment on the read data comprising the characters, symbols, etc. (5) In a display device that includes a plurality of display elements that are selectively enabled and includes a printing device for displaying data representing characters, symbols, etc. on the display: a plurality of alphanumeric characters, symbols, etc. font memory means for storing data representing a plurality of alphanumeric characters, symbols, etc., each of which is stored as a series of bytes; a plurality of font memory means coupled to said printing device and each representing a display element on said display; video display memory means for storing data points of; a series of bytes coupled to said font memory means and said video display memory means representing desired characters, symbols, etc. stored in said font memory means; Direct memory access (DMA) controller means for transferring to a specific location defined by an initial X_0, Y_0 coordinate on said display, wherein all of said characters, symbols, etc. are transferred to said location for subsequent display. Direct Memory Access (DM
A) control means; for transferring desired characters, symbols, etc. at high speed to said video display memory means for subsequent display. (6) The apparatus according to claim 5, wherein the printing device includes a plurality of raster scanning lines forming the display element that defines the display. 7. The apparatus of claim 6, wherein said video display memory means reads said data points from said video display memory means in the order in which said display elements are scanned by said display means. An apparatus characterized in that it includes video display control means of. (8) a plurality of raster scan lines comprising a plurality of display elements selectively enabled and defining said display for displaying data representing characters, symbols, etc. on the display; In a display device including a printing device having: font memory means for storing data representing a plurality of alphanumeric characters, symbols, etc. such that each of the plurality of alphanumeric characters, symbols, etc. is stored as a series of bytes; Video display memory means coupled to said printing device for storing a plurality of data points, each representing a display element on said display, said display element receiving said data points from said video display memory means; video display memory means including video display control means for reading in the order scanned by; said font memory means and said video display memory means being coupled to said font memory means and said font memory means having a desired value stored in said font memory means; direct memory access (DMA) control means for transferring a series of bytes representing a character, symbol, etc., to a specific location defined by initial X_0, Y_0 coordinates on said display, said character, symbol, etc.; Direct Memory Access (DMA) increments the initial X_0, Y_0 coordinates so that all of the
) controller means; a central processing unit (CPU) coupled to said direct memory access (DMA) controller means; and a central processing unit (CPU) coupled to said direct memory access (DMA) controller means; A device characterized by transferring data at high speed. (9) The device according to claim 8, wherein the CPU provides the initial X_0, Y_0 coordinates to the DMA controller. (10) The apparatus according to claim 9, wherein the CPU transfers data identifying the specific character, symbol, etc. to be read from the font memory means to the D.
A device characterized in that it supplies to an MA controller. (11) The device according to claim 10,
The DMA controller means is configured to control the DMA controller so that the characters, symbols, etc. read from the font memory means are transferred to the appropriate X, Y locations within the video display memory means for subsequent display. Apparatus characterized in that it each comprises data offset adjustment means for performing a data bit offset for each data byte comprising a character, symbol, etc. (12) The device according to claim 11,
characterized in that said series of bytes constituting each said character, symbol, etc. are stored sequentially in said font memory means, thereby constituting a character insert having a predetermined height and width. Device. (13) The device according to claim 12,
font data coupled to said DMA controller means;
Apparatus comprising a register, the font data register storing data representing one repeating pattern to be displayed. (14) The device according to claim 12,
the first X_0 specified by the CPU so that sequential bytes (1-(N+1)) constituting the characters, symbols, etc. read from the font memory means are read from the font memory means; An apparatus comprising: a font address generation counter for incrementing a Y_0 position. (15) The device according to claim 14,
The DMA controller means is coupled to the font address generation means and the font memory means for reading the incremented address locations within the font memory means defining the desired character, symbol, etc. An apparatus comprising a dynamic RAM controller. (16) The device according to claim 15,
An apparatus characterized in that said DMA controller means is coupled to said CPU by a device bus, and said CPU is coupled to said video display memory means. (17) The device according to claim 16,
enabling said CPU to transfer a plurality of permanent font characters, symbols, etc. directly to said video display memory means;
the C for storing the permanent font characters;
An apparatus characterized in that it includes resident font memory means coupled to a PU. (18) The device according to claim 12,
Apparatus characterized in that said video display memory means comprises a plurality of limited size memory banks, each bank representing one portion of a page of data to be displayed. (19) The device according to claim 18,
Apparatus according to claim 1, wherein each bank is accessed sequentially in a periodic buffer manner by the video display controller means so that a full page of data can be displayed using only four 32K byte banks.