JPS61178152A - Tool interference checking device - Google Patents

Abstract

PURPOSE:To check interference of many complex tools with high speed by storing the body image of tool or work independently in plural image memories then obtaining logical product of respective output and detecting interference of tool. CONSTITUTION:The body image of tool or work is stored independently in respective image memory 10 of plural image circuits A, B, C, D. A timing generator 18 will feed necessary output to said image memories synchronously with the system clock input 19. In other word, CPU (not shown) will execute no operation except provision of initial data to a counter 6 and the timing generator 18 will feed a memory read-out signal 11 to the image memory 10 while a bit output signal 14 to bit extraction circuit 13. Consequently, tool interference check can be executed with high speed by feeding bit data 15 from each image circuit A, B, C, D to AND gate 16 and producing an interference information 17 upon overlap of images.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is a numerical control device for a machine tool (hereinafter referred to as NC), in which a tool, a workpiece, and a non-workpiece are prevented from accidentally colliding with each other. The present invention relates to a device for checking interference.

[Summary of the invention]

In order to check tool interference in NG, the present invention
Equipped with multiple independent image memories.

Object images such as tools and workpieces are stored independently in each image memory, these image data (i.e., a set of point information) can be moved freely, and the logical product of each output is calculated. This is used to detect tool interference.

[Conventional technology]

Conventionally, the NC that controls machine tools with multiple tools is
To prevent interference between each tool.

Checks have been carried out periodically or at each processing stage while keeping an eye on each other's positions and the shape of the tools.

However, as machining technology advances, the objects to be checked for interference have become more complex and diverse, including checking not only tool shapes but also non-processed objects other than workpieces and tools with complex shapes. There is.

Normally, these checks have the shapes of tools, workpieces, and non-workpieces in the memory (working area) of the NG CPU as mathematical expressions (i.e., an area surrounded by multiple inequalities), and the position of the tool is CPU calculations were used to check that it was not inside any object.

For example, if it is a quadrilateral, four inequalities (%) are required as shown in Figure 3, and it can be seen that the interference of such plane quadrangles requires solving a considerable number of linear equations. .

[Problem that the invention seeks to solve]

However, such processing must be performed within one normal actual machining time or a short period of time prior to machining because it is necessary to check for dynamic coordinate changes due to a given movement.

When the shape is simple (in practice, complex shapes are often simplified, and most of the calculations involve addition and subtraction, so the process can be completed in a short time.

When trying to check a complex shape as it is.

Due to the large amount of data, processing takes time, and the reality is that calculations cannot be completed within the short period of time prior to real-time checking and execution.

In addition, it may not only affect the actual processing time, but also
In the future, more processing time will be required to handle more complex shapes.

The present invention solves these problems and provides a device that can perform tool interference checks at high speed.

[Means to solve the problem]

In order to solve the above problems, the present invention includes a plurality of independent image memories, each of which independently stores object images such as tools and workpieces, and system An address signal is given in synchronization with the clock of , the memory data corresponding to this address is output, and these image data (
In other words, the logical product of a set of point information is taken, and when there is duplication of data at the same position, it is determined that interference has occurred.

[Effect]

With such a configuration, it is possible to instantly recognize whether or not interference occurs by simply superimposing all the outputs of the plurality of image memories.

In addition, since the addresses given to these multiple image memories can be set sequentially from the CPU of the numerical control device, the object image can be moved freely within the image space.
This makes it possible to simulate a real tool moving on coordinates.

〔Example〕

A specific embodiment of the present invention will be described below with reference to FIG.

The present invention includes a plurality of image circuits having the same configuration as shown in A, B, C, and D, and a timing generator 18 that controls their processing timing.

It is composed of an AND gate 16.

One tool for each image circuit.

One workpiece and one non-workpiece are each independently assigned. Therefore, the number of circuits is not limited to four as in this example.

Here, the circuit configuration of A will be explained, but the other circuit configurations are exactly the same.

Although the explanation of the image memory itself is omitted here, it is
9098.

Now, 1. Data output from an NG CPU, etc. (not shown) is sent via data bus 1 to data latch 3 via write signal 2.
latched by

This data is latched by the internal data latch signal 5 to the counter 6 via the internal data bus 4.

It is counted up by the count signal 7.

This counted data is divided into an address bus 8 and a bit address bus 9, the former being used as an address for the image memory 10 and the latter being used as a bit address for the bit extraction circuit 13.

Considering the moment when the contents of the counter 6 reach a certain value, the counted up data is stored in the image memory 10.
memory data bus 12 by inputting the memory read signal 11 as the address 8 of the memory data bus 12.
Output data to .

This data follows the bit address bus 9.

Bits are extracted, and information in units of bits indicated by the counter 6 is sent to the AND gate 16 as bit data 15 in synchronization with the bit output signal 14.

Bit-by-bit information of image data similarly extracted from other image circuits is sent to this AND gate 16, so if the images overlap, an AND output, that is, interference information 17 is output.

That is, each image memory 10 stores object images of tools and workpieces, and initial data given to the counter 6 (this is sequentially set by a CPU (not shown)).
This allows the contents of the image memory to move freely within the image space (that is, no CPU calculations are required), so tool interference can be recognized at high speed under the control of the timing generator 18.

FIG. 2 conceptually shows the movement of the image memory in the image space, and the specific operation will be explained.

The image space 201 is an image area in which the timing generator 18 in FIG. 1 generates one cycle of timing, and is the largest area that encompasses the area defined by setting the initial address of the image memory to the minimum and maximum values. .

202 and 204 are image memories A, respectively.

In the image area of image memory B, 206 and 207 are their initial addresses, 203 is a tool image, and 205 is an image of a non-workpiece.

The initial addresses 206 and 207 are set as coordinate values (100, 150) and (300, 400), respectively.

However, since the settings are set sequentially from the NC CPU for each calculation, if the settings are made in accordance with the movement of the tool, it becomes possible to simulate the movement of the tool as if it were actually moving.

The tool image 203 and the non-workpiece image 205 are a collection of point information, specifically a collection of bit data.

Therefore, if the AND gate 16 in FIG. 1 performs an AND operation, naturally the part 208 in FIG. It is.

〔Effect of the invention〕

As explained above, 1. According to the present invention, it is possible to check the interference of a large number of complex tools at high speed, which was previously impossible, and the load on the CPU of NG is reduced, which is an extremely significant effect. It is.

Also, image memory has become cheaper.

It is economically advantageous and has great practical value.

[Brief explanation of drawings]

FIG. 1 is a diagram illustrating a specific embodiment of the present invention, FIG. 2 is a diagram illustrating an image space of the present invention, and FIG. 3 is a diagram illustrating a conventional object recognition method. 1...Data bus 2...Write signal 3...
Data latch 4...Internal data bus death...Internal data latch signal 6...Counter 7...Count signal 8...
・Address bus 9...Bit address bus 10・
... Image memory 11 ... Memory read signal 12 ... Memory data bus 13 ... Bit extraction circuit 14 ... Bit output signal 15 ... Bit data 16 ... AND gate 17 ... Interference Information 18...Timing generator 19...Clock input 201...Image space 202.204...Image area 206.207...Initial address 203...Tool image 205...Non-workpiece Image 208... Location of interference Figure 2 Figure 3 Procedure amendment (method) % formula % 1 Indication of incident 1985 Patent Application No. 19120 2 Name of invention Tool interference check device 3 Person making the amendment Incident and Relationship between Patent applicant 4 Date of amendment order Engraving of the specification originally attached to the application, as attached (no change in content)

Claims (1)

[Scope of Claim] A numerical control device for a machine tool, comprising: a plurality of image memories each storing respective occupied areas of a tool, a workpiece, and a non-workpiece as a collection of point information; means for freely moving the position of the occupied area in the image space by arbitrarily setting an initial address of the image memory; and means for giving an address signal to the image memory in synchronization with a clock of a numerical control system, and A timing generating means for outputting memory data and logical product of the respective memory data are used to detect duplication of a plurality of point information at the same position in the image space, and when there is duplication, an interference generation signal is generated. A tool interference checking device characterized by comprising: a means for outputting.