JPS61176210A - Literal circuit - Google Patents

Abstract

PURPOSE:To obtain a literal circuit in a wide sense by comparing an input current with a current showing the threshold value and turning on a window-on switch when the input current is equal to a level between both threshold values. CONSTITUTION:A window-on switch is connected between a signal source and an output terminal. While a current comparator compares an input current with a current which sows the 1st and 2nd threshold values and delivers a control signal to turn on the window-on switch when said input current has a level between both threshold values. That is, the source of a current mirror 31 is connected to a positive current source +VD. While the source of a current mirror 32 is grounded. The grains at the output side of both mirrors 31 and 32 are connected with each other via a coupling node 35. The node 35 is connected to the gate of an MOS FET forming a floating switch 1F.

Description

DETAILED DESCRIPTION OF THE INVENTION Literal circuits in the broad sense include literal circuits in the narrow sense, cruised interval circuits, match (delta literal J-function) circuits, and delta interval circuits. - As an example, the function of a literal circuit in a narrow sense, without consideration of noise margin, can be expressed mathematically as follows. Here, r is the base number, a, b
is a constant.

nL.

Table of contents (1. Name of the invention (i, i) Technical field (j, 2) Prior art (2) Summary of the invention (2, 11 Purpose of the invention (2, 2) Structure and effects of the invention (3) Examples Description (3,1) Grandito switch and 70-ting
Switch (3, 2) Floating threshold switching circuit (3, 3) Floating window switching circuit (3, 41 Narrow literal circuit and closed interval circuit (3, 5) Matching (delta literal J function) )
Circuits and Delta Interval Circuits (1) Technical Field of the Invention This invention relates to a broad-sense literal circuit which is a basic circuit used in multi-valued logic circuit systems, analog circuit systems, and the like. Broad literal circuits include narrow literal circuits, closed interval circuits, match (delta literal J-function) circuits, and delta interval circuits.

(1, 2) Prior art] Research into multi-value logic and its arithmetic circuits is actively being conducted to supplement or overcome some of the limitations of binary logic, which is the basis of many digital circuit systems including computers. It is being done. Binary logic handles two values, 0 and 1, and the signals used in binary logic circuit systems take two levels corresponding to these two values, whereas multi-value logic handles three or more values. Signals that handle values and are used in multivalued logic circuit systems take on three or more levels.

Multivalued logic (circuit system) is binary logic (circuit system)
It is said to have the following advantages compared to

1) It is possible to describe an uncertain state between 0 and 1 (for example, in the case of three values).

2) It is possible to avoid reducing the wiring area and the number of bins on the C substrate, and it is possible to increase the effective degree of integration. For example, in the case of 64 values, a wiring area of 1/6□ of a binary logic circuit is sufficient.

3) The protrusion of the 10-value machine makes it possible to use the same logic as humans, so there is no need for the encoders and decoders that were necessary for the binary machine.

By the way, apart from the viewpoint of 2'-value and multi-value, conventional circuit systems can be classified into two types from the viewpoint of the circuit mode used in the information processing system. One is a voltage mode circuit system, where information is represented by the magnitude and polarity of a signal voltage. Most of the conventional 2Ia digital circuits are in this voltage mode, and some voltage mode multi-value logic circuits have also been reported. The other is a current mode circuit system, where information is represented by the magnitude and direction of a signal current.

For example, the I21 circuit belongs to this category of current mode circuits, and has features such as low supply voltage, small delay time/power product, high density integration, and suitability for VLSI. Applications of I2L circuits to multivalued logic systems have also been reported. For example, T,Tich Dao,
“Threshold12L and Its
Application to Binary
Syn+n+etric functions and
IEEE
Journal of 5solid-3tate C
1 rcuits.

vol, 5C-12, NO, 5, 463-472 (1
October 977):■.

Tich Dao, Edward J, HacClus
to key and lewis.

Ru5sell, ”Hultivalued
Interorated Injection Loo
ic”, IEEE Trans,Comput,,v
ol, C-26, NO, 12, pp, 1233-1
241 (December 1977).

However, since the I21-circuit is constructed with bipolar transistors, it is inevitable that the multi-output current mirror used in this circuit will introduce errors, especially when the collector of one or more of the multi-output current mirrors saturates. Afterwards, this error becomes more noticeable. Therefore, although there is no particular problem in applying the 121 circuit to a binary logic circuit system, it is extremely difficult to use the R1-circuit in a multi-value logic circuit system, especially in multi-level logic. It is.

In general, the switching circuit used in the R1-circuit that has already been reported includes a granted switch, which consumes power regardless of whether the switch is on or not. When the circuits are connected in parallel M8, there is a drawback that a diode for backflow prevention J1- is required.

(2) Komei's tR Essentials (21) Purpose of the Invention The present invention aims to realize a multi-value logic circuit system with 10 or more values without any error even when used for a multi-value logic circuit system, and to solve the problem of floating・In order to realize a multivalued logic circuit system or an analog circuit system that overcomes the drawbacks of a re-grounded switch by using a switch, a literal circuit in a broad sense is provided as a basic circuit.

(2, 2) Structure and effect of the invention The literal circuit according to the invention includes a signal source that generates a signal representing a predetermined value according to the function of the circuit, a signal source that is connected between this signal source and an output terminal, and a window-on circuit that is connected between the signal source and the output terminal. ·switch,
and compares the input current with currents representing first and second threshold values, and turns on the window-on switch when the value of the input current is between these threshold values. The present invention is characterized in that it includes a current comparison circuit that outputs a control signal.

Depending on whether the above-mentioned predetermined value is set to the value (r-1) based on the base of r or to the value of the logical value 1, or depending on the above-mentioned threshold value, this broad literal The circuit can be transformed into a narrow literal circuit, a closed interval circuit, a match (delta literal J-function) circuit, a delta interval circuit, etc. A current source and a voltage source can be used as the signal source.

The literal circuit according to the present invention has advantages such as low power consumption because it uses a window-on switch consisting of a 70-ting switch, and no diode for preventing current flow in parallel connection is required.

Furthermore, since it is constructed using MOS FETs, there are almost no errors, and it is possible to easily create even a multivalued logic circuit with 10 or more values.

Needless to say, the literal circuit according to the present invention can be applied not only to multivalued logic operations but also to circuit systems for analog operations.

(3) Explanation of the embodiment (3, 11 grand date switch and floating switch)
SwitchesIn circuit systems that operate in either current mode or voltage mode, the switches used in these circuit systems can be divided into two types depending on their connection configuration: grounded switches and floating switches. In the current mode circuit system ()
A grounded switch and a floating switch are shown in FIGS. 1(A) and 8), respectively.

In Fig. 1 (A), the current J? I! A node (5) is installed in the middle of the line connecting (2) and the output terminal (4), and a switch (1G) is connected between this node (5) and the ground (or power terminal). ing. This is the grandito switch.

The switch (1G) is turned on and off by a control signal output from the control signal generation circuit (C). Switch (1G
) is on, the current J output from the current source (2) flows to ground through the switch (1G) as shown by the chain line, so the output current I at the output terminal (4).

becomes O. When the switch (1G) is turned off, the output current of the current source (2) appears as it is at the output terminal (4), so the output current I becomes J.

In FIG. 1(B), the switch (1F) is a current source (
2) and the output terminal (4). This switch (1F) is called a 70-ting switch because it is floating from ground. When the switch (1F) is on, the output current J of the current source (2) is this switch (1F).
The output current I appears at the output terminal (4) through F)
. becomes J. When the switch (1F) is turned off, the output current of current 1 (2) is cut off by this switch (1F), so the output current I. becomes 0.

Compared to a circuit using a 7-day switch,
Circuits using grounded switches have two major drawbacks.

One drawback is that circuits containing grounded switches
Power is constantly consumed regardless of whether this switch is on or off. In Fig. 1 (A), if the switch (1G) is on, the current J is this switch (1G).
) and flows to ground, and when it is off, the current J is the output current I. bawl. On the other hand, in the circuit including the floating switch shown in FIG. 1(B), the switch (1
F) is on, the current J is the output current I. However, when the switch (1F) is off, the current does not flow anywhere and no power is consumed.

Another disadvantage of circuits that include grounded switches,
becomes noticeable when such circuits are connected in parallel. In Figure 2, two circuits shown in Figure 1 (A) are connected in parallel (indicated by (01) and (g2) in Figure 2), and their output terminals are connected at node (6). It is connected to the output terminal (7). One circuit (gl) has a grounded switch (1G), the other circuit (g2)
are each provided with a grandito switch (2G).

Switch (1G) of circuit (gl) is off, circuit (g2)
Consider a situation where the switch (2G) is on. In this case, the output current I of the circuit (gl). 1 becomes J, and the output current I of the circuit (g2). 2 is 0. Circuit ((+1
) does not flow from the node (6) to the output terminal (7), and most of it flows from the nodes (6) and (5) to the on switch (2G), as shown by the chain line i.
) and flows to ground.

Therefore, the output current I flowing out from the terminal (7) is (
Io1+Io2). i.

In order to set = (Io1+I.2), add the chain line (
As shown in 8), it is necessary to provide a backflow prevention diode on the output side of each circuit ((11) ((+2)).

On the other hand, even if two circuits including floating switches as shown in Figure 1 (B> There is no need to connect a diode.

The circuit containing the 70-ting switch is grounded.
Floating switches are employed in the circuits shown below because they have the above-mentioned advantages over circuits that include switches.

The 70-ting switch can be constructed by a bipolar transistor or a MO8 FET (field effect transistor).

While a certain amount of power is required to control bipolar transistors on and off, MO
Controlling the SFET requires almost no power. From this point of view, it can be said that MOSFET is better as a 70-ring switch. In the following description, floating switches consisting of MOS FETs are used in each circuit.

(3,2) Floating Threshold Switching Circuit FIG. 3 shows an example of a floating threshold switching circuit. The floating switch (1F) is an N-channel MOS FET (N-MO
S FET) is used, the train of which is connected to the current source (2), the source to the output terminal (4), and the substrays 1 to 1 are grounded. Also this MO
A control voltage output from the control signal generation circuit (C) is applied to the gates of the 8FEs.

The control signal generation circuit (C) is a current comparison circuit, and is composed of a current mirror (31) made of a P-channel MO3 type FFT (P-MOS FET) and a current mirror (32) made of an If-MOS FET. . The current mirror shown here consists of two MOS FETs, the gates of which are connected to each other and the gates are connected to the drain of one of the FETs. is equivalent to Two FETs can be easily integrated into one base 1- by using the same Moraron source and Goo 1-.

When the current mirror (31) is given a discharge current (current in the flowing direction) 11 to its gate by the input terminal (33), the current mirror (31) outputs the same value of current 11 from the output side train.
It acts like 1. When the current mirror (32) is given a sinking current (current in the flowing direction) (2) to the input terminal (34), the current mirror (32) acts to sink the same value of current I2 to the drain on the output side.

The source of the current mirror (31) is the positive power supply V. The source of the current mirror (32) is grounded. The output trains of these two current mirrors (311 (32)) are connected to each other at a node (35), and this node (35) is a MOS transistor that constitutes a 70-ting switch (1). Connected to the gate of FET.

Now, when the current I2 is larger than the current I2, the current mirror (31) is turned on, and the current mirror (32) sinks and generates the output current I2. Therefore, the node (35
) becomes a high level (approximately equal to the power supply voltage VD). This high level voltage
Since the voltage is applied to the N-MOS FET 1 constituting the switch (1[), this FET is turned on. Therefore, the current 11! (2) current J flows out from terminal (4) as output voltage I.

Conversely, when the current 11 is smaller than the current I2, the current mirror (32) is turned on and the current mirror (31) generates the output current 11. Therefore, the node (3
Since the potential of 5) becomes low level (mostly OV), the FET of the floating switch (1[) remains off. An output current of 1° is O.

When the current I2 is fixed as a constant value and the current 11 is varied, if the current 11 exceeds the current 12, the floating switch (1F) is turned on, and the output current ■ becomes the value of J. When the current 11 becomes smaller than the current I2, the floating switch (1F) turns off and the output current I
becomes 0. The circuit of FIG. 3 outputs an output current I according to the value of the current 11 with the current I2 as a threshold value. is converted into two levels, J and O. Furthermore, a floating switch is used in the circuit of FIG. Therefore, such a circuit is called a floating threshold switching circuit.

When considering that the current 11 is fixed at a constant value and the current I2 is changed, the current 1 becomes the threshold value.

In general, the circuit shown in Figure 3 has some interesting features. That is, the signal for controlling the floating switch (1[) on and off is a "voltage" signal (voltage mode) (potential of the node (35)). On the other hand, the signal switched by the floating switch (1F) (signal flowing through the floating switch) is a "current"
signal (current mode). In this way, a circuit that operates in a combination of voltage mode and current mode will be referred to as a "hybrid mode circuit-1." Such a hybrid mode circuit uses a circuit that operates in voltage mode as a control circuit. It is also possible to connect circuits that operate in current mode to these circuits as controlled circuits and control circuits, so they are extremely versatile and have a wide range of applications.

Incidentally, the signals compared by the control signal generation circuit (current comparison circuit) (C) are in current mode. Therefore, this third
It can be said that the circuit shown in the figure performs current/voltage/current mode conversion.

FIG. 4 shows a model of a floating threshold switching circuit.

FIG. 4(A) shows the current mirror (31) and its input terminal (33) in FIG. 3 as the current source (11), and the current mirror (32) and its input terminal (34) as the current source (11).
2) respectively. These currents +
The node between 1i (11) and (12) is indicated by the symbol (15). A current comparator circuit (C) can generally be characterized as two non-linear current sources connected in series and driven by a constant supply voltage.

FIG. 4(B) shows a circuit in which a P'-MOS F, ET is used as a floating switch. This FET has its source connected to a current source (2) and its drain connected to an output terminal (4). Also, the slope rate of this FET is the power supply voltage +V,
It is connected to the. In this circuit, when I < 12 and the potential at the node (15) becomes low level, F
ET (floating switch (in turns on,
Output current I. By closing, J is obtained. In addition, when the potential at the node (15) becomes high level in 11)■2, the FET
turns off and the output current ■.

becomes O.

(3,3) Floating Window Switching Circuit A window switch has two different threshold values and turns from on to off or from off to on when the value represented by the control signal reaches these threshold values. This will switch to . A window on switch is turned on when the value represented by the control signal is between two threshold values; The window off switch is in the off state.

A circuit including such a window switch in the form of a floating switch is a floating win-1-miu switching circuit, where the control signal is compared in the form of a current with a current representing two different threshold values.

A floating win F switching circuit is realized by combining two floating threshold switching circuits described above.

1 mulberry; The current representing the lower threshold value among the threshold values is assumed to be 11, and the current representing the higher threshold value is assumed to be 11. Also, the control current is assumed to be I.

Window on switch is ■, ≦1o≦” 11
' □ Figure 6 shows that the window on switch (W) with the function described above is connected to two 70-ting threshold switches. This figure shows how it is realized by connecting (IF) and (2F) in series. The floating switch (1F) remains off when ■<1, and turns on when I,≦1C[C. 70-ting switch (2
F) turns on when I≦IH, and 111〈IC
Then, it goes into the off state. These switches (1F
) and (2F) in series (that is, using AND logic), a window-on switch (W '') that turns on only when ≦1゜ [ ≦I□ can be realized. can be easily understood.

FIG. 7 shows various configurations of floating window-on switching circuits.

Figure 7(A) shows the window on switch (W
Two floating switches (IF) that make up
(2F) shows a circuit using an N-MOS FET. These floating switches (1
F) and (2F) have a current of 81! (2) and the output terminal (4) in series.

The setting switch (1[) is the current comparator circuit (
C1), the floating switches (2F) are each controlled by a current comparator circuit (C2). In these current comparison circuits (C1) and (C2), the nonlinear current sources are shown as (11), (12), (21), and (22), and their node points are shown as (15) and (25), respectively. .

Floating switch (1F) and current comparison circuit (C
1), the first floating threshold switching circuit connects the switch (2[) and the circuit (C2
) constitute a second floating threshold switching circuit, respectively. These floating threshold switching circuits are the same as those shown in FIG. 3 or FIG. 4(A). In the current comparison circuit (C1), current 1 (11)
From ■ is the control current. However, since the current 1i representing the lower threshold value is output from the current l1l (12), when I≦Io, the potential at the node (15) becomes high level and the floating switch (1F) is turned on. Current comparison circuit (C2
) from the current source (21) a current II+ representing the higher threshold value and from the current source (22) a control current I. are output respectively, so ■. ≦' 1
1, the potential at the node (25) becomes high level and the floating switch (2F) turns on. Therefore, I, ≦Ic≦1. Window only if
The on switch (W) turns on and the current source (2)
The current J generated from the output terminal (4) is the output current I. It closes and appears.

FIG. 7(B) shows an example in which a P-MOS FET is used as a floating switch (IF) (2F) constituting a window-on switch (Wo). The two floating threshold switching circuits constituting this floating one-window switching circuit correspond to those shown in FIG. 4(B). Currents generated from current sources (11), (12), and (21) and (22) connected to each current comparison circuit (C1) and (C2) are shown adjacent to the corresponding current sources, respectively. It is easy to understand that the circuit of FIG. 7(B) also achieves the function of the window-on switch shown in FIG. 5.

7(C) and (D) show a floating window-on switching circuit in which the window-on switch (Wo) is constructed from a complementary MO8 ((, -MOS) FET. (A) and (B)
From a comparison with , it is easy to understand that these circuits can also achieve the desired function.

A window off switching circuit is realized by connecting two floating threshold switches in parallel.

(3, 4) Narrow-sense literal circuits and closed-interval circuits Narrow-sense literals (literal) in analog and multi-value logic with r as the radix
) The operation of the circuit is expressed by the following equation.

...(i-i,) ...(1-2) Here, a and b are any positive values less than or equal to the base number r.

However, a<b.

Equation (1-1) is a general expression that is applicable to both analog operations and multivalued logic operations. Equation (1-2) is
This is an expression when considering a noise margin of ±0.5 in multi-value logic.

An example of a literal circuit in a narrow sense in which the noise margin expressed by equation (1-2) is considered is shown in FIG.

This literal circuit in a narrow sense is shown in Figure 7 (C
) is used.

A window is connected between the current source (43) providing a sinking input current representing the value of (r-1) and the output terminal (44).
Two 70-ting switches (411 (421 ((IF), (2m) constituting the on switch (Wo) are connected in series. These switches (41) (42
) is a C-MOS FET.

The input x is applied to the input terminal (40) as a sinking input current representing this value X. The input terminal (40) is M
It is connected to Goo 1 of a two-output current mirror (or current distribution circuit) (45) consisting of an OS FET. 2
Two sink currents of x value are output from the two output drains of the output current mirror (45).

One output drain of the two-output current mirror (45) is (
A current source (
46) at a node (48), and this node (48) is connected to goo1~ of one of the floating switches (41). 2 output current mirror (45)
A part of the current ill (46) and the node (48) constitute one current comparison circuit (C1).

The node (48) corresponds to the node (15) in FIG. 7(C). Further, the current source (46) corresponds to the current source (11) that provides the lower threshold current l, and a portion of the two-output current mirror (45) provides the control current I. current source (12)
It corresponds to

Similarly, the other output drain of the two-output current mirror (45) is connected to a current source (47) providing a sinking input current of (b+0.5) at a node (49); is the other floating switch (4
2) is connected to the gate. 2 output current mirror (4
5), the current m (47) and the node (49) constitute the other current comparison circuit (C2). Current source (
It is easy to understand that 47) corresponds to the current (current giving a higher threshold current of 1°) 1m(21) (FIG. 7(C)).

Therefore, the window-on switch (W□) is turned on only when (a-0, 5)≦X≦(b+o, 5), and the current 'm, (r-1) a of (43) A current representing "Y" is discharged from the output terminal (44) as an output current representing "X", and the output current becomes "O" at times other than the above.

The circuit of FIG. 8 cannot be applied when a<'0.5. An improved circuit that can be applied to any a is shown in FIG. In this figure, the same components as those shown in FIG. 8 are given the same reference numerals.

On the input side of the two-output current mirror (45), a current source (58) of a current representing the value of logic ii is connected at a node (51)', where the current representing the logic value 1 is the current representing the input X. will be added to. A current representing the value of x+1) is input to the two-output current mirror (45), and from the output drain of 2')' of this current mirror (45), (x+1>
The sink output current is output.

The current source (46) has been changed to provide an input current representing the value of a. A node (52) is provided between one of the output drains of the two-output current mirror (45) and the node (48), and the node (52) is connected to the current source (56) by 0.5
A current representing the value of is flowing. Therefore, a current representing the value (x+0', 5) flows from the node (48) to (52). The potential of the node (48) is (x100.5
Since it becomes low level when ')≧a, the floating switch (41) is turned on at this time. (x
+ O', 5)≧a can be rewritten as X≧(a-0,5).

The current source (47) has been changed to provide an input current representing the value of b. A node (53) is provided between the other output drain of the two-output current mirror (45) and the node (49), into which a current flowing from the current m (57) representing a value of 1.5 flows. are doing. Therefore, node (49)
A current of (x-0, 5) flows from (53) to (53). The potential of node □ point (49) becomes high level when b≧(×-0,5), so at this time floating...
The switch (42) is turned on. b≧(x−0,5) can be rewritten as (b+0.5)≧X.

Therefore, floating switches (41) and (4
2) Window on switch (Wn) consisting of
Is X≧(a-0,5)?”) (b + ,'0.5
)≧X, it is turned on and the calculation of equation (1-2) is performed.

If we assume that the value (r-1) which determines the value of the output current of the current source (43) is 4 variables, the circuits in Figs. In addition, in the circuit of Fig. 8, the current sources (46) and (4
If the output current of 7) is a current without representing the values of a and b, the circuit becomes a literal circuit in a narrow sense without considering the noise margin.

Furthermore, in the circuits of FIGS. 8 and 9, the current source (43)
may be used as a voltage source.

FIG. 10 shows the input/output characteristics of a literal circuit in a narrow sense in consideration of a noise margin of ±0.5 in the case of r=4, a=l b=2 (7).

In FIGS. 8 and 9, if the output current of current 'gA (43) represents a value of 1, these circuits are constructed with closed intervals.
al) becomes a circuit. The operation of the closed interval circuit is expressed by the following equation.

...(2-1) (35) Matching (delta literal J function) circuit and delta interval circuit matching (equiva
lence) is a delta literal J function (d
It is also called elta iteral J function), and its function is given by the following equation.

× −Jk(×) ...(3-1) ...(3-2) An example of a matching circuit considering the noise margin of ±0.5 expressed by equation (3-2) is It is shown in FIG. This circuit is very similar to the narrow literal circuit shown in FIG. Components that are the same as those shown in FIG. 9 are given the same reference numerals.

The input current representing the value of X flowing into the input terminal (40) has its direction reversed by a current mirror (55).

A node (54) is provided between this current mirror (55) and the two-output current mirror (45), and a node (54) is provided here.
9), a current representing a value of (k+1) flows in.

Therefore, the calculation (k+1-X) is performed at this node (54), and a current representing this value flows from the node (54) toward the gate of the two-output current mirror (45).

When (k+1-x)<O, the current mirror (45) acts as a backflow prevention diode, so the current mirror (45)
45) to the node (54) does not flow.

A sink output current with a value of (k+1-X) appears at the two output drains of the two-output current mirror (45). The current source (56), part of the two-output current mirror (45) and the node (52) constitute a current comparator circuit that controls the 7-day switching switch (41). Similarly, the current source (57), part of the two-output current mirror (45), and the node (53) serve as a current comparator circuit that controls the 70-ting switch (42). Therefore, the window-on switch (Wo) consisting of the two floating switches (41) and (42) satisfies 0.5≦(k+
1-x)≦1.5, that is, (k-0,5)≦X≦(k
+0.5), and the current WA (43
A current representing the value of (r-1) outputted from ) appears at the output terminal (44) through this turned-on window-on switch (W.). As a result, the (3-
2) The function expressed by the formula is achieved.

In addition, in the case of (k+1-x)<Q, (k11)<X, which is out of the range of (k-0,51≦X≦(k+0.5).At this time, the 2-output current Since the output current of the mirror (45) is O and the node (52) is at a high level, the floating switch (41) is kept in the off state.

FIG. 12 shows the input/output characteristics of the coincidence circuit of FIG. 11 in the case of r=4 and k=2.

In FIG. 11, it goes without saying that the value of r of the current source (43) and the value of k of the current source (59) can be arbitrarily set. Furthermore, by making the output currents of the current sources (56) and (57) as close to 1 as possible, the function expressed by equation (3-1) can be achieved.

Furthermore, in FIG. 11, the current source (59) is omitted,
The input current of value X is directly input to the two-output current mirror (45), and the output current of current m (56) is
,5) , Current? Output current of 0ii(57)! (k+0
．． 5) may be used.

The current source (43) may be a voltage source.

In FIG. 11, if the output current of the current source (43) represents a value of 1, this circuit becomes a delta interval circuit.

□ The operation of the delta interval circuit is expressed by the following formula:
...(4-11

[Brief explanation of drawings]

FIG. 1 shows the types of switches; FIG. 1(A) shows a grounded switch, and FIG. 1(B) shows a floating switch. FIG. 2 is for explaining the drawbacks of the grounded switch, and shows a state in which two circuits including grounded switches are connected in parallel. FIG. 3 shows two floating threshold switching circuits, and FIG. 4 shows models of two types of floating threshold switching circuits. Figure 5 is a graph showing the function of the window on switch, Figure 6 is an explanatory diagram showing how the window on switch is realized by connecting two floating switches in series, and Figure 7. 1A and 1B are circuit diagrams illustrating various forms of window-on switching circuits. Figure 8 is a circuit diagram showing an example of a literal circuit in a narrow sense;
The figure is a circuit diagram showing an example of an improved narrow-sense literal circuit, and FIG. 10 is a graph showing the input/output characteristics of these circuits. FIG. 11' is a circuit diagram showing an example of a coincidence circuit, and FIGS. 1 and 2 are graphs showing its input/output characteristics. (43)...Signal source (current source), (C1) (C2)
...Current comparison circuit, (W'') ...Window-on-sinch. Figure 1 above) CB) Figure 2, 91 <-+4-(-% υ 1.1 Procedure Shinichisho Calligraphy (method) June 25, 1985

Claims (1)

[Claims] (1) A signal source that generates a signal representing a predetermined value depending on the function of the circuit; a window-on switch connected between the signal source and the output terminal; 1 and the current representing the second threshold value, and when the value of the input current is between these threshold values, the window
A literal circuit with a current comparator circuit that outputs a control signal that turns on the on switch. (2) The literal circuit according to claim (1), wherein the predetermined value is a value of (r-1) where the radix is r. (3) The literal circuit according to claim (1), wherein the predetermined value is a logical value of 1. (4) The literal circuit according to claim (1), wherein the two threshold values are each determined by two constants. (5) The literal circuit according to claim (1), wherein the two threshold values are determined by one constant.