JPS61174809A - Signal delay circuit - Google Patents
Signal delay circuitInfo
- Publication number
- JPS61174809A JPS61174809A JP1420685A JP1420685A JPS61174809A JP S61174809 A JPS61174809 A JP S61174809A JP 1420685 A JP1420685 A JP 1420685A JP 1420685 A JP1420685 A JP 1420685A JP S61174809 A JPS61174809 A JP S61174809A
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- signal
- input
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は、磁気記録再生装置、特にビデオテープレフー
ダ(以下VTRと略す)に適用して好適な信号遅延回路
に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a signal delay circuit suitable for application to a magnetic recording/reproducing device, particularly a video tape recorder (hereinafter abbreviated as VTR).
映像信号の輪郭強調の中でテレビジョン画面の垂直方向
の輪郭強調として、特公昭55−19551に示される
様に1H(Hは水平走査時間)遅延線を用いたものが知
られている。この垂直方向の輪郭強調回路は1H遅延線
を用いた帰還系を構成し、1H遅延線の入力と出力の信
号を演算する形式であるが、演算部分での信号の位相合
わせを高精度に行なわなければならないという欠点があ
った。特にカラー信号の輪郭強調回路では、位相合わせ
が不充分であるとS/Nの劣化等が生じた。Among video signal edge enhancement methods, a method using a 1H (H is horizontal scanning time) delay line as shown in Japanese Patent Publication No. 55-19551 is known for enhancing the vertical edge of a television screen. This vertical contour enhancement circuit constitutes a feedback system using a 1H delay line, and calculates the input and output signals of the 1H delay line. There was a drawback that it had to be done. In particular, in the contour enhancement circuit for color signals, insufficient phase matching causes deterioration of S/N.
一方、「画像電子回路J PP、504〜315宇都宮
他著、コロナ社刊に示される様に、遅延線と加算回路を
用いたくし形フィルタが一般に知られている。これは第
4図に示す様に入力v1と、これを遅延線12により遅
延させた信号りとを加算回路13により加算し出力V、
を得ている。ガラス遅延線を用いた、くし形フィルタの
例を第5図に示す。入力信号v、は入力変換子1により
電気信号から物理的振動に変換され、ガラス遅延線3の
中を伝搬し、出力変換子2により再び電気信号だ変換さ
れる。この信号は加算抵抗4により入力v1と加算され
出力V、が得られている。くし形フィルタの周波数精度
はガラス遅延線3の寸法の精度に対応し、高精度なくし
形フィルタが現在得られている。輪郭強調回路は部分的
にくし形フィルタの構成をしているためこのくし形フィ
ルタを前1この輪郭強調回路に応用する事が有効である
と考えられたが、第5図の構成では遅延出力りとフィル
タ出力V、を完全に分離する事が出来ないため、くシ形
フィルタの輪郭強調回路への応用がなされていなかった
。On the other hand, as shown in "Image Electronic Circuit J PP, 504-315, written by Utsunomiya et al., published by Coronasha, a comb filter using a delay line and an addition circuit is generally known. This is shown in FIG. The input v1 and the signal delayed by the delay line 12 are added by the adding circuit 13, and the output V,
I am getting . An example of a comb filter using a glass delay line is shown in FIG. The input signal v, is converted from an electrical signal to a physical vibration by the input transducer 1, propagates through the glass delay line 3, and is converted back to an electrical signal by the output transducer 2. This signal is added to the input v1 by the adding resistor 4 to obtain the output V. The frequency accuracy of the comb filter corresponds to the dimensional accuracy of the glass delay line 3, and highly accurate comb filters are currently available. Since the contour enhancement circuit partially has a configuration of a comb filter, it was thought that it would be effective to apply this comb filter to the contour enhancement circuit in the previous section, but in the configuration shown in Figure 5, the delayed output Since it is not possible to completely separate the filter output V from the filter output V, the comb filter has not been applied to a contour enhancement circuit.
本発明の目的は、前述した従来方式の問題点を解決した
信号遅延回路を得るものである。An object of the present invention is to obtain a signal delay circuit that solves the problems of the conventional method described above.
上記目的を達成するために、本発明は、ガラス遅延線の
出力を独立に2系統取り出せる構造にし、各々、くし形
フィルタ出力、fH遅延出力が得られる様、構成したも
のである。In order to achieve the above object, the present invention has a structure in which the outputs of the glass delay line can be taken out independently in two systems, and are configured so that a comb filter output and an fH delay output can be obtained respectively.
以下本発明の一実施例を図を用いて説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第5図の従来例と対応する部分には同一符号を付し、一
部説明を省略する。第1図は、本発明の第1の実施例で
、第5図の従来例と異なる゛部分は、同一の出力変換子
2の異なる2ケ所の部分より出力をとり出し、一方に従
来と同じく、加算抵抗4により入力aを加えて(し形フ
ィルタ出力Cとし、他方を遅延出力すとした遅延回路9
を構成した事である。同一の出力変換子2の異なる部分
から出力をとり出す事により、くし形フィルタ出力Cと
1H遅延出力すとを分離して得る事が出来る。Components corresponding to those in the conventional example shown in FIG. 5 are given the same reference numerals, and some explanations will be omitted. FIG. 1 shows a first embodiment of the present invention. The difference from the conventional example shown in FIG. 5 is that the output is taken out from two different parts of the same output converter 2, and , a delay circuit 9 in which the input a is added through the addition resistor 4 (rectangular filter output C, and the other is outputted with a delay)
This is what constituted the . By extracting outputs from different parts of the same output converter 2, the comb filter output C and the 1H delayed output can be obtained separately.
第2図は本発明の第2の実施例で、第5図の従来例及び
、第1の実施例と異なる部分は出力変換子を2つ独立に
設け、一方の出力変換子14からは1H遅延出力すが得
られ、他方の出力変換子5には加算抵抗4により入力a
を加算してくし形フィルタ出力Cが得られる様にし遅延
回路10を構成した事である。2つの独立した出力変換
子5,14を用いる事により第1の実施列に比べ、更に
分離度の高い1H遅延出力とくし形フィルタ出力を得る
事が出来る。FIG. 2 shows a second embodiment of the present invention, and the difference from the conventional example in FIG. 5 and the first embodiment is that two output converters are provided independently, and from one output converter 14, A delayed output is obtained, and the other output converter 5 receives an input a by an adding resistor 4.
The delay circuit 10 is constructed in such a way that the comb filter output C is obtained by adding the above. By using two independent output converters 5 and 14, it is possible to obtain a 1H delay output and a comb filter output with a higher degree of separation than in the first implementation column.
第3図は本発明の応用列で、第1又は第2の実施例の遅
延素子9又は10を用いたカラー信号の輪郭強調回路あ
るいは8/N改善回路である。FIG. 3 shows an application of the present invention, which is a color signal contour enhancement circuit or 8/N improvement circuit using the delay element 9 or 10 of the first or second embodiment.
ガラス遅延線3の入力9はガラス遅延線3による遅延出
力すを減衰回路6によりα倍(α<1)した信号dを入
力Viから減算回路8により減算したものである。NT
SC万式の場合〜カラー信号は1H毎に位相が反転して
いるから、この帰還回路は正帰還回路忙なる。前述した
様にガラス遅延線3の出力Cには加算抵抗4により1H
遅延出力に入力aが加算される。カラー信号は1H毎に
位相が反転してい為かへ、出方CMは、入力aと遅延信
椛の差分が得られる。この差分は、垂直方向の輪郭成分
あるいは雑音等の水平走査線間の無相関成分に相当して
おり、減衰回路7によりβ倍(βく1)され加減算回路
11により入力Viと加算あるいは減算され出力v0が
得られる。加算された場合、輪郭強調効果が得られ、減
算した場合にS/N改善効果が得られる。又、減衰回路
7に非線形特性を持たせて、波形応答の劣化を防止する
事も可能である。遅延線と演算部に前述した遅延回路9
又は10を用いる事により位相合わせの調整箇所゛が減
り、更に性能の向上を計ることが出来る。The input 9 of the glass delay line 3 is obtained by subtracting the signal d obtained by multiplying the delayed output by the glass delay line 3 by α (α<1) by an attenuation circuit 6 from the input Vi by a subtraction circuit 8. N.T.
In the case of the SC system, the phase of the color signal is inverted every 1H, so this feedback circuit is busy as a positive feedback circuit. As mentioned above, the output C of the glass delay line 3 is connected to 1H by the addition resistor 4.
Input a is added to the delayed output. Since the phase of the color signal is inverted every 1H, the output CM can be obtained by the difference between the input a and the delayed signal. This difference corresponds to vertical contour components or uncorrelated components between horizontal scanning lines such as noise, and is multiplied by β (β-1) by the attenuation circuit 7 and added or subtracted from the input Vi by the addition/subtraction circuit 11. Output v0 is obtained. When added, an edge enhancement effect is obtained, and when subtracted, an S/N improvement effect is obtained. Furthermore, it is also possible to prevent the waveform response from deteriorating by providing the attenuation circuit 7 with nonlinear characteristics. The delay circuit 9 described above is included in the delay line and the calculation section.
Alternatively, by using 10, the number of adjustment points for phase matching can be reduced, and the performance can be further improved.
以上述べた様に、本発明によれば、同一のガラス遅延線
を用いて、1H遅延出力とくし形フィルタ出力とを独立
に得る事が出来る。また遅延素子を用いた輪郭強調回路
あるいは、S/N改善回路によりカラー信号の輪郭強調
あるいはS/Nの改善を性能良(行なう事が出来る。As described above, according to the present invention, the 1H delay output and the comb filter output can be obtained independently using the same glass delay line. Furthermore, it is possible to enhance the contour of a color signal or improve the S/N ratio with good performance by using an edge enhancement circuit using a delay element or an S/N improvement circuit.
第1図、第2図は本発明の信号遅延回路の実施列を示す
回路図、第3図は本発明の他の実施列を示す回路図、第
4図、第5図は従来の信号遅延回路の回路図である。
b・・・1H遅延出力% C・・・くし形フィルタ出
力、2・・・出力変換子、 5・・・出力変換子、1
4・・出力変換子、 6,7・・・減衰回路、8・・
・減算回路、 11・・・加減算宙。1 and 2 are circuit diagrams showing an implementation of the signal delay circuit of the present invention, FIG. 3 is a circuit diagram showing another implementation of the invention, and FIGS. 4 and 5 are circuit diagrams showing conventional signal delay circuits. It is a circuit diagram of a circuit. b...1H delay output % C...comb filter output, 2...output converter, 5...output converter, 1
4... Output converter, 6, 7... Attenuation circuit, 8...
・Subtraction circuit, 11...Addition and subtraction space.
Claims (1)
物理的振動を伝搬、遅延させるガラス遅延線と、遅延さ
れた物理的振動を電気信号に変換する出力変換子と、該
出力変換子の異なる2つの部分から出力信号を取り出し
、一方を遅延出力とし、他方に、加算抵抗又は加算容量
により入力信号と加算し、くし形フィルタ出力を独立に
取り出すことを特徴とする信号遅延回路。 2、前記出力変換子を複数個設け、一方の出力変換子か
ら得られた出力を遅延出力とし、他方の出力変換子から
得られた出力に加算抵抗又は加算容量により入力信号と
加算し、くし形フィルタ出力を独立に取り出す事を特徴
とする特許請求の範囲第1項に記載された信号遅延回路
。[Claims] 1. An input transducer that converts electrical signals into physical vibrations, a glass delay line that propagates and delays the physical vibrations, and an output converter that converts the delayed physical vibrations into electrical signals. The output converter is characterized in that output signals are taken out from two different parts of the output converter, one is used as a delayed output, and the other is added to the input signal using a summing resistor or a summing capacitor, and the comb filter output is taken out independently. signal delay circuit. 2. A plurality of the output converters are provided, the output obtained from one output converter is used as a delayed output, and the output obtained from the other output converter is added to the input signal using an adding resistor or an adding capacitor, and the output is combed. 2. The signal delay circuit according to claim 1, wherein the signal delay circuit independently extracts the output of the shaped filter.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1420685A JPS61174809A (en) | 1985-01-30 | 1985-01-30 | Signal delay circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1420685A JPS61174809A (en) | 1985-01-30 | 1985-01-30 | Signal delay circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61174809A true JPS61174809A (en) | 1986-08-06 |
Family
ID=11854630
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1420685A Pending JPS61174809A (en) | 1985-01-30 | 1985-01-30 | Signal delay circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61174809A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61131127U (en) * | 1985-02-01 | 1986-08-16 | ||
JPH04350452A (en) * | 1991-05-27 | 1992-12-04 | Noritz Corp | Apparatus for hot bath with bubbling function |
-
1985
- 1985-01-30 JP JP1420685A patent/JPS61174809A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61131127U (en) * | 1985-02-01 | 1986-08-16 | ||
JPH04350452A (en) * | 1991-05-27 | 1992-12-04 | Noritz Corp | Apparatus for hot bath with bubbling function |
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