JPS61174625A - Induction heating base stand of semiconductor wafer - Google Patents
Induction heating base stand of semiconductor waferInfo
- Publication number
- JPS61174625A JPS61174625A JP1520885A JP1520885A JPS61174625A JP S61174625 A JPS61174625 A JP S61174625A JP 1520885 A JP1520885 A JP 1520885A JP 1520885 A JP1520885 A JP 1520885A JP S61174625 A JPS61174625 A JP S61174625A
- Authority
- JP
- Japan
- Prior art keywords
- induction heating
- base
- heating base
- opening
- recession
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02529—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明はエピタキシャル成長に用いる半導体ウェハの誘
導加熱基台に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an induction heating base for semiconductor wafers used for epitaxial growth.
(従来の技術) 半導体ウェハにエピタキシャル成長を行う場合。(Conventional technology) When performing epitaxial growth on semiconductor wafers.
従来は第2図および第3図に示すような形状の誘導加熱
基台al+ agが用いられていた。Conventionally, an induction heating base AL+AG having a shape as shown in FIGS. 2 and 3 has been used.
すなわち、第2図に示す誘導加熱基台a、には。That is, for the induction heating base a shown in FIG.
半導体ウェハCの形状にほぼ適合した開口凹部eが形成
され、第3図に示す誘導加熱基台a8には。An opening recess e that substantially conforms to the shape of the semiconductor wafer C is formed in the induction heating base a8 shown in FIG.
底面部すが下方に湾曲した形状の開口凹部eが形成され
ていた。An opening recess e having a downwardly curved shape was formed in the bottom surface.
(発明が解決しようとする問題点)
ところが、第2図に示す形状の誘導加熱基台a1では、
エピタキシャル成長層の膜厚、比抵抗値の分布の均一性
は良好であるが、半導体ウェハCにスリップラインが生
じ好ましくないという問題があった。(Problems to be Solved by the Invention) However, in the induction heating base a1 having the shape shown in FIG.
Although the thickness of the epitaxially grown layer and the uniformity of the distribution of specific resistance values were good, there was a problem in that slip lines were formed on the semiconductor wafer C, which was not desirable.
また、第3図に示す形状の誘導加熱基台a2では、開口
凹部eの底面部すと半導体ウェハCとの間に生じる空部
dによりスリップラインの発生は防げるが、半導体ウェ
ハCの中央部では加熱基台a2からの熱伝導が悪くなる
ため、半導体ウェハCの中央部の温度が半導体ウェハC
の周縁部の温度よりも低下し、エピタキシャル成長層の
膜厚。In addition, in the induction heating base a2 having the shape shown in FIG. In this case, since the heat conduction from the heating base a2 becomes poor, the temperature at the center of the semiconductor wafer C becomes lower than that of the semiconductor wafer C.
The temperature at the periphery of the epitaxially grown layer decreases.
比抵抗値の分布が悪くなるという問題があった。There was a problem that the distribution of specific resistance values deteriorated.
(問題点を解決するための手段) 本発明にかかる半導体ウェハの誘導加熱基台は。(Means for solving problems) A base for induction heating of semiconductor wafers according to the present invention.
基台の表面に形成されたウェハを載置する開口凹部の底
面が周縁部から中央部に向けて深くなる湾曲状に形成さ
れた誘導加熱基台において、i&台の裏面に、前記開口
凹部と同心円状でかつ開口凹部の径よりも小径な一また
は複数の環状溝部が形成されてなるものである。In an induction heating base formed in a curved shape in which the bottom surface of an opening recess for placing a wafer formed on the surface of the base becomes deeper from the periphery toward the center, the opening recess and One or more annular grooves are formed that are concentric and have a diameter smaller than the diameter of the opening recess.
(作用)
誘導加熱基台の裏面に環状溝部を形成することにより、
開口凹部の底面中央部の温度を底面周縁部の温度より高
くして、半導体ウェハをこの間口凹部に載置し加熱処理
した際の半導体ウェハ表面の温度分布を均一化する。(Function) By forming an annular groove on the back side of the induction heating base,
The temperature at the center of the bottom of the opening recess is made higher than the temperature at the periphery of the bottom to equalize the temperature distribution on the surface of the semiconductor wafer when the semiconductor wafer is placed in the opening recess and heat-treated.
(実施例)
第1図(al (b)は本発明にかかる誘導加熱基台1
を示している。(Example) FIG. 1 (al (b)) shows an induction heating base 1 according to the present invention.
It shows.
誘導加熱基台(以下単に基台という)1は、基台1の表
面2に開口凹部3が形成され、基台1の裏面4にこの間
口凹部3と同心円状でかつ開口凹部3の径よりも小径な
三つの環状溝部5a、5b。The induction heating base (hereinafter simply referred to as the base) 1 has an opening recess 3 formed on the front surface 2 of the base 1, and a diameter of the opening recess 3 that is concentric with the opening recess 3 and on the back surface 4 of the base 1. The three annular grooves 5a and 5b are also small in diameter.
5Cが形成されたものである。開口凹部3の径はシリコ
ンウェハ6の径よりも若干大きく形成され。5C was formed. The diameter of the opening recess 3 is formed to be slightly larger than the diameter of the silicon wafer 6.
かつ、開口凹部3の底面7は周縁部7aから中央部7b
に向けて深くなる湾曲状に形成されている。In addition, the bottom surface 7 of the opening recess 3 extends from the peripheral portion 7a to the central portion 7b.
It is formed in a curved shape that deepens towards the end.
基台1は、カーボン材上に化学蒸着(CV D)によっ
てSzCを約100μmの厚さに形成したものである。The base 1 is made by forming SzC on a carbon material by chemical vapor deposition (CVD) to a thickness of about 100 μm.
これは、シリコンウェハ6を処理する際、基台1が10
00〜1200℃の温度に加熱されるため、カーボンが
気化してシリコンウェハ6の中に入るのを防ぐ目的でカ
ーボン材上にS、iCをコーティングするものである。This means that when processing the silicon wafer 6, the base 1 is
Since the carbon material is heated to a temperature of 00 to 1200° C., S and iC are coated on the carbon material in order to prevent the carbon from vaporizing and entering the silicon wafer 6.
シリコンウェハ6と開口凹部3の底面7との間隔X、は
エピタキシャル成長条件によって異なる。The distance X between the silicon wafer 6 and the bottom surface 7 of the opening recess 3 varies depending on the epitaxial growth conditions.
すなわち、シリコンソースとしてSiH4を使用する場
合は、成長温度が1050〜1100℃と低いので間隔
X、を小さくシ、シリコンソースとしてS!HCjli
、もしくはS五〇 l aを使用する場合は、成長温度
が1150〜1200℃と高いので間隔X1を大きくす
る。また、シリコンソースとしてS t Hz Cl
tを使用する場合は、成長温度が1100〜1150℃
であるので、前記した両間隔の中程度の間隔とする。一
方、環状溝部5a。That is, when using SiH4 as a silicon source, the growth temperature is as low as 1050 to 1100°C, so the interval X is small, and S! HCjli
Alternatively, when using S50 la, the growth temperature is as high as 1150 to 1200°C, so the interval X1 is increased. In addition, as a silicon source, S t Hz Cl
When using t, the growth temperature is 1100-1150℃
Therefore, the spacing is set to be an intermediate value between the above-mentioned two spacings. On the other hand, the annular groove portion 5a.
5b、5cの各深さX2もエピタキシャル成長条件に応
じて適宜決定される。The depths X2 of 5b and 5c are also appropriately determined depending on the epitaxial growth conditions.
この環状溝部5a、5b、5cでは1表皮効果により、
加熱基台の単位面積当たりの発熱量が溝のない部分より
も大きいため1周辺部よりも温度が上昇する。したがっ
て、開口凹部3の底面中央部の温度を上げることによっ
て、シリコンウェハ6の表面温度分布の均一化を図るこ
とができる。In these annular grooves 5a, 5b, and 5c, due to the skin effect,
Since the amount of heat generated per unit area of the heating base is larger than that of the part without grooves, the temperature rises more than that of one peripheral part. Therefore, by increasing the temperature at the center of the bottom surface of the opening recess 3, the surface temperature distribution of the silicon wafer 6 can be made uniform.
なお、上記実施例では、環状溝部を三個形成しているが
、三個に限定されるものではない。In the above embodiment, three annular grooves are formed, but the number is not limited to three.
また、スリップライン2 エピタキシャル成長層の膜厚
、比抵抗値の分布の悪化は処理されるウェハ径が大きい
ほど顕著になるが9本発明にかかる誘導加熱基台の使用
効果は直径4インチ以上のウェハで特に有効であった。In addition, the deterioration of the distribution of the film thickness and specific resistance value of the epitaxially grown layer becomes more pronounced as the diameter of the wafer to be processed increases, but the effect of using the induction heating base according to the present invention is It was particularly effective.
(発明の効果)
以上説明したように1本発明にかかる半導体ウェハの誘
導加熱基台によれば、処理ウェハのエピタキシャル成長
層の膜厚、比抵抗値の分布を均一に保ち、かつスリップ
ラインの発生を抑制することができる。(Effects of the Invention) As explained above, according to the induction heating base for semiconductor wafers according to the present invention, the film thickness and resistivity distribution of the epitaxial growth layer of the processed wafer can be kept uniform, and slip lines can be generated. can be suppressed.
第1図1a)Cb>は本発明にかかる誘導加熱基台の溝
部縦断面図および底面図、第2図および第3図は従来の
誘導加熱基台の溝部縦断面図である。
1・・・誘導加熱基台 2・・・表面3・・・開口凹
部 4・・・裏面5 a、 5 b、 5
c・=環状溝部6・・・シリコンウェハ(半導体ウェハ
)7・・・底面
ほか1名1a)Cb> is a longitudinal sectional view and a bottom view of a groove portion of an induction heating base according to the present invention, and FIGS. 2 and 3 are longitudinal sectional views of a groove portion of a conventional induction heating base. 1... Induction heating base 2... Front surface 3... Opening recess 4... Back surface 5 a, 5 b, 5
c = annular groove 6...silicon wafer (semiconductor wafer) 7...bottom and 1 other person
Claims (1)
口凹部の底面が周縁部から中央部に向けて深くなる湾曲
状に形成された誘導加熱基台において、誘導加熱基台の
裏面に、前記開口凹部と同心円状でかつ開口凹部の径よ
りも小径な一または複数の環状溝部が形成されてなるこ
とを特徴とする半導体ウェハの誘導加熱基台。1) In an induction heating base formed in a curved shape in which the bottom surface of an opening recess on the surface of the base for placing a semiconductor wafer becomes deeper from the periphery toward the center, on the back surface of the induction heating base. An induction heating base for a semiconductor wafer, characterized in that one or more annular grooves are formed concentrically with the opening recess and having a smaller diameter than the opening recess.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1520885A JPS61174625A (en) | 1985-01-29 | 1985-01-29 | Induction heating base stand of semiconductor wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1520885A JPS61174625A (en) | 1985-01-29 | 1985-01-29 | Induction heating base stand of semiconductor wafer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61174625A true JPS61174625A (en) | 1986-08-06 |
Family
ID=11882451
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1520885A Pending JPS61174625A (en) | 1985-01-29 | 1985-01-29 | Induction heating base stand of semiconductor wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61174625A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5074017A (en) * | 1989-01-13 | 1991-12-24 | Toshiba Ceramics Co., Ltd. | Susceptor |
-
1985
- 1985-01-29 JP JP1520885A patent/JPS61174625A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5074017A (en) * | 1989-01-13 | 1991-12-24 | Toshiba Ceramics Co., Ltd. | Susceptor |
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