JPS61172358A - Integrated circuit utilizing peltier cooling method - Google Patents
Integrated circuit utilizing peltier cooling methodInfo
- Publication number
- JPS61172358A JPS61172358A JP1320685A JP1320685A JPS61172358A JP S61172358 A JPS61172358 A JP S61172358A JP 1320685 A JP1320685 A JP 1320685A JP 1320685 A JP1320685 A JP 1320685A JP S61172358 A JPS61172358 A JP S61172358A
- Authority
- JP
- Japan
- Prior art keywords
- heat
- integrated circuit
- cooling
- peltier
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/38—Cooling arrangements using the Peltier effect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はいわゆるICの発熱問題をペルチェ効果冷却を
使って解決する点にある。従来の7ムダール塔にによる
放熱は塔自体が大きく、基板同志を密に重ねることがで
きなかった1本発明では除熱効果が大きいため、基板同
志を従来の数分の1の間隔で匣体内へ収納できるように
なる他、ICそのものの集積度をあげても熱問題から解
放せられる。DETAILED DESCRIPTION OF THE INVENTION The present invention is to solve the so-called IC heat generation problem using Peltier effect cooling. Heat dissipation by the conventional 7 Mudar tower was not possible due to the large size of the tower itself, and it was not possible to closely stack the substrates.In the present invention, the heat removal effect is large, so the substrates are spaced within the box at a fraction of the distance of the conventional method. In addition to being able to be stored in the IC, increasing the degree of integration of the IC itself also eliminates heat problems.
具体的には
1.10回路のごく近く、つまり、個々のIC回路本体
2に近い、素子1内部またはIC素子に接するようなと
ころでペルチェ冷却を起こし、発熱部は本体基板と約1
c−離れた、個々のICの発熱部だけが突出するように
形成された任切り板の上側に位置させ、そこで放熱させ
ることを特徴とするペルチェ冷却法利用の集積回路2.
IC素子1内部つまり集積回路面2と平行に素子内部に
一体となって形成された吸熱部3をもち、そこへの電力
が基板4につけられた電力供給用回路から、信号入力端
子と同様にピン5より与えられ、ペルチェ発熱部6だけ
が突出するような穴フの配置をもつ仕切り板8を本体基
板1にかぶせるような構成をも特許請求の範囲第1項記
載のペルチェ冷却法利用の集積回路3、多数のICが配
置された基板11とそのIC配置と同じ配置をもつペル
チェ吸熱部13が任切り板12下面、発熱部14が上面
くるように配置されされ、冷却電力は任切り板12上の
プリント配線からとられ、これら吸熱部が通常のIC上
面に物理的に接触される形になっている特許請求の範囲
第1項記載のペルチェ冷却法利用の集積回路
4、IC回路内部に冷却素子をもつものにおいて任切り
板を省略し、IC上部で自然放熱をさせる特許請求の範
囲第1項記載のペルチェ冷却法利用の集積回路というも
のである。Specifically, Peltier cooling occurs very close to the 1.10 circuit, that is, close to the individual IC circuit body 2, inside the element 1 or in contact with the IC element, and the heat generating part is approximately 1 inch away from the main body board.
c- An integrated circuit using the Peltier cooling method characterized in that it is placed above a separate plate formed so that only the heat generating parts of the individual ICs protrude, and the heat is radiated there.2.
The IC element 1 has a heat absorbing part 3 integrally formed inside the element parallel to the integrated circuit surface 2, and power thereto is supplied from a power supply circuit attached to the substrate 4 in the same way as the signal input terminal. A configuration in which the main substrate 1 is covered with a partition plate 8 having a hole provided by the pin 5 and having holes such that only the Peltier heat generating part 6 protrudes can also be used to utilize the Peltier cooling method described in claim 1. An integrated circuit 3, a substrate 11 on which a large number of ICs are arranged, and a Peltier heat absorption section 13 having the same arrangement as the IC arrangement are arranged so that the bottom surface of the optional board 12 and the heat generating section 14 are placed on the top surface, and the cooling power is distributed as desired. The integrated circuit 4 using the Peltier cooling method according to claim 1, which is taken from the printed wiring on the board 12, and whose heat absorbing parts are in physical contact with the upper surface of an ordinary IC, is an IC circuit. This is an integrated circuit using the Peltier cooling method according to claim 1, in which the optional plate is omitted in the case of an integrated circuit having a cooling element inside, and heat is naturally dissipated in the upper part of the IC.
第1図に特許請求の範囲第2項に記載のICの透視斜視
図、第2図に側断面図、第3図に穴7あき任切り板8と
組み合わせた場合の断面図、第4図に穴あき任切り板8
と本発明のICを多数もつ基板4の斜視図を示す。第3
図では放熱部の冷却に強制的にファンよりの空気を流す
方法を示しているが、この部分はヒートパイプにより連
結して 体外で放熱させる静的な方法をとることも可能
である。第2図におけるN型導体としてはBi2Te3
゜Bi、PbTeなどP型導体としてはB13Te3.
Bi2Te3、Sb2Te3などがあげられ、吸熱部3
はCuなどである。電流は■、9は放熱フィン、10は
断熱材を示す。FIG. 1 is a perspective view of an IC according to claim 2, FIG. 2 is a side sectional view, FIG. 3 is a sectional view of the IC in combination with a perforated plate 8, and FIG. 4. Perforated cutting board 8
FIG. 4 shows a perspective view of a substrate 4 having a large number of ICs of the present invention. Third
The figure shows a method of forcing air from a fan to cool the heat dissipation part, but it is also possible to connect this part with a heat pipe and use a static method to radiate heat outside the body. The N-type conductor in Figure 2 is Bi2Te3
゜P-type conductors such as Bi and PbTe include B13Te3.
Bi2Te3, Sb2Te3, etc. are mentioned, and the heat absorption part 3
is Cu, etc. The current is ■, 9 is a heat radiation fin, and 10 is a heat insulating material.
供給電圧は低くてよいため、IC同志を直列につなぐと
適当な電圧が得られる。Since the supply voltage may be low, an appropriate voltage can be obtained by connecting ICs in series.
特許請求の範囲第3項に示すものはICは通常のものを
使用し、その上に吸熱部を接触させて、冷却する方法で
ある。第5図に上面下面にそれぞれ放熱部14、吸熱部
13を設けたプリント配線された任切り板12の断面図
を示す、第6図はIC基板11とこの任切り板12の斜
視図を示す、この両者の接触を良(するためには、IC
上面または吸熱板下面に熱伝導率がよく、かつ′柔軟性
のあるゴムやプラスチックの薄板をつけるとよい。What is shown in claim 3 is a method of cooling by using an ordinary IC and bringing a heat absorbing part into contact with the IC. FIG. 5 shows a cross-sectional view of a printed wiring board 12 with a heat dissipating section 14 and a heat absorbing section 13 on the upper and lower surfaces, respectively, and FIG. 6 shows a perspective view of the IC board 11 and this switching board 12. , in order to make good contact between the two, the IC
It is advisable to attach a flexible rubber or plastic thin plate with good thermal conductivity to the upper surface or the lower surface of the heat absorbing plate.
本発明の冷却素子への電流は、適当な位置に取り付けた
温度センサー荷より、ハード的にPIi能させるのが一
般的であろうが、センサーよりの情報を読み取ってソフ
ト的に管理することも可能である。Generally, the current to the cooling element of the present invention is controlled by hardware using a temperature sensor mounted at an appropriate location, but it may also be managed by software by reading information from the sensor. It is possible.
本発明による冷却は必要なところを局所的に冷やすもの
であり、電子冷凍法の効率の悪さもそれほど苦にならな
い。また特許請求の範囲第4項にいうように、IC以外
の部分を耐熱的につくると、仕切り版やファン、ヒート
パイプなどを省略し、内部の温度が普通以上に上がって
も、機能的に差し支えないということになる可能性も十
分にある。The cooling according to the present invention locally cools the necessary areas, and the inefficiency of the electronic freezing method is not a big problem. In addition, as stated in claim 4, if parts other than the IC are made heat-resistant, partition plates, fans, heat pipes, etc. can be omitted, and even if the internal temperature rises above normal, it will not function. There is a good chance that it will not be a problem.
第1図は本発明のIC素子透視斜視図
第2図はその断面図
第3図は仕切り板と組み上げたときの断面図t1′&4
図は仕切り板とIC基板の斜視図第5図は冷却素子をも
つ仕切り板の断面図#l&6図は上述仕切り板と普通の
IC基板の斜視図1、IC素子 2.集積回路本体
部分3、吸熱板部 4.基板 5.冷却電力用ピン
6、放熱部
7、穴 8.仕切り板 9.放熱フィン1
0゜断熱材 11.普通のIC付き基板12゜
冷却素子付仕切り板 13.吸熱部14、放熱
部
特許登録出願人 増 淵 秀 雄〕 g図Fig. 1 is a perspective view of an IC element of the present invention; Fig. 2 is a cross-sectional view thereof; Fig. 3 is a cross-sectional view when assembled with a partition plate t1'& 4.
The figure is a perspective view of the partition plate and an IC board. Figure 5 is a cross-sectional view of a partition plate with a cooling element. Integrated circuit main body portion 3, heat absorption plate portion 4. Substrate 5. Cooling power pin 6, heat radiation part 7, hole 8. Partition plate 9. Heat radiation fin 1
0° insulation material 11. Ordinary IC board 12° Partition plate with cooling element 13. Heat absorption part 14, heat radiation part patent registration applicant Hideo Masubuchi] Figure g
Claims (1)
2に近い、素子1内部またはIC素子に接するようなと
ころでペルチェ冷却を起こし、発熱部は本体基板と約1
cm離れた、個々のICの発熱部だけが突出するように
形成された任切り板の上側に位置させ、そこで放熱させ
ることを特徴とするペルチェ冷却法利用の集積回路 2、IC素子1内部つまり集積回路面2と平行に素子内
部に一体となって形成された吸熱部3をもち、そこへの
電力が基板4につけられた電力供給用回路から、信号入
力端子と同様にピン5より与えられ、ペルチェ発熱部6
だけが突出するような穴7の配置をもつ仕切り板8を本
体基板1にかぶせるような構成をもつ特許請求の範囲第
1項記載のペルチェ冷却用の集積回路 3、多数のICが配置された基板11とそのIC配置と
同じ配置をもつペルチェ吸熱部13が任切り板12下面
、発熱部14が上面くるように配置されされ、冷却電力
は任切り板12上のプリント配線からとられ、これら吸
熱部が通常のIC上面に物理的に接触される形になって
いる特許請求の範囲第1項記載のペルチェ冷却法集積回
路 4、IC回路内部に冷却素子をもつものにおいて任切り
板を省略し、IC上部で自然放熱をさせる特許請求の範
囲第1項記載のペルチェ冷却法利用の集積回路[Claims] 1. Peltier cooling occurs very close to the IC circuit, that is, close to each IC circuit main body 2, inside the element 1 or in contact with the IC element, and the heat generating part is approximately 1 inch from the main body board.
An integrated circuit 2 using the Peltier cooling method, which is located above an arbitrary board formed so that only the heat-generating parts of each IC protrude, and radiates heat there; It has a heat absorption part 3 integrally formed inside the element parallel to the integrated circuit surface 2, and power to it is supplied from a power supply circuit attached to the substrate 4 through pin 5 in the same way as the signal input terminal. , Peltier heating section 6
The integrated circuit 3 for Peltier cooling according to claim 1 is configured such that the main substrate 1 is covered with a partition plate 8 having holes 7 arranged such that only the holes 7 protrude from the partition plate 8, in which a large number of ICs are arranged. The Peltier heat absorbing section 13, which has the same arrangement as the board 11 and its IC arrangement, is arranged so that the bottom surface of the optional board 12 and the heat generating section 14 are placed on the top surface, and the cooling power is taken from the printed wiring on the selective board 12. The Peltier cooling method integrated circuit 4 according to claim 1, in which the heat absorbing part is in a form that physically contacts the top surface of a normal IC, and the optional plate is omitted in the IC circuit having a cooling element inside the IC circuit. An integrated circuit using the Peltier cooling method according to claim 1, which naturally dissipates heat in the upper part of the IC.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1320685A JPS61172358A (en) | 1985-01-26 | 1985-01-26 | Integrated circuit utilizing peltier cooling method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1320685A JPS61172358A (en) | 1985-01-26 | 1985-01-26 | Integrated circuit utilizing peltier cooling method |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61172358A true JPS61172358A (en) | 1986-08-04 |
Family
ID=11826679
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1320685A Pending JPS61172358A (en) | 1985-01-26 | 1985-01-26 | Integrated circuit utilizing peltier cooling method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61172358A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6226994B1 (en) * | 1997-07-02 | 2001-05-08 | Sel Application Co., Ltd. | Thermoelectric element and thermoelectric cooling or heating device provided with the same |
WO2002049105A3 (en) * | 2000-12-11 | 2002-12-05 | Ibm | Thermoelectric spot coolers for rf and microwave communication integrated circuits |
US6521991B1 (en) | 1999-11-26 | 2003-02-18 | Morix Corporation | Thermoelectric module |
US6945054B1 (en) | 2002-10-04 | 2005-09-20 | Richard S. Norman | Method and apparatus for cooling microelectronic complexes including multiple discrete functional modules |
-
1985
- 1985-01-26 JP JP1320685A patent/JPS61172358A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6226994B1 (en) * | 1997-07-02 | 2001-05-08 | Sel Application Co., Ltd. | Thermoelectric element and thermoelectric cooling or heating device provided with the same |
US6521991B1 (en) | 1999-11-26 | 2003-02-18 | Morix Corporation | Thermoelectric module |
WO2002049105A3 (en) * | 2000-12-11 | 2002-12-05 | Ibm | Thermoelectric spot coolers for rf and microwave communication integrated circuits |
US6588217B2 (en) | 2000-12-11 | 2003-07-08 | International Business Machines Corporation | Thermoelectric spot coolers for RF and microwave communication integrated circuits |
US6945054B1 (en) | 2002-10-04 | 2005-09-20 | Richard S. Norman | Method and apparatus for cooling microelectronic complexes including multiple discrete functional modules |
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