JPS61170097U - - Google Patents
Info
- Publication number
- JPS61170097U JPS61170097U JP5406585U JP5406585U JPS61170097U JP S61170097 U JPS61170097 U JP S61170097U JP 5406585 U JP5406585 U JP 5406585U JP 5406585 U JP5406585 U JP 5406585U JP S61170097 U JPS61170097 U JP S61170097U
- Authority
- JP
- Japan
- Prior art keywords
- trimming
- adjustment
- decoder circuit
- terminals
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009966 trimming Methods 0.000 claims description 7
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Testing Or Calibration Of Command Recording Devices (AREA)
- Electric Clocks (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5406585U JPS61170097U (de) | 1985-04-10 | 1985-04-10 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5406585U JPS61170097U (de) | 1985-04-10 | 1985-04-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61170097U true JPS61170097U (de) | 1986-10-22 |
Family
ID=30575495
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5406585U Pending JPS61170097U (de) | 1985-04-10 | 1985-04-10 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61170097U (de) |
-
1985
- 1985-04-10 JP JP5406585U patent/JPS61170097U/ja active Pending