JPS61168740U - - Google Patents
Info
- Publication number
- JPS61168740U JPS61168740U JP5194285U JP5194285U JPS61168740U JP S61168740 U JPS61168740 U JP S61168740U JP 5194285 U JP5194285 U JP 5194285U JP 5194285 U JP5194285 U JP 5194285U JP S61168740 U JPS61168740 U JP S61168740U
- Authority
- JP
- Japan
- Prior art keywords
- terminal device
- timing signal
- output
- speed
- adapter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001360 synchronised effect Effects 0.000 claims 2
- 230000005540 biological transmission Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Time-Division Multiplex Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985051942U JPH0328614Y2 (https=) | 1985-04-08 | 1985-04-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985051942U JPH0328614Y2 (https=) | 1985-04-08 | 1985-04-08 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61168740U true JPS61168740U (https=) | 1986-10-20 |
| JPH0328614Y2 JPH0328614Y2 (https=) | 1991-06-19 |
Family
ID=30571443
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985051942U Expired JPH0328614Y2 (https=) | 1985-04-08 | 1985-04-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0328614Y2 (https=) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56110363A (en) * | 1980-02-06 | 1981-09-01 | Fujitsu Ltd | Multiplexing circuit using pll |
-
1985
- 1985-04-08 JP JP1985051942U patent/JPH0328614Y2/ja not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56110363A (en) * | 1980-02-06 | 1981-09-01 | Fujitsu Ltd | Multiplexing circuit using pll |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0328614Y2 (https=) | 1991-06-19 |
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