JPS61161609U - - Google Patents

Info

Publication number
JPS61161609U
JPS61161609U JP4322885U JP4322885U JPS61161609U JP S61161609 U JPS61161609 U JP S61161609U JP 4322885 U JP4322885 U JP 4322885U JP 4322885 U JP4322885 U JP 4322885U JP S61161609 U JPS61161609 U JP S61161609U
Authority
JP
Japan
Prior art keywords
signal
binary
circuit
memory
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4322885U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4322885U priority Critical patent/JPS61161609U/ja
Publication of JPS61161609U publication Critical patent/JPS61161609U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Length Measuring Devices By Optical Means (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Image Processing (AREA)
  • Closed-Circuit Television Systems (AREA)
JP4322885U 1985-03-27 1985-03-27 Pending JPS61161609U (es)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4322885U JPS61161609U (es) 1985-03-27 1985-03-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4322885U JPS61161609U (es) 1985-03-27 1985-03-27

Publications (1)

Publication Number Publication Date
JPS61161609U true JPS61161609U (es) 1986-10-07

Family

ID=30554705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4322885U Pending JPS61161609U (es) 1985-03-27 1985-03-27

Country Status (1)

Country Link
JP (1) JPS61161609U (es)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1990009004A1 (en) * 1989-01-31 1990-08-09 Yoshiro Yamada Image processing method and apparatus
JP2006078381A (ja) * 2004-09-10 2006-03-23 Keyence Corp 画像処理装置のディスプレイ表示方法。

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1990009004A1 (en) * 1989-01-31 1990-08-09 Yoshiro Yamada Image processing method and apparatus
JP2006078381A (ja) * 2004-09-10 2006-03-23 Keyence Corp 画像処理装置のディスプレイ表示方法。

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