JPS61161505A - Master controller of programmable controller - Google Patents

Abstract

PURPOSE:To control data for peripheral service generally in one place by linking input/output areas of optional programmable controllers with one communication line and providing a master controller. CONSTITUTION:Plural programmable controllers PC1-PCN are connected to a master controller MC by a data loop line 9 consisting of one optical fiber. Each controller (PC) is set to the reception mode normally, and the mode is switched to the transmission mode only when the PC is designated by the master controller MC to transmit data. The master controller MC incorporates a peripheral device or its interface or the like and performs input/output data link of each PC and peripheral service in time division. In this case, the master controller MC is linked to each PC by a periodic interruption in preference to peripheral service and processes commands requiring long time out of peripheral service commands after the end of the link processing as pending commands.

Description

[Detailed Description of the Invention] (Technical Field of the Invention) This invention enables peripheral services such as program monitoring for multiple programmable controllers from one location, and also enables data links between arbitrary input/output controllers. The present invention relates to a mask controller for a programmable controller.

(Technical background of the invention and its problems) With the development of computer technology, programmable controllers (sequence control devices) are widely used for machine-controlled machining, assembly, transportation, etc.
In the past, a single programmable controller was used to control the entire system, but as systems become more complex and larger, and higher functionality and faster speeds are required, a single programmable controller cannot control the entire system. It has become impossible to deal with controlling the whole thing. Under these circumstances, in recent years, for complex and large-scale systems, a plurality of programmable controllers have been installed to perform distributed control in a group management manner. In the case of such a distributed control system, it is necessary to establish an interlock between each programmable controller, so each programmable controller must be linked with data by some means.

7 and 8 respectively show examples of conventional data link systems. In FIG. 7, Ji [number of programmable controllers PCI, PO2, P(:3...
, PCN are interconnected to form a parallel link. In this case, in order to establish a link with any programmable controller PCI-PCNIIJl, each programmable controller PC1-PCI has a memory area circle 1-MA such as an input/output canister or an internal relay.
M, publish A1 to M^N in the memory area and allocate it to each programmable controller Pct #PCH, and make a fixed link to the memory area) IAI ~ so that AN always corresponds to each programmable controller. ing. However, if each of the programmable controllers PC1 to PGM is allocated the same capacity memory area, the same capacity will be allocated to each of them regardless of the link frequency, which is uneconomical in terms of hardware, and in some cases However, there is a problem in that a useless memory area must be prepared even though the link frequency is not so high. Additionally, if there are many programmable controllers that make up the system, the overall memory capacity will increase accordingly, and the blank memory area that is not actually used will also increase. Since the link is made to a blank memory area that is not currently available, there is a problem in that data transfer time is wasted. When the memory area is made small, there is a problem that links between programmable controllers cannot be freely established. Furthermore, since it is a fixed area type link, it is necessary to create a sequence program so that input/output occurs in the memory area to which input/output is actually desired, resulting in a problem that the program is wasted.

On the other hand, in the example shown in FIG. 8, a plurality of programmable controllers pH:1-P(:N) are connected to one mask controller NO, and the mask controller MC has a memory area MA that has all the link areas of each program memory. The memory area is allocated to the link area of each programmable controller Pc1-PCN.For this reason, each programmable controller PCI-
Although it is possible to link via the PCN Hamamaster controller MC, there is a problem in that programmable controllers cannot be linked directly to each other. Furthermore, since linking is performed via a memory area within the master controller NC, there is also a problem that there is a limit to the number of link units and link points. Furthermore, in order to perform peripheral services such as programming and monitoring at one location for a plurality of programmable controllers, one transfer cable was connected to each programmable controller and the channels were switched. Therefore, the conventional link system for programmable controllers has had the problem of requiring a plurality of cables for each programmable controller, including input/output canister link cables and peripheral service tables.

(Purpose of the Invention) This invention was made in view of the above-mentioned circumstances, and is capable of linking the input/output canisters of any programmable controller with a single communication line, and centrally transmitting data for side services at one location. The purpose of the present invention is to provide a mask controller of a programmable controller that can control the following.

(Summary of the Invention) The present invention relates to a mask controller of a programmable controller, and relates to a mask controller for a programmable controller and a mask controller for a plurality of programmable controllers.
A transfer protocol of the same format containing programmable controller numbers and commands according to a link table that is connected in a loop with a book communication @ line and is configured so that each programmable controller can be linked in one access. through one communication line using
In this case, the master controller performs input/output data links and peripheral services with each programmable controller on a time-sharing basis.In this case, this master controller gives priority to linking over peripheral services, links with each programmable controller using scheduled interrupts, and performs time-sharing with peripheral service commands. is used as a bending command because it delays the link. When the programmable controller receives this command, the protocol is terminated once, and after the link processing is completed, the master controller sends a reply request command to the programmable controller and processes the command. let

(Embodiment of the invention) mlfi4 is a diagram showing a connection between a mask controller and a programmable controller of the invention. A plurality of programmable controllers PCI-PCN are connected to the mask controller IIG by a data loop line 9 made of one optical fiber. Normally, each programmable controller PC1 to PGM is all in reception mode, and is specified by the master controller NO. The programmed programmable controller enters transmission mode only when transmitting data! /J changes. The mask controller MO has a built-in program, peripheral devices such as a cassette loader, or an interface thereof, and also has a built-in interface for a general-purpose host combinator. In the first factor, SiO is a serial transfer controller,
Rx1l means received data, and 71 means transmitted data.

FIG. 2 is a block diagram showing the configuration of the master controller of the present invention. The master controller MC includes an oscillator 10 that generates a clock signal for data transfer, a serial interface for transferring data with each programmable controller PC; and a peripheral device interface 12 for exchanging data with the peripheral M17, and a host. A host computer interface 13 for exchanging instructions and data with the computer 18, and a read-on memory ROM 14 that stores an operating system O5 that centrally operates this microcontroller.
A random access memory RA1115 for the work of the operating system O5 and a serial interface +1 . Peripheral device interface 12 and host computer interface 1
MicroPro U-2 servo unit 1B that controls the operation of 3.
It is composed of. As shown in Figure 1, oscillation! !
10 clock signals for each programmable controller P
It is given to the serial transfer controllers of C1 to PCH.

FIG. 3 is a diagram showing an example of a data transfer protocol between the master controller and the programmable controller in the present invention. All data transfer between the master controller NC and the programmable controller PC is initiated by the master controller NC, and a designated programmable controller PC responds to the command. FIG. 3 shows the transfer protocol. The microprocessor 22 of the master controller MC first reads the number of the programmable controller to be transferred from the link table in the order of the program, and then reads the number of the programmable controller (PC,
NO) to the optical fiber via the transmitter. The number information sent to the optical fiber is input to the receiver of the programmable controller PC, and is decoded by the CPU in the processing unit.The CPU of the programmable controller PC designated by this decoding is then used as the master controller N.
Accept information exchange with C. In this state, C sends a command number indicating the type of data to be accessed to the master controller, then a command length specifying the data length, and then sends the command data stored in the link table. Finally, end information ETX (E
nd of Text) is sent.

These pieces of information are stored in the RAM of the programmable controller PC that accepted the above-mentioned information exchange. In this case, other programmable controller information required for the data link is stored in an input area in the RAM.

Also, by information transfer from the mask controller NG, the specified number programmable controller PC R
When transferring information from AM, the CPU first switches the contact point of the switch section from a to b. This allows RA)1
The information is sent to the optical fiber via the transmitter, and the information sent via the looped optical fiber is input to the microprocessor unit (1B) of the master controller HG via the receiver. In this case, first, the number of the programmable controller (PC, No.
) was sent.

Next, the command length and command data are sent, and finally the end information ETX is sent. Therefore, the master controller MC can check whether correct data has been transferred from the designated programmable controller PC. When the information transfer from the programmable controller is completed, the CPU of the programmable controller In this way, the master controller H switches the contact point from b to a.
C is the number of the programmable controller PC (PCNo.
, ) and commands to access each programmable controller PC and data. With this same transfer protocol, the mask controller NG provides input/output links and programming.

Execute everything such as monitor. The types of command ONO are shown in Table 71 below.Table 1.4(A) is a diagram showing the data link table programmed in the master controller HC, and FIG.4(B)
shows a link table in which this link table is divided into input end and output side and distributed to each programmable controller PC.・Each programmable controller PCI
NpH:Jl is designed to control a predetermined controlled part in the entire system, and the control flow of the entire system can be understood, so data between each programmable controller PCI to PCN can be adjusted according to such system design. Links can be programmed. In the present invention, such a data link program is designed, for example, as a link table as shown in FIG. 4(A), and this table is stored in the memory area of the master controller Me. That is, 1
Describe the number of the programmable controller and its processing address as one data transfer source, describe the number of the programmable controller to be transferred and its processing address as the data transfer destination, and write the number of transfer data in the order of processing steps. do. The address is an address assigned within the programmable controller,
"x" here, including internal relays and data registers, etc.
is input, 'R'' is internal relay.

Y" is an output, and "D' is a data register.

"E" each represents an extended internal relay, and each point indicates how many addresses data is to be transferred from the designated address.0For example, the first processing in the program table in Figure 4 (^) Since one point is programmed to "8", the programmable controller PCO
The data of 8 points from human address "00" to 07" are sequentially input to the programmable controller PC2.
is transferred from the output address "05" of the programmable controller PC3 to the 8-point address "+3", and simultaneously transferred from the output address "05" of the programmable controller PC3 to the address "13". If such a data link program table is stored in G in the mask controller, the master controller MC reads the transfer data from the programmable controllers in order according to this table, and sequentially sends the data to the predetermined programmable controllers specified in the table. data can be transferred.

This allows data linking between each programmable controller. However, it takes time to perform the data link one by one according to this link table, so as shown in No. 411 (B), the link table mentioned above is created for each program pull controller by input side address and output side address. The programmable controller can be linked with one access. This divided link table is set in the memory of each program pull controller PC before starting the data link. Therefore, at the time of linking, only data needs to be accessed, and high-speed data transfer can be performed.

FIG. 5 is a diagram showing the processing procedure of the mask controller. Since it is desirable to perform data linking between programmable controllers periodically at fixed intervals, the data link is activated by regular interrupt processing from the master controller, and the gap between link processing and link processing is The time is used to collect information from each programmable controller, provide services to the host computer, and perform peripheral services. However, since the link processing time differs depending on the number of programmable controllers, in this invention, the unreasonable time of the host service and peripheral services is fixed to a fixed time.
The interrupt time is determined by making the link processing time variable. Therefore, when the number of links of programmable controllers is small, the interval between the links becomes short, and conversely, when the number of programmable controllers is large, the interval becomes long.

FIG. 5 shows this situation. When the scan process (main process) is started, the master controller is first initialized and enters a state of waiting for one interrupt. And time T
When a scheduled interrupt is activated in I, 'M-inclusive non-processing subroutine processing) is started to perform variable time link processing, and at the end time t1, the scan processing returns to the above-mentioned peripheral/host service. Processing is performed, and when a scheduled interrupt is activated at time T2 after the completion of the first peripheral/host service processing or during processing, the two-way sending processing is performed again, the linking processing is performed, and the same operation is repeated. 1 Peripheral/host service processing commands that require time will delay the link, so if a scheduled interrupt is activated at time 3 during the processing, it will be treated as a bending command, and the programmable controller will handle this command. This protocol is terminated once (time t3) with the programmable controller receiving the bending command (time t3).Next, data is sent back to the master controller when the bending command processing of the programmable controller is completed by a bending request caused by an interrupt from the master controller. do. By doing this, even commands for peripheral services that take time to process can be processed without affecting link processing.

FIGS. 6(^) to (D) are diagrams showing the processing procedure of the bending command in FIG. 5. Figure 96 (A) is #l
, #2, and #3 in the peripheral conflict host service process after the link process is completed by a scheduled interrupt at time 0 T4, as shown in FIG. 6(B).
When a command is given from the mask controller using the protocol shown in , and after the processing of command #1 is completed, the unprocessed command #2 shown by hatching is processed, and a scheduled interrupt occurs at time ↑5. In this case, the program pull controller does not return ribline data but returns each digit received as a bending command to the mask controller as shown in FIG. , the mask controller sends a reply request command to the corresponding programmable controller using the protocol shown in FIG. The processing for the relevant program pull controller has not yet finished.

No reply data is returned as shown in Figure 6 (C) 0
Next, after the link processing at time τB is completed, the master controller again sends a reply request command to the programmable controller in question using the protocol shown in FIG. 6(D). in this case.

Since the corresponding programmable controller has finished processing the command #2, the reply data is returned to the master controller using the transfer protocol shown in FIG. 6 (CD), thus processing the bending command.

(Effects of the Invention) As described above, according to the mask controller of the present invention, data link between input and output canisters of any programmable controller can be performed by simply connecting the mask controller and each programmable controller with one communication line. In addition, peripheral services such as programming and monitoring can be performed for all programmable controllers at one location.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the connection between the mask controller and programmable controller of the present invention, FIG. 2 is a block diagram showing the configuration of the master controller of the present invention, and FIG. 3 is a diagram showing the connection between the mask controller and the programmable controller of the present invention. A diagram showing an example of a data transfer protocol between flfk4[1iQ(A) and hee(8) 14kono5a#4nomas? A diagram showing an example of the data link table of the controller, 5th rpJ is a diagram showing the processing procedure of this 91-light mask controller, Figures 6 (A) to (El)
is a diagram showing the processing of the bending command in FIG. 5, and FIGS. 7 and 8 are diagrams each showing an example of the conventional data link system. Anus...mask control, pat~PCN...
Programmable controller, SiO...serial transfer controller, R-type port...received data, T! mouth··
・Transmission data, MA, NAl-)IAN...Memory area, 9...Loop line, IO...Oscillator, 11
... serial interface, 12 ... peripheral device interface, 13 ... host computer interface, 14 ... ROM, 15 ... RA) 1,
18...Microprocessor. Vine 5 Garden-176 Diagram (A) (J) Mastercont a-Rough 07 Rama 7'h Conte σ-F (C), Aro 7 Fumafurukoshito a-F (D)

Claims (1)

[Claims] A serial interface connected to a plurality of programmable controllers via a data communication means, a peripheral device interface for exchanging data with a peripheral device, a host computer interface for exchanging data with a host computer, and a master controller. ROM that stores the operating system,
The operating system includes a work RAM and a link table that distinguishes between a transfer source and a transfer destination for data linking with each programmable controller, and this link table is divided into an input side and an output side and is connected to each programmable controller. a microprocessor unit that controls the operations of the serial interface, the peripheral device interface, and the host computer interface in a time-sharing manner using the same transfer protocol in synchronization with a clock signal based on instructions from the operating system; A master controller of programmable controllers.