JPS61161054A - Receiving signal off detecting circuit - Google Patents

Abstract

PURPOSE:To detect 'OFF' of the receiving signal by comparing the output of a peak detecting device with the constant reference value, in the receiving circuit using a PLL circuit. CONSTITUTION:When a receiving signal is off, a noise is inputted to an input terminal 1, and therefore, a phase comparator 2 outputs the signal in accordance with the phase difference between the noise and the output of a voltage control oscillating device 4. The peak value is detected by a peak value detecting device 5, a comparator 6 compares the output of a detecting device 5 with a constant reference value, and when the output exceeds the reference value, the signal to show the receiving signal 'off' is outputted from the output terminal 7. Thus, when an automatic gain adjusting circuit is used, the receiving signal 'off' can be detected.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a received signal disconnection detection circuit used in a PCM signal receiving circuit, etc., and in particular to a PL as a timing extraction circuit.
The present invention relates to a circuit for detecting reception signal disconnection when an L circuit is used.

Summary of the Invention The present invention provides a PCM receiving circuit using a PLL circuit as a timing extraction circuit, in which a peak value of an output voltage of a phase comparator of the PLL circuit is detected, and the peak value exceeds a fixed reference value. This makes it possible to detect reception signal interruption.

Prior Art A conventional received signal disconnection detection circuit simply detects the peak value of a received signal, and determines that the received signal has been disconnected when the peak value falls below a certain reference value.

The above-mentioned conventional circuit has a drawback in that it cannot detect interruption of the received signal when an automatic gain adjustment circuit is used in the receiving circuit to expand the level range of the received signal. This is because when the received signal is cut off, the gain of the amplifier becomes maximum, the noise is amplified, and its peak value is detected.
In optical communications, even when automatic gain adjustment is performed using an avalanche photodiode as a photodetector, when the received signal is cut off, the bias voltage of the 7-paranchef photodiode changes and the amplification factor increases. Since the shot noise of the diode is output and detected as the peak value of the received signal, it is not possible to detect the interruption of the received signal.

For this reason, in optical signal receiving circuits and the like, a method is adopted in which a reception signal disconnection is determined when the output level of a tank circuit of a timing extraction circuit falls below a certain reference value. Since the received signal contains many timing frequency components, it can be distinguished from noise with few timing frequency components.

However, in a device that uses a PLL circuit as a timing extraction circuit, a clock signal having a constant timing frequency component is always generated from the PLL circuit even when the received signal is cut off, so the above-mentioned received signal cutoff detection circuit is cannot be used.

Problems to be Solved by the Invention The present invention provides a received signal disconnection detection circuit that can be used in a receiving circuit that uses a PLL circuit to extract timing.

Composition of the invention The received signal disconnection detection circuit of the present invention is as follows.

A voltage controlled oscillator whose oscillation frequency is controlled by a control input voltage, a phase comparator that outputs a DC voltage according to a phase difference between an output signal of the voltage controlled oscillator and a received signal pulse train, and an output of the phase comparator. a peak value detector for detecting the peak value of the output of the phase comparator of the timing extraction circuit including a low-pass filter for smoothing and supplying the smoothed signal to the control input terminal/child of the voltage controlled oscillator; It is characterized in that a reception signal interruption is detected when the output of the detector exceeds a certain reference value.

Embodiments of the Invention Next, the present invention will be explained in detail with reference to the drawings.

The figure is a block diagram showing one embodiment of the present invention. That is, a voltage controlled oscillator 4 whose oscillation frequency is controlled by a control input voltage, a phase comparator 2 which outputs a DC voltage according to the phase difference between the output signal of the voltage controlled oscillator 4 and the received signal pulse train, and the phase The peak value of the output of the phase comparator 2 of a timing extraction circuit using a PLL circuit comprising a low-pass filter 3 that smoothes the output of the comparator 2 and supplies it to the control input terminal of the voltage controlled oscillator 4. It is equipped with a peak value detector 5 for detecting a peak value, and a comparator 6 for comparing the output of the peak value detector 5 with a certain reference value, and when the output of the peak value detector 5 exceeds a certain reference value, the received signal is detected. It is designed to detect interruptions.

When a received signal pulse train is input from the input terminal l, a DC voltage corresponding to the phase difference between the output signal of the voltage controlled oscillator 4 and the received signal pulse train is output from the phase comparator 2. is applied to the control input of the voltage-controlled oscillator 4 through a low-pass filter 3, whereby the output phase of the voltage-controlled oscillator 4 is controlled to be synchronized with the phase of the input terminal l. In the synchronized state where the received signal pulse train is input, the phases of the received signal pulse train and the oscillation frequency of the voltage controlled oscillator 4 are locked, so there is no phase difference and the output of the phase comparator 2 has a constant value. The peak value detector 5 outputs a peak detection value that is less than the received signal disconnection determination reference value of the comparator 6.

On the other hand, when the received signal is off, noise is input to the input terminal 1, so the phase comparator 2 outputs a signal according to the phase difference between the noise and the output of the voltage controlled oscillator 4. The above phase difference is 1. Since it changes randomly over time, the output signal of the phase comparator 2 becomes an alternating current signal whose amplitude changes randomly over time.

The peak value is detected by the peak value detector 5, and the comparator 6 compares the output of the peak value detector 5 with a certain reference value, and when it exceeds the reference value, outputs a signal indicating that the received signal is disconnected. Output from 7.

Effects of the Invention As described above, one advantage of the present invention is that it is possible to detect disconnection of a received signal in a receiving circuit using a PLL circuit.

[Brief explanation of the drawing]

The figure is a block diagram showing one embodiment of the present invention. In the figure, 1: input terminal, 2: phase comparator, 3: two low-pass filters, 4: voltage controlled oscillator, 5: peak value detector,
6: Comparator, 7: Output terminal.

Claims (1)

[Claims] A voltage controlled oscillator whose oscillation frequency is controlled by a control input voltage, and a phase comparator which outputs a DC voltage according to the phase difference between the output signal of the voltage controlled oscillator and a received signal pulse train. , a peak value detector for detecting the peak value of the output of the phase comparator of the timing extraction circuit, comprising a low-pass filter that smoothes the output of the phase comparator and supplies the smoothed output to the control input terminal of the voltage controlled oscillator. A reception signal disconnection detection circuit, comprising: detecting reception signal disconnection when the output of the peak value detector exceeds a certain reference value.