JPS61158752U - - Google Patents

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Publication number
JPS61158752U
JPS61158752U JP4145485U JP4145485U JPS61158752U JP S61158752 U JPS61158752 U JP S61158752U JP 4145485 U JP4145485 U JP 4145485U JP 4145485 U JP4145485 U JP 4145485U JP S61158752 U JPS61158752 U JP S61158752U
Authority
JP
Japan
Prior art keywords
signal
clock
synchronization signal
periodic
periodic signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4145485U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4145485U priority Critical patent/JPS61158752U/ja
Publication of JPS61158752U publication Critical patent/JPS61158752U/ja
Pending legal-status Critical Current

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  • Time-Division Multiplex Systems (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

図面はいずれも実施例を示し、第1図は多重伝
送装置の概要図、第2図は同期信号発生装置の回
路図、第3図は同期信号発生装置の信号処理状態
を示すタイムチヤートである。 1……同期信号発生装置、3……同期信号伝送
路、5……データ伝送路、7……送信機、9……
受信機、11……時計、13……同期信号形成回
路。
The drawings all show embodiments; FIG. 1 is a schematic diagram of a multiplex transmission device, FIG. 2 is a circuit diagram of a synchronizing signal generator, and FIG. 3 is a time chart showing the signal processing state of the synchronizing signal generator. . DESCRIPTION OF SYMBOLS 1...Synchronization signal generator, 3...Synchronization signal transmission line, 5...Data transmission line, 7...Transmitter, 9...
Receiver, 11... Clock, 13... Synchronous signal forming circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 他の機器と共有される時計及び該時計を用いて
発生されたクロツク信号に基づいてデータ送受の
周期信号を形成する周期信号形成回路を備えた同
期信号発生装置と、該同期信号発生装置で発生し
た同期信号に基いが複数の送受信機間のデータ伝
送を行う信号伝送路と、を具備して成る多重伝送
装置。
A synchronization signal generator equipped with a clock shared with other devices and a periodic signal forming circuit that forms a periodic signal for data transmission and reception based on the clock signal generated using the clock; A multiplex transmission device comprising: a signal transmission path for transmitting data between a plurality of transmitters and receivers based on a synchronization signal.
JP4145485U 1985-03-25 1985-03-25 Pending JPS61158752U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4145485U JPS61158752U (en) 1985-03-25 1985-03-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4145485U JPS61158752U (en) 1985-03-25 1985-03-25

Publications (1)

Publication Number Publication Date
JPS61158752U true JPS61158752U (en) 1986-10-01

Family

ID=30551293

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4145485U Pending JPS61158752U (en) 1985-03-25 1985-03-25

Country Status (1)

Country Link
JP (1) JPS61158752U (en)

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