JPS63158042U - - Google Patents

Info

Publication number
JPS63158042U
JPS63158042U JP4895387U JP4895387U JPS63158042U JP S63158042 U JPS63158042 U JP S63158042U JP 4895387 U JP4895387 U JP 4895387U JP 4895387 U JP4895387 U JP 4895387U JP S63158042 U JPS63158042 U JP S63158042U
Authority
JP
Japan
Prior art keywords
data
clock signal
loop
receiver
transmission path
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4895387U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4895387U priority Critical patent/JPS63158042U/ja
Publication of JPS63158042U publication Critical patent/JPS63158042U/ja
Pending legal-status Critical Current

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  • Small-Scale Networks (AREA)
  • Communication Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のループ伝送回路のブロツク図
、第2図は本考案の一実施例に係るループ伝送回
路のブロツク構成図、第3図は各信号のタイミン
グチヤートである。 1……クロツク信号発生手段、2……受信器、
3……受信側伝送路、4……フアーストインフア
ーストアウト型メモリ、5……送信器、6……送
信側伝送路、7……リセツト手段。
FIG. 1 is a block diagram of a loop transmission circuit according to the present invention, FIG. 2 is a block diagram of a loop transmission circuit according to an embodiment of the present invention, and FIG. 3 is a timing chart of each signal. 1...Clock signal generation means, 2...Receiver,
3... Receiving side transmission line, 4... First-in-first-out type memory, 5... Transmitter, 6... Transmitting side transmission line, 7... Resetting means.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ループを形成している伝送路上に設けられ、受
信側伝送路から受けたデータをそのまま送信側伝
送路に送出するループ伝送回路に於いて、クロツ
ク信号発生手段と、上記受信側伝送路からデータ
を受信するための受信器と、上記受信器によつて
受信されたデータを一時記憶し、上記クロツク信
号発生手段によつて発生されたクロツク信号に同
期して、上記記憶したデータをその記憶した順に
出力するフアーストインフアーストアウト型のメ
モリと、上記メモリから出力されたデータを上記
送信側伝送路に送出するための送信器と、上記受
信器によつて所定時間データが受信されない時に
上記メモリをリセツトするためのリセツト手段と
を具備して成ることを特徴とするループ伝送回路
In a loop transmission circuit that is installed on a transmission path forming a loop and sends the data received from the reception transmission path to the transmission transmission path as it is, the loop transmission circuit includes a clock signal generating means and a clock signal generating means for transmitting data from the reception transmission path. a receiver for receiving data; and a receiver for temporarily storing the data received by the receiver, and storing the stored data in the order in which they were stored, in synchronization with a clock signal generated by the clock signal generating means. a first-in-first-out type memory for outputting data; a transmitter for transmitting the data output from the memory to the transmitting side transmission line; 1. A loop transmission circuit comprising: reset means for resetting the loop transmission circuit.
JP4895387U 1987-04-02 1987-04-02 Pending JPS63158042U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4895387U JPS63158042U (en) 1987-04-02 1987-04-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4895387U JPS63158042U (en) 1987-04-02 1987-04-02

Publications (1)

Publication Number Publication Date
JPS63158042U true JPS63158042U (en) 1988-10-17

Family

ID=30870963

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4895387U Pending JPS63158042U (en) 1987-04-02 1987-04-02

Country Status (1)

Country Link
JP (1) JPS63158042U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6086946A (en) * 1983-10-18 1985-05-16 Yokogawa Hokushin Electric Corp Loop type data communication system
JPS6123449A (en) * 1984-07-11 1986-01-31 Mitsubishi Electric Corp Transmission system
JPS61236245A (en) * 1985-04-12 1986-10-21 Matsushita Electric Ind Co Ltd Network system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6086946A (en) * 1983-10-18 1985-05-16 Yokogawa Hokushin Electric Corp Loop type data communication system
JPS6123449A (en) * 1984-07-11 1986-01-31 Mitsubishi Electric Corp Transmission system
JPS61236245A (en) * 1985-04-12 1986-10-21 Matsushita Electric Ind Co Ltd Network system

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