JPS61158724U - - Google Patents

Info

Publication number
JPS61158724U
JPS61158724U JP4266385U JP4266385U JPS61158724U JP S61158724 U JPS61158724 U JP S61158724U JP 4266385 U JP4266385 U JP 4266385U JP 4266385 U JP4266385 U JP 4266385U JP S61158724 U JPS61158724 U JP S61158724U
Authority
JP
Japan
Prior art keywords
variable gain
gain circuit
input level
set value
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4266385U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4266385U priority Critical patent/JPS61158724U/ja
Publication of JPS61158724U publication Critical patent/JPS61158724U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
  • Control Of Amplification And Gain Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例のブロツク図であり
、第2図は上記実施例のシステムコントロール部
で行なわれる入力レベル自動設定の処理のフロー
チヤートである。 1…入力端子、2…利得可変回路、3…A/D
変換器、4,5…出力端子、6…保持回路、7…
システムコントロール部、8…スイツチパネル。
FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a flowchart of the automatic input level setting process carried out by the system control section of the above embodiment. 1...Input terminal, 2...Variable gain circuit, 3...A/D
Converter, 4, 5... Output terminal, 6... Holding circuit, 7...
System control section, 8... switch panel.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力レベルの設定値を記憶する手段と、入力レ
ベル設定用のスイツチと、オーデイオ信号及び該
オーデイオ信号に先立つて基準信号が入力される
利得可変回路と、該利得可変回路の出力をデジタ
ル化するA/D変換器と、該A/D変換器出力の
上記基準信号のレベルのデータを保持する保持回
路と、上記設定値と上記保持回路より得られる保
持値との比較誤差を得る手段と、該比較誤差に応
じて上記利得可変回路を制御する制御手段とを備
え、上記入力レベル設定用のスイツチの操作があ
つたときに上記制御手段により上記利得可変回路
を制御して上記利得可変回路の出力レベルを上記
設定値に等しくするようにしたことを特徴とする
オーデイオ入力レベル自動設定装置。
means for storing a set value of an input level; a switch for setting the input level; a variable gain circuit to which an audio signal and a reference signal are input prior to the audio signal; and A for digitizing the output of the variable gain circuit. a /D converter, a holding circuit for holding level data of the reference signal output from the A/D converter, means for obtaining a comparison error between the set value and the held value obtained from the holding circuit; control means for controlling the variable gain circuit in accordance with a comparison error; when the switch for setting the input level is operated, the control means controls the variable gain circuit to control the output of the variable gain circuit; An audio input level automatic setting device characterized in that the level is made equal to the above set value.
JP4266385U 1985-03-25 1985-03-25 Pending JPS61158724U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4266385U JPS61158724U (en) 1985-03-25 1985-03-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4266385U JPS61158724U (en) 1985-03-25 1985-03-25

Publications (1)

Publication Number Publication Date
JPS61158724U true JPS61158724U (en) 1986-10-01

Family

ID=30553628

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4266385U Pending JPS61158724U (en) 1985-03-25 1985-03-25

Country Status (1)

Country Link
JP (1) JPS61158724U (en)

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