JPS61157182A - Image pickup device - Google Patents

Abstract

PURPOSE:To remove bad influences to a screen when essential accumulating time is made variable by masking part of the video signal in accordance with the output of an accumulating time control means. CONSTITUTION:A mode change-over switch 107 changes over the action mode of an image pick-up element 1 to a standard mode and a mode at the time of short seconds. At the time of the mode of the time of short seconds, a verti cal transfer pulse is generated on the way of the video period, the essential accumulating time is shortened, and PSH stops during a little longer time T4 (for example, 1-several horizontal periods) than the time equivalent to the initial T3 of the vertical period out of the video period. Therefore, the charge, which T3 can not discharge, will not appear at the output of 101 sampling holding circuit in the mode of the time of short seconds, and bad influences to the later circuit will not appear.

Description

[Detailed description of the invention] (Technical field) The present invention relates to an imaging device using a solid-state imaging device.

(Prior Art) When a solid-state image sensor, such as a COD (charge-coupled device), is used in a television camera, by changing the driving method of the solid-state image sensor, the field (or frame) time of the television signal can be changed. It has been proposed in the past that the accumulation time can be shortened.

For example, in a solid-state image sensor called a frame transfer type, the charge in the light receiving part that performs photoelectric conversion and charge accumulation is removed by vertical transfer once in the middle of the vertical period, and then the remaining vertical period is effectively A driving method that operates as an accumulation time is proposed, for example, in Japanese Patent Application No. 55-61098.

According to the above method, for example, in an NTSC TV camera, the accumulation time is usually 1/60 seconds, but this can be changed to 1/120 seconds, 11500 seconds, etc., so when a large amount of light is incident, It also has the advantage of not having a small aperture and preventing blurring of images of objects moving at high speed. However, when performing the above-mentioned operation, as mentioned above, there is a wrinkle in which the charge accumulated up to the middle of the vertical period is not taken out as a signal and is eliminated, especially when the actual accumulation time is shortened. The amount of charge to be removed becomes extremely large. for example,
Assuming that the actual accumulation time t1 is 11500 seconds, the ratio of the accumulation time t2 of the charge to be removed and tl is t2/l l = (1/60-11500) /1
1500 near, 3, which is about 7.3 times, and assuming that the charge accumulated at tl is at the standard level, at t2, the charge 7.3 times the standard level is accumulated. When such a large amount of charge is accumulated, it is very difficult to eliminate it all so that it does not affect the actual accumulation time. In particular, the amount of charge generated in so-called highlight areas on the screen is extremely large, and when vertical transfer is performed to discharge charge in the middle of the vertical period, a large amount of charge remains and is transferred to the output screen. The negative effects of this will appear.

In addition, this remaining charge is output from the image sensor as
This becomes 4 to 10 times the signal level (about the saturation signal level of the image pickup device), leading to an abnormal response of the signal processing circuit or malfunction of gain control or aperture control.

Furthermore, an imaging device has been proposed in which charges in both the light receiving section and the storage section are removed during the vertical period. In this case, no output signal is obtained during the period before the intermediate transfer, and aperture control, gain control, etc. become inaccurate.

(Objective) It is an object of the present invention to propose a solid-state imaging device that can eliminate the drawbacks of the conventional example described above and at the same time eliminate the adverse effects on the screen when the substantial storage time is varied.

(Example) Examples of the present invention will be described below with reference to the drawings.

Figure gtI11 is a configuration diagram of a frame transfer type CCD solid-state imaging device that can be applied to the present invention. 1 is a frame transfer type CCD solid-state imaging device; 2 is a light receiving section that photoelectrically converts incident light from an imaging optical system (not shown) and accumulates charge; 3 is a light receiving section that transfers the charge of the light receiving section 2; 4 is a horizontal register that horizontally transfers the charge transferred from the storage section 3 every horizontal period by φT; 5 is a charge-voltage converter that converts the charge from the horizontal register 4 into a voltage and outputs it. , DG are gates or barriers provided along the register 4, and DR is an overflow drain.

! FIG. 2(a) shows the drive waveform of the frame transfer CCD image sensor 1 in the short time mode, and φ is the waveform of the light receiving section 2.
．． φS is the storage section 3, φT is the horizontal shift register section 4, φ
R indicates each drive waveform of the charge-voltage converter 5.

IV is the vertical period of the television signal, and T2 is the substantial storage period.

At the beginning of the vertical period, the charges in the light receiving section 2 are vertically transferred and transferred to the storage section 3 by the vertical transfer pulses indicated by ■ and ■, and thereafter, by the pulse indicated by ■, one line at a time every horizontal period.
The signal is transferred to the horizontal register 4, and then transferred horizontally to the charge-voltage converter 5 by the pulse 2 during the horizontal period, where it is converted into a charge voltage by the pulse 2 and taken out as an output.

After photoelectric conversion and charge accumulation in the light receiving section 2 during the T1 period, only the light receiving section is vertically transferred by the pulse (2), and the charges accumulated during the T1 period are removed from the light receiving section. After that, T
The charges received and accumulated during the two periods are vertically transferred to the storage section 3 by the pulses (1) and (2). The following operations are similar to those described above. Incidentally, in the standard mode in which the accumulation period is about one field period as shown in FIG. 2(b), the pulses marked with (■) in FIG. 2 are omitted. In the short time mode, only the light receiving section 2 performs vertical transfer due to the pulse (■), and when removing the charge accumulated in the T1 period, the amount of charge accumulated in T1 is larger than that in T2, so it cannot be completely removed. It will remain.

FIG. 3 shows the output waveform of the image thus obtained.

Vsat is the saturated output voltage of the image sensor, Vav is the standard average output voltage of the image sensor, and LK is the vertical blanking interval.

As described above, in the vertical transfer before the actual accumulation period T2, the remaining charge that cannot be eliminated is output, and an output at the Vsat level is generated during the T3 period at the beginning of the vertical period. If T3 is short, it will not appear on the screen. However, since Vsat is very large, about 3 to 5 times as large as vav, it has a large influence on the signal processing circuit.

FIG. 4 shows a first embodiment of the present invention. Reference numeral 101 denotes a sample and hold circuit as a masking means for removing a clock signal from the output of one image sensor and converting a part of the video signal to a signal at a predetermined level, and 102 a low-pass filter, a clamp circuit, a gamma circuit, and a clip circuit. 103 is a color separation circuit that separates the color signals red, R, blue, B, and green from the output of the sample and hold circuit 101, and 104 is a low-pass filter and clamp circuit for the R, G, and B signals. , a color process circuit including a gamma circuit, a clip circuit, and a matrix circuit; 105 is Y;

An encoder circuit that synthesizes a television signal using R-Y, B-Y, and a synchronization signal; 106 is a reference oscillation frequency divider; a synchronization signal generation circuit that includes a decoder; and 107 is a mode switch that switches the operation mode of the synchronization signal generator 106. switch, 1
08 is a drive circuit that generates drive pulses for the image sensor from the output of the synchronization signal generator 106.

The output of the image sensor 1 is de-clocked and made continuous by a sample and hold circuit 101, and a luminance signal Y is formed by a Y process circuit 102 and inputted to an encoder 105. Further, the output of the sample and hold circuit 101 is separated into color components in the image signal by a color separation circuit 103 according to a pattern of a color separation filter (not shown) pasted on the image sensor l, and the color components are separated into an R signal, a B signal, and a B signal. The 0-color processing circuit 104, which forms the R, G, and B signals, processes the R, G, and B signals, respectively, and roughly performs matrix calculations to form color difference signals R-Y and B-Y. encoder 105
forms and outputs a television signal such as NTSC based on the input signals Y, R-Y, B-Y and the synchronization signal from the synchronization signal generator 106. Mode changeover switch 107
switches the operation mode of the image sensor l to the standard mode and the short exposure mode.

FIG. 5 shows a timing chart.

In (a), vertical transfer is performed in the vertical retrace section with φ work in the standard mode. (b) is PsH in the standard mode and occurs continuously in the video section. (C) is φI in short seconds mode,
A vertical transfer pulse is generated in the middle of a video period to shorten the actual storage time. (d) shows the PsH in the short seconds mode, in which the PsH is stopped for a time T4 that is slightly longer (for example, one to several horizontal periods) than the time corresponding to T3 in FIG. 3 during the video period.

Figure 6 shows the output of the 101 sample and hold circuit in the short time mode.
This does not appear in the sample-and-hold output, and has the effect that there is no adverse effect on subsequent circuits.

FIG. 7 shows the main part of the synchronization signal generation circuit 106. 20
1 is a crystal oscillator, 202 is a reference oscillator, 203 is a counter l, 204 is an H-system pulse decoder, 205 is a counter 2, 206 is a V-system pulse decoder, 207 is a P switching circuit, and 208 is a PSH switching circuit. be. When the 107 mode selector switch is set to "°1", the image is shown in Fig. 5(a).

Both PI and PsH as shown in (b) are created from the standard mode pulses IN and SHN, and when it is "°0", they are created from the short-second mode pulses Is and SHs as shown in Figure 5 (C) and (d). PI and PS H are created.

FIG. 8 is a diagram showing a second embodiment of the present invention.

301 is an adder, and 302 is a character signal generation circuit. 1
07, when the mode changeover switch is on the standard mode side, the one character signal generation circuit 302 does not operate, but when it is on the short seconds side, the character signal generation circuit 302 operates and a one character signal is generated.
A single character signal in which character data is mixed with a luminance signal by the adder 301 is configured such that a character is inserted into the period T4 in FIG. 6 by a synchronizing pulse from the synchronizing signal generating circuit 106. The generated signal is not limited to a character signal, but may also be a symbol or the like.

(Effects) According to the present invention, even if the actual storage time of the image sensor is set short, the influence of unnecessary charges on the screen can be removed.

In the above embodiment, in the short time mode of the image sensor, only the light receiving section performs vertical transfer in the middle of the vertical period, but the charges in both the light receiving section and the storage section are eliminated in the middle of the vertical period. Even in this method, the present invention can be implemented since a part of the readout image becomes unsightly.

FIG. 9 is a diagram showing a second embodiment of the present invention, and shows a modification of the short time mode. In this embodiment, the storage section also performs high-speed vertical transfer in synchronization with the high-speed vertical transfer of the light-receiving section. Therefore, the charges in the light-receiving section and the storage section are collected in the horizontal shift register 4 and overflow. This overflowed charge flows into the drain DR via the gate or barrier DG and is discharged.

Therefore, the output of the charge-voltage converter 5 is missing in the [phase] portion, resulting in an unsightly screen.

In addition, other types of image pickup devices such as interline type CC
Various types of D and MO3 image sensors have been considered that are capable of controlling the accumulation time. For example, when controlling the accumulation time using an interline method COD, the screen appears on the back side of the vertical period. Since noise is introduced, the video signal level in this portion may be controlled to a predetermined level.

In the embodiment described above, the substantial accumulation time T2 was set constant, but it may be configured to be variable in multiple stages or steplessly. In that configuration, the amount of charge that cannot be eliminated is T
2 and increases as T2 becomes shorter, T4 may be configured to be variable depending on the length of T2.

Further, in the present invention, the mask means is configured to stop the operation of the sample/hold circuit, but a gate circuit may be provided before or after the sample/hold circuit and the gate may be closed during the T4 period. This includes a circuit in which a part of the video signal is replaced with another signal pattern of a predetermined level.

[Brief explanation of the drawing]

Figure 1 is an explanatory diagram of frame transfer type COD, Figure 2 (a) is an explanatory diagram of short-time mode, Figure 2 (b) is an explanatory diagram of standard mode, and Figure 3 is an illustration of unnecessary signals in short-time mode. FIG. 4 is a diagram showing a configuration example of an imaging device of the present invention; FIG. 5 is a timing chart of the first embodiment of the present invention; FIG. 7 is a diagram showing a configuration example of a synchronization signal generation circuit. FIG. 8 is a diagram showing a second embodiment of the present invention. FIG. 9 is a diagram showing a third embodiment of the present invention. 1---------1 image sensor, 101--sample hold circuit, 106--1 synchronous signal generator, 107--mode changeover switch, 2nd grade n (shi)

Claims (2)

[Claims] (1) An imaging device that includes an imaging device that converts an optical image into an electrical signal and forms a video signal; an accumulation time control device that variably controls the accumulation time of photoelectric charges of the imaging device; and an output of the accumulation time control device. An imaging device comprising: masking means for adjusting the level of a portion of the video signal to a predetermined level in accordance with the above. (2) The imaging device according to claim (1), wherein the predetermined level includes a character pattern.