JPS61155881A - Clutter simulator - Google Patents

Abstract

PURPOSE:To reduce the scale of a circuit, to smooth level variation on the time base, and to simulate many kinds of clutters by using a voltage control attenuator (ATT) and also providing a memory circuit for simulating many kinds of clutters. CONSTITUTION:A band-pass filter group 2 (2a-2m) is connected to a noise source 1 and an ATT group 3 (3a-3m) which simulates level variation on the time base for each frequency is connected thereto and controlled by an ATT control circuit 4 and a memory circuit 5. Outputs of the ATT group 3 are summed up by an adder 6 and inputted as a radio wave to a system to be measured through a mixer 7 and a local oscillator 8. The ATTs are applied with a external control voltage to vary in level by themselves and the circuit scale is reduced, and further the composition loss of the adder is reduced. In the memory circuit, an attenuation level corresponding to a clutter to be simulated is written at each time, so many kinds of clutters are simulated.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a radar test device, and particularly to a radar test device that uses clutter in a radar reception signal, that is, a clutter system that generates pseudo-unnecessary reflected waves from the ground, sea surface, etc. It concerns minilators.

[Conventional technology]

A conventional Clarax Minimulator of this type is shown in Fig. 3.
In the figure, 1 is a noise source that generates white noise;
Reference numeral 2 denotes a group of band-pass filters provided to cover the spread of clutter on the frequency axis, and these have the same characteristics as those of the radar device of the system to be measured. Further, reference numeral 11 denotes each bandpass filter 2a to 2a of the bandpass filter group 2.
12 is a semi-fixed attenuator group connected to each of the range gates lla to lln of the range gate group 11, 6 is an adder that adds and synthesizes the outputs of the semi-fixed attenuator group 12, and 7 is a group of range gates connected to 2m. This is a mixer that mixes the output of the adder 6 with the output of the local oscillator 8 to create a high frequency signal, and the output is sent as a radio wave to the radar device of the system to be measured.

Next, the operation will be explained.

Figure 4 shows the radar waveform to be simulated (however, the received wave is only the crafter), where (a) is on the time axis, and (in the figure) is the received waveform in (a). The waveforms at a certain range gate (third in the figure) are shown on the frequency axis.

When trying to simulate a rough reception waveform like this,
In the third circuit, the noise source 1 generates white noise that sufficiently satisfies the spread of clutter on the frequency axis, and a bandpass filter group with an appropriate bandwidth is prepared for the spread of the clutter. 2 extracts the frequency components of the necessary band and filters each bandpass filter (2a
, 2b.

...-, 2m) for each output, range gate group (11
"+11J..., 1ln) and the same number of semi-fixed attenuator groups (12a, 12b, =, 12n) are provided,
Semi-fixed attenuator group (12a, 12b,..., 12
In order to simulate the level change on the time axis as shown in FIG. 5, the attenuation amount is set for each range gate interval.

A group of range gates (l) connected to each bandpass filter
la, llb, -, 1ln) uses the transmission trigger from the radar device of the system under test as the time reference, and the gate is set at 1t in synchronization with the range clock from the radar system of the system under test.
a-11b-...-11n are sequentially closed, allowing the signal from the bandpass filter to pass through and sending it to the semi-fixed attenuator.

For this reason, the level change will be step-like with the minimum step of the range clock, and in order to make this change smooth,
Range gate group 11. A large number of semi-fixed attenuator groups 12 are required.

As described above, each bandpass filter is mixed with the eight outputs and sent as a high frequency signal to the radar device under test.

The above is an operation in one pulse repetition period, and the clutter waveform is thereby simulated, and this operation is repeated thereafter.

[Problem that the invention seeks to solve]

As mentioned above, in the conventional crack simulator, the number of range gates (n) for each bandpass filter (m)
However, the level change is step-like, and if this change is to be made smooth, n becomes large and a large number of semi-fixed attenuators are required. When simulating ground radar clutter, the fluctuations of objects on the ground, such as the shaking of plants and trees caused by the wind, waves on the sea surface, etc., are small, and the spread of clutter on the frequency axis is also small (
(m is small), and the circuit scale is not large (mXn is small), but when simulating the clutter of an aircraft-mounted radar, it is possible to Since the spread of clutter on the frequency axis is determined by the relative speed of the machine (m is large), the circuit scale is large (mXn is large), which has the disadvantage that there is a natural limit to the clutter that can be simulated. Ta.

This invention was made to solve the above-mentioned problems, and provides a crack simulator that can reduce the circuit scale, smooth out level changes on the time axis, and simulate many types of clutter. The purpose is to

[Means for solving problems]

The crack simulator according to the present invention uses a voltage-controlled attenuator to reduce the circuit scale and smooth level changes on the time axis, and is provided with a memory circuit to simulate various types of clutter.

(Function) In this invention, the voltage-controlled attenuator can provide a continuous level change by applying a control voltage from the outside, so the circuit scale can be reduced.
Furthermore, the combining loss in the adder can be reduced.

Further, since the memory circuit can write an attenuation level corresponding to the clutter to be simulated each time, it is possible to simulate many types of clutter.

【Example〕

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 shows a crack simulator according to an embodiment of the present invention, and in the figure, 1.2.6, 7.8 is the same as a conventional clutter simulator. 3 is each band pass filter group (2a, 2b.

..., 2m), and 4 is an attenuator control circuit that controls the voltage-controlled attenuator group 3. 5 is a voltage control attenuator (3a+3b+...,
This is a memory circuit for providing the attenuation level necessary to control the 3m). In this Figure 1,
The voltage controlled attenuator 3a surrounded by a broken line corresponds to the range gates lla to lln and the semi-fixed attenuators 12a to 12n surrounded by the broken line in FIG.

FIG. 2 shows an example of the configuration of the attenuator control circuit 4. 9
10 is a D/A conversion circuit for reading out the aftertenuation level of the clubbeam to be simulated from the memory circuit 5 and converting this digital value into an analog control voltage for the voltage control attenuator group 3; 10 is a D/A conversion circuit 9; This is a low-pass filter circuit for smoothing the analog control voltage output from the

Next, the operation will be explained.

From FIG. 2, the memory circuit 5 has an attenuation level mXn corresponding to the clutter waveform to be simulated in advance.
Assume that it is written as a scale matrix.

If m and n are address numbers of the memory circuit 5, m is an address in the frequency axis direction, whose size corresponds to the number of bandpass filters 2, and n is an address in the time axis direction, whose size corresponds to the number of bandpass filters 2. The number corresponds to the number of range gate groups in the conventional circuit.

In order to read the contents of the memory circuit 5, the D/A converter circuit 9 in the attenuator control circuit 4 advances the address n in the time axis direction by one step for each range clock, using the transmission trigger as a reference, and changes the frequency each time. The axial address m is advanced from 1 to m, the attenuation level read each time is sequentially D/A converted, and the control voltage (
If the range clock is the first (n-1), then (1,1) (2,1), ・, (m,
1) Create analog voltages (D/A converted) from the contents of the addresses in 1).

Since the control voltages at this stage are in the form of pulses, a low-pass filter circuit (-integrator circuit) with an appropriate time constant is used to hold them until m control voltages are created by the next range clock. ) 10, and its output is passed through each voltage control attenuator 3a, 3b*
..., send to 3m.

As mentioned above, by passing the analog voltage immediately after D/A conversion through the low-pass filter circuit 10, the control voltage changes continuously, and as a result, the voltage control attenuators 3a, a
b,...+3m can be clearly controlled.

When the range clock advances to n in the D/A converter circuit 9, the club waveform for one pulse repetition period has been simulated, and the same operation is repeated by the next transmission trigger. The operations after adder 6 are the same as those of the conventional circuit, and will therefore be omitted.

Note that the memory of the memory circuit 5 is RAM (Rando
sAccess Memory) or a floppy disk, calculate the clutter level to be simulated using a computer in advance, and then calculate the attenuation level and write it to memory. Various clutter can be simulated in a short time. can do.

Further, in the above embodiment, the voltage controlled attenuator group 3 a
+ 3 b + . A conversion circuit 9. The low-pass filter circuit 10 can be omitted, and only the memory readout circuit is required; however, the control voltage in this case is stepped.

〔Effect of the invention〕

As described above, according to the crafter simulator according to the present invention, since the output of the bandpass filter is attenuated by the voltage-controlled attenuator, the circuit configuration can be significantly reduced, and the level change on the time axis can be reduced. is smooth, the synthesis loss caused by the adder can be reduced, and various clutter waveforms can be simulated by rewriting the memory.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a voltage-controlled attenuator type crack simulator according to an embodiment of the present invention, FIG. 2 is a diagram showing an example of the configuration of an attenuator control circuit in the tarmac simulator of FIG. 1, and FIG. A block diagram of a conventional clutter simulator, Fig. 4(a), (bl is a diagram showing the radar waveform to be simulated as 4 on the time axis and on the frequency axis ÷, and Fig. 5 is a diagram showing each band in the conventional clutter simulator. It is a diagram showing the clutter level (staircase) for each pass filter. 1... Noise source, 2... Band pass filter, 3...
・Voltage control attenuator group, 4... Attenuator control circuit, 5... Memory circuit, 6... Adder, 7...
Mixer, 8... Local oscillator, 9... -D/A conversion circuit, 10... Low pass filter circuit, 11... Range gate group, 12... Semi-fixed attenuator group.

Claims (1)

[Claims] (1) A noise source for simulating the spread of radar clutter on the frequency axis, a group of bandpass filters connected to it, and each bandpass filter for simulating level changes on the time axis for each frequency. A group of connected voltage-controlled attenuators, an attenuator control circuit and a memory circuit for controlling the voltage-controlled attenuator group, an adder that adds the outputs of the voltage-controlled attenuator group, and an output of the adder to the system under test. A clutter simulator comprising a mixer and a local oscillator for inputting radio waves.