JPS61154210A - Distribution constant type electromagnetic delay line - Google Patents

Distribution constant type electromagnetic delay line

Info

Publication number
JPS61154210A
JPS61154210A JP28168984A JP28168984A JPS61154210A JP S61154210 A JPS61154210 A JP S61154210A JP 28168984 A JP28168984 A JP 28168984A JP 28168984 A JP28168984 A JP 28168984A JP S61154210 A JPS61154210 A JP S61154210A
Authority
JP
Japan
Prior art keywords
line
delay line
electromagnetic delay
distributed constant
conductor line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP28168984A
Other languages
Japanese (ja)
Other versions
JPH044771B2 (en
Inventor
Kazuo Kametani
一雄 亀谷
Tsuyoshi Suda
須田 勍
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Elmec Corp
Original Assignee
Elmec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elmec Corp filed Critical Elmec Corp
Priority to JP28168984A priority Critical patent/JPS61154210A/en
Publication of JPS61154210A publication Critical patent/JPS61154210A/en
Publication of JPH044771B2 publication Critical patent/JPH044771B2/ja
Granted legal-status Critical Current

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Abstract

PURPOSE:To improve an output waveform, especially its leading waveform by arranging an earth electrode so as to be opposed to a part of a conductor line of each turn. CONSTITUTION:A conductor line 6 formed by applying space winding to a conductor in a form of single layer and the earthing electrode 1 opposed to the conductor line 6 via a dielectric 2 are provided. Then the said earthing electrode 1 is arranged so as to be opposed to a part of the conductor line 6 of each turn. For example, the earthing electrode 1 placed at the inner side of the conductor line 6 wound in flat is arranged while being biased to one side of the bobbin 3 in the broadwise direction W so that the unit conductor line 5 of each turn is not opposed to the grounding to the grounding electrode 1 at a part before and after a connection section &. Thus, a part of a nearly inductance L only is formed on the way of the conductor line, and the output waveform, especially the leading waveform is improved.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は2例えば立ち上がり時間1ns以下の超高速信
号を扱う分布定数型電磁遅延線に係り。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a distributed constant electromagnetic delay line that handles ultrahigh-speed signals with rise times of 1 ns or less, for example.

特に、導線路が誘電体を介して接地電極に対向してなる
インピーダンス線路を用いた分布定数型電磁遅延線の改
良に関する。
In particular, the present invention relates to an improvement in a distributed constant electromagnetic delay line using an impedance line in which the conducting line faces a ground electrode via a dielectric.

〔従来の技術〕[Conventional technology]

この種の分布定数型電磁遅延線としては、細長い板状の
接地電極の外周を誘電体で覆って偏平で細長いボビンを
形成し、このボビンの外周に導体を単層ソレノイド状に
スペース巻きして導線路を形成し、この導線路をその接
地電極に対向させてなる構成がある。
This type of distributed constant electromagnetic delay line is constructed by covering the outer periphery of a long and thin plate-shaped ground electrode with a dielectric material to form a flat and long bobbin, and then winding a conductor around the outer periphery of this bobbin in the form of a single-layer solenoid. There is a configuration in which a conductive path is formed and this conductive path is opposed to the ground electrode.

このような分布定数型電磁遅延線は、超高速信号に対し
て良好な遅延特性を得ることが容易であるが9本発明は
これに更に改良を加えたものである。
Such a distributed constant type electromagnetic delay line can easily obtain good delay characteristics for ultrahigh-speed signals, but the present invention is a further improvement on this.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本発明はこのような状況の下になされたものであり、出
力波形、特に立ち上がり波形を改善した分布定数型電磁
遅延線を得るものである。
The present invention has been made under these circumstances, and is intended to provide a distributed constant electromagnetic delay line with improved output waveforms, especially rising waveforms.

〔問題点を解決するための手段〕[Means for solving problems]

このような問題点を解決するために本発明は。 The present invention aims to solve these problems.

導体が単層ソレノイド状にスペース巻きされてなる導線
路に誘電体を介して接地電極を対向させた分布定数型電
磁遅延線であって、その接地電極を。
This is a distributed constant electromagnetic delay line in which a conductor is space-wound in the form of a single-layer solenoid, and a ground electrode is opposed to it via a dielectric.

各ターンの前記導線路の一部と対向するように配置させ
たものである。
It is arranged so as to face a part of the conductive path of each turn.

〔作 用〕[For production]

このような手段を備えた本発明は、単層ソレノイド状に
スペース巻きされた導線路の各ターンにおいて接地電極
が部分的に導線路と対向しない部分を有し、その部分で
は接地電極との間の容量が減少し、導線路の途中にイン
ダクタンス分が相対的に大きな部分が形成される。
In the present invention equipped with such a means, in each turn of the conductive line space-wound in the form of a single-layer solenoid, the ground electrode has a portion that does not face the conductive line, and in that part, there is a gap between the ground electrode and the conductive line. capacitance decreases, and a portion with relatively large inductance is formed in the middle of the conductor line.

〔実 施 例〕〔Example〕

以下本発明の詳細な説明する。 The present invention will be explained in detail below.

第1図および第2図は本発明の分布定数型電磁遅延線の
一実施例を示す正面図および側面図である。
1 and 2 are a front view and a side view showing an embodiment of a distributed constant electromagnetic delay line of the present invention.

細長い板状の接地電極1の外周は例えばふっ素樹脂等の
誘電体2で覆われ、偏平で細長いボビン3が形成されて
いる。
The outer periphery of the elongated plate-shaped ground electrode 1 is covered with a dielectric material 2 such as fluororesin, and a flat and elongated bobbin 3 is formed.

このボビン3の外周には、1ピッチ分の長さと途中に折
れ曲がり部4を有する短冊状の単位導線路5が、ボビン
3の軸方向C−Cを横切るように複数平行に圧着され、
それら各単位導線路5が順次直列接続されて単層ソレノ
イド状にスペース巻きされた偏平な導線路6が形成され
ている。
On the outer periphery of the bobbin 3, a plurality of rectangular unit conducting lines 5 having a length of one pitch and a bent part 4 in the middle are crimped in parallel so as to cross the axial direction C-C of the bobbin 3.
The unit conductive lines 5 are connected in series in order to form a flat conductive line 6 space-wound in the shape of a single-layer solenoid.

なお、符号7はそれら各単位導線路5の接続部である。In addition, the code|symbol 7 is a connection part of each of those unit conducting lines 5.

そして1本発明の分布定数型電磁遅延線において、偏平
に巻回された導線路6の内側に位置させた上記接地電極
1が、ホビン3の+IIiiiw方向にて片側に寄せて
配置されている。すなわち、第2図に示すように、接地
電極1は接続部7とは反対側(図中上側)の単位導線路
5の折れ曲がり部8側に寄せて配置されており、接地電
極1の一端(図中上端)と折れ曲がり部8内側間の距M
Bよりも。
In the distributed constant type electromagnetic delay line of the present invention, the ground electrode 1 located inside the flatly wound conductive line 6 is placed to one side of the hobbin 3 in the +IIIiiiw direction. That is, as shown in FIG. 2, the ground electrode 1 is arranged closer to the bending part 8 of the unit conducting line 5 on the opposite side (upper side in the figure) from the connecting part 7, and one end of the ground electrode 1 ( Distance M between the upper end in the figure) and the inner side of the bent part 8
than B.

接地電極1の他端(図中下端)と接続部7内例間の距!
1iftDが大きくなっている。そのため5各ターンの
単位4綿路5にあっては、接続部7前後の部分では接地
電極1と対向しない構成となっている。
Distance between the other end of the ground electrode 1 (lower end in the figure) and the inner part of the connection part 7!
1iftD is increasing. Therefore, in the unit 4 threads 5 of each of the 5 turns, the portions before and after the connection portion 7 are configured not to face the ground electrode 1.

このような本発明の分布定数型電磁遅延線は。The distributed constant electromagnetic delay line of the present invention is as follows.

接地電極1を単位導線路5の折れ曲がり部8側へ寄せる
とともに、単位導線路5の接続部7側を空けると、第3
図の実線のように、出力パルス信号の立ち」−かり部分
が出力振幅の100%まで所定の傾きで素早く立ち」−
がる。
When the ground electrode 1 is brought closer to the bending part 8 side of the unit conducting line 5 and the connecting part 7 side of the unit conducting line 5 is left open, the third
As shown by the solid line in the figure, the output pulse signal rises rapidly at a predetermined slope until it reaches 100% of the output amplitude.
Garu.

このような効果が得られる理由としては、以下のような
ことが考えられる。
The following may be considered as the reason why such an effect is obtained.

すなわち、導線路6は、各ターン毎に部分的に接地電極
1と対向しない個所が形成されているので、第4図の等
価回路で示されるように、各ターンにおいて接地電極1
に対して容量を持ったマイクロストリップ線路DI、と
、接地電極1と対向せずに接地電極1に対して容量が殆
どないインダクタンスI7を直列接続した構成となる。
That is, since the conductive line 6 has a portion that does not face the ground electrode 1 in each turn, as shown in the equivalent circuit of FIG.
The microstrip line DI having a capacitance relative to the ground electrode 1 is connected in series with an inductance I7 which does not face the ground electrode 1 and has almost no capacitance relative to the ground electrode 1.

各ターンの単位導線路5は、隣合う単位導線路5.1つ
置いた単位導線路5.・・・n番目の単位導線路5.と
の間に各々M、、M2 、  ・・・MTlの相互誘導
を持っており、各ターンではマイクロストリップ線路D
 Lの部分がインダクタンスI7の部分より大きいので
、相互誘導は各マイクロストリップ線路DI−間で互い
に形成されていると考え、インダクタンスLの部分を無
視できる。もっとも、インダクタンスLの部分が大きく
なるような場合にはマイクロストリップ線路D Lに含
めて考えればよい。
The unit conductive lines 5 of each turn are adjacent unit conductive lines 5.1 unit conductive lines 5. . . . nth unit conducting line 5. There is a mutual induction of M, , M2, . . . MTl between them, and each turn has a microstrip line D
Since the portion L is larger than the portion of the inductance I7, it is considered that mutual induction is formed between each microstrip line DI-, and the portion of the inductance L can be ignored. However, if the inductance L is large, it may be included in the microstrip line DL.

なお、第4図中の相互誘導は、一番左端のマイクロスト
リップ線路DLがそれより右側のマイクロストリップ線
路DLとの間に形成されるものだけを示したが、その左
にも相互誘導があり、各マイクロストリップ線路D L
も同様に左右のマイクロストリップ線路D Lと結合し
ている。
Note that the mutual induction in FIG. 4 shows only the one formed between the leftmost microstrip line DL and the microstrip line DL on the right side, but there is also mutual induction to the left. , each microstrip line D L
are similarly connected to the left and right microstrip lines DL.

ここで分布定数型電磁遅延線が、インダクタンスI、が
なくマイクロストリップ線路DLのみからなる場合と、
マイクロストリップ線路D Lおよびインダクタンス■
7からなる場合について、各々電気的特性を考えると、
第5図に示すようになる。
Here, the case where the distributed constant type electromagnetic delay line consists of only the microstrip line DL without the inductance I, and
Microstrip line DL and inductance ■
Considering the electrical characteristics of each of the cases consisting of 7,
The result is as shown in FIG.

すなわち2周波数fに対する出力振幅■の関係は、イン
ダクタンスI、かない分布定数型電磁遅延線では、第5
図破線のように、出力振幅Vが周波数fの増加とともに
ゆるやかな傾きで低下する。
In other words, the relationship between the output amplitude (■) and the two frequencies (f) is as follows:
As shown by the broken line in the figure, the output amplitude V decreases with a gentle slope as the frequency f increases.

これに対して、インダクタンスしも含む分布定数型電磁
遅延線は、ある周波数までは出力振幅Vが平坦で、それ
以上の周波数では比較的急速に低下する(順向になる。
On the other hand, in a distributed constant electromagnetic delay line that also includes an inductance, the output amplitude V is flat up to a certain frequency, and decreases relatively rapidly (becomes positive) at frequencies above that.

6一 この場合、遮断周波数に着目すると、破線の特性の方が
周波数が高くなる。しかし、遮断周波数は、入力パルス
信号の立ち上がり時間が必要とする通過帯域以上に高い
必要はなく5むしろ、入力パルス信号の立ち−1−かり
時間が必要とする範囲では振幅特性の平坦な方が出力パ
ルス信号の波形は良好となる。
6. In this case, when focusing on the cutoff frequency, the frequency is higher for the characteristic indicated by the broken line. However, the cutoff frequency does not need to be higher than the passband that requires the rise time of the input pulse signal.5In fact, it is better to have a flat amplitude characteristic in the range that requires the rise time of the input pulse signal. The waveform of the output pulse signal becomes good.

従って、遮断周波数が入力パルス信号の立ち上がり時間
の必要とする範囲内にあれば、導線路6がマイクロスト
リップ線路D L部分とインダクタンスL部分から形成
されることにより、出力パルス信号の立ち一層がり波形
の改良が可能となる。
Therefore, if the cutoff frequency is within the range required by the rise time of the input pulse signal, the conductor line 6 is formed from the microstrip line D L section and the inductance L section, so that the rising waveform of the output pulse signal is It becomes possible to improve the

本発明の分布定数型電磁遅延線において2ボビン3の幅
Wに対する寸法BやDの割合は、その値によってかなり
変化する。本発明者は2例えば厚さ0.Q7mm、幅0
.2mmの導体を2幅W−5mmのボビン3にピンチ0
.35mmで40タ一ン単層ソレノイド状に形成し、第
1図と同様な構成で遅延時間2ns、特性インピーダン
ス100Ωの分布定数型電磁遅延線を作って実験した。
In the distributed constant type electromagnetic delay line of the present invention, the ratios of the dimensions B and D to the width W of the two bobbins 3 vary considerably depending on their values. The inventor has determined that the thickness is 2, for example, 0. Q7mm, width 0
.. Pinch the 2mm conductor to the bobbin 3 with width W-5mm.
.. An experiment was conducted by fabricating a distributed constant electromagnetic delay line having a delay time of 2 ns and a characteristic impedance of 100 Ω with a configuration similar to that shown in FIG.

すると1寸法りを13よりも幅Wに対して約5%大きく
することにより、出力振幅Vの立ち上がりが約8%改善
され、上述した第3図の実線のように出力振幅の略10
0%まで素早く立ち上げることができた。
Then, by increasing the width W by 1 dimension by about 5% compared to 13, the rise of the output amplitude V is improved by about 8%, and as shown by the solid line in FIG.
I was able to quickly bring it up to 0%.

また、出力パルス信号の立ち上がり時間は20Qpsの
超高速のものが得られたが、立ち上がり部の傾斜は両者
殆ど同じであり、結局本発明では出力波形が改善された
Further, although an extremely fast rise time of 20 Qps was obtained for the output pulse signal, the slope of the rise portion was almost the same for both cases, and the output waveform was improved in the present invention.

これに対して、ボビン30幅方向WT:B=Dとした場
合、導線路6のターン数が例えば30タ一ン以上あると
すれば、出力パルス信号の立ち上がり波形は、第3図の
破線のように100%よりやや低く立ち上がり、その後
に次第に100%に達する傾向にある。これは、導線路
6のターンを増加して遅延時間を増加させると、その傾
向が一層強くなり、好ましくない。
On the other hand, when the bobbin 30 width direction WT: B=D, and the number of turns of the conductive path 6 is, for example, 30 turns or more, the rising waveform of the output pulse signal is as shown by the broken line in FIG. It tends to rise slightly below 100% and then gradually reach 100%. This tendency becomes even stronger when the number of turns in the conductive line 6 is increased to increase the delay time, which is not preferable.

本発明の分布定数型電磁遅延線は、接地電極]を導線路
6の折れ曲がり部8側に寄せて配置する場合に限らず、
単位導線路5の接続部7側に寄せてD<Bとしてもよい
The distributed constant electromagnetic delay line of the present invention is not limited to the case where the ground electrode is placed close to the bent portion 8 side of the conductive line 6.
D<B may be set closer to the connecting portion 7 side of the unit conductive line 5.

なお、ボビン3の幅W寸法に対する寸法B、  Dの割
合すなわち接地電極1を一方へ寄せる割合は。
The ratio of the dimensions B and D to the width W of the bobbin 3, that is, the ratio at which the ground electrode 1 is moved to one side is as follows.

分布定数型電磁遅延線の構成や目的とする特性に応じて
最適の値に選定すればよい。
The optimum value may be selected depending on the configuration of the distributed constant electromagnetic delay line and the desired characteristics.

また、第6図に示すように、ボビン3の幅W方向の中央
部を外して2枚の接地電極9a、9bを対向するよう長
手方向に沿って配置してもよい。
Alternatively, as shown in FIG. 6, the center portion of the bobbin 3 in the width W direction may be removed and the two ground electrodes 9a and 9b may be arranged along the longitudinal direction so as to face each other.

この構成の分布定数型電磁遅延線では、若干プリシュー
トが増加する傾向があるものの9本発明の目的達成が可
能である。
Although the distributed constant type electromagnetic delay line having this configuration tends to have a slight increase in preshoot, it is possible to achieve the objects of the present invention.

さらに1本発明の分布定数型電磁遅延線は、第7図に示
すように、誘電体からなる偏平で細長いよ ボビン10の外周に、第1図のヰうな単層ソレノイド状
の導線路6を形成し、その外周を誘電体11で覆うとと
もに、接続部7前後の部分を除いて導線路6と対向する
ように接地電極12を被せる構成も可能である。
Furthermore, as shown in FIG. 7, the distributed constant electromagnetic delay line of the present invention has a single-layer solenoid-shaped conducting path 6 as shown in FIG. A configuration is also possible in which the outer periphery is covered with a dielectric 11 and the ground electrode 12 is covered so as to face the conducting path 6 except for the portions before and after the connecting portion 7 .

本発明の分布定数型電磁遅延線にあっては、導線路13
の特性インピーダンスを6)8整するために。
In the distributed constant electromagnetic delay line of the present invention, the conductive line 13
In order to adjust the characteristic impedance of 6)8.

特に特性インピーダンスを増加させるため、第8図に示
すように、接地電極1に細いスリット14を多数分散し
て形成することも可能である。ここでは導線路13は連
続する導体を単層ソレノイド状に巻いて形成されている
In particular, in order to increase the characteristic impedance, it is also possible to form a large number of thin slits 14 distributed in the ground electrode 1, as shown in FIG. Here, the conducting path 13 is formed by winding a continuous conductor into a single-layer solenoid shape.

この構成の分布定数型電磁遅延線おいて、スリット14
と第1図に示す本発明の距離りの部分の目的とする効果
は別のものである。
In the distributed constant electromagnetic delay line with this configuration, the slit 14
The intended effects of the distance portion of the present invention shown in FIG. 1 are different.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明の分布定数型電磁遅延線は、
接地電極が各ターンの導線路の一部と対向するように配
置されているから、4線路の途中に略インダクタンスし
のみの部分が形成され、出力波形、特に立ち上がり波形
が改善される。
As explained above, the distributed constant electromagnetic delay line of the present invention is
Since the ground electrode is arranged so as to face a part of the conductive line of each turn, a part with almost no inductance is formed in the middle of the four lines, and the output waveform, especially the rising waveform, is improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図は本発明の分布定数型電磁遅延線の
一実施例を示す正面図および側面図、第3図は第1図に
示す分布定数型電磁遅延線および本発明の参考となる分
布定数型電磁遅延線(図示せず)の立ち上がり波形図、
第4図は第1図の分−10= 布定数型電磁遅延線の等価回路図、第5図は第1図およ
び本発明の参考となる分布定数型電磁遅延線における周
波数に対する出力振幅の関係を示す図、第6図〜第8図
は本発明の他の実施例を示す側面図および正面図である
。 1.9a、9b、12・・接地電極 2.11・・・・・・・・誘電体 3.10・・・・・・・・ホビン 5・・・・・・・・・・・単位導線路 6.13・・・・・・・・導線路 7・・・・・・・・・・・接続部 8・・・・・・・・・・・折れ曲がり部14・・・・・
・・・・・・スリット OL・・・・・・・・・・・ マイクロストリップ線路 15・・・・・・・・・・・インダクタンス特許出願人
  エルメック株式会社 13 :導(1路 2     良
1 and 2 are front and side views showing one embodiment of the distributed constant electromagnetic delay line of the present invention, and FIG. 3 is a front view and a side view showing an embodiment of the distributed constant electromagnetic delay line shown in FIG. A rising waveform diagram of a distributed constant type electromagnetic delay line (not shown),
Figure 4 shows the equivalent circuit diagram of Figure 1 - 10 = distributed constant type electromagnetic delay line, and Figure 5 shows the relationship between the output amplitude and the frequency in the distributed constant type electromagnetic delay line that is used as a reference for Figure 1 and the present invention. FIGS. 6 to 8 are a side view and a front view showing other embodiments of the present invention. 1.9a, 9b, 12...Ground electrode 2.11...Dielectric 3.10...Hobbin 5...Unit conductor Route 6.13...Conductor line 7...Connection section 8...Bend section 14...
......Slit OL......Microstrip line 15......Inductance patent applicant Elmec Corporation 13: Conductor (1 path 2 good)

Claims (1)

【特許請求の範囲】 導体が単層ソレノイド状にスペース巻きされてなる導線
路と、 この導線路に誘電体を介して対向させた接地電極と、 を具備する分布定数型電磁遅延線において、前記接地電
極が、各ターンの前記導線路の一部と対向するように配
置されてなることを特徴とする分布定数型電磁遅延線。
[Scope of Claims] A distributed constant electromagnetic delay line comprising: a conducting line in which a conductor is space-wound in the form of a single-layer solenoid; and a grounding electrode opposed to the conducting line via a dielectric. A distributed constant electromagnetic delay line characterized in that a ground electrode is arranged to face a part of the conductive line of each turn.
JP28168984A 1984-12-26 1984-12-26 Distribution constant type electromagnetic delay line Granted JPS61154210A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28168984A JPS61154210A (en) 1984-12-26 1984-12-26 Distribution constant type electromagnetic delay line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28168984A JPS61154210A (en) 1984-12-26 1984-12-26 Distribution constant type electromagnetic delay line

Publications (2)

Publication Number Publication Date
JPS61154210A true JPS61154210A (en) 1986-07-12
JPH044771B2 JPH044771B2 (en) 1992-01-29

Family

ID=17642607

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28168984A Granted JPS61154210A (en) 1984-12-26 1984-12-26 Distribution constant type electromagnetic delay line

Country Status (1)

Country Link
JP (1) JPS61154210A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4317544Y1 (en) * 1965-05-17 1968-07-20

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4317544Y1 (en) * 1965-05-17 1968-07-20

Also Published As

Publication number Publication date
JPH044771B2 (en) 1992-01-29

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