JPS61152067A - Semiconductor device - Google Patents

Abstract

PURPOSE:To form a high speed integrated circuit by providing an electrode formed with a conductor layer which contains a metal boride of a main component of high melting point transition metal such as Ta, Nb, Ti, W, Mo, etc. or further contains nitrogen on a semiconductor substrate such as GaAs, etc. CONSTITUTION:A GaAs wafer 2 which has an epitaxial growth layer 1 is prepared and, e.g., boracic tungsten 3 3,000Angstrom thick is laid on he surface of the wafer by plasma decomposition. The boracic tungsten is finished to a required shape and dimensions using hot etching. Then, a COD-AlN film 4 is formed on all the surface of the wafer and annealed. Further, the back surface of the wafer is made thinner by polishing, an Au-Ge layer is formed on all the back surface by vacuum deposition, etc. and an ohmic electrode 5 of the back surface is formed by making an alloy with GaAs. At last, the AlN film 4 on the surfaces is removed with a solution of fluoric acid, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device equipped with an electrode containing a boron compound of a high melting point transition metal or nitrogen therein.

[Technical background of the invention and its problems]

Ion implantation technology, in which elements with different numbers of valence electrons are implanted as ions into a semiconductor substrate in order to electrically activate the substrate, is an indispensable technology in the manufacturing of semiconductor devices, especially in the manufacturing process of integrated circuits with fine patterns. It becomes. Since this process and an annealing process in which the ions are maintained at high temperatures are used to activate the ions, metals for electrode wiring or insulating materials are also used under harsh conditions.For example, GaAs
In the case of ■-V group compound semiconductors such as
After implanting (0'an-"), the mask must be removed and the implanted atoms must be activated by annealing by holding at a high temperature, usually 750 to 1000 degrees Celsius, for 1 second to several tens of minutes. For ion implantation. As a mask of Regis)t Sin
! , 8iN, high-melting point metals, or a combination thereof are used, but with the miniaturization and higher performance of integrated circuits, 7iN is used to reduce mask misalignment and source resistance. It's starting to look like this.

Self-alignment technology, for example, uses a high-melting point metal layer as a mask for ion implantation, leaves it in place, and performs annealing.
This method uses it as an electrode as it is. An example of a high melting point metal layer for using such self-alignment technology is VV; Ti+Ta. However, when these metals reach a temperature of 700°C or higher, GaAs
The reaction with the substrate is considerably promoted, and the electrical properties, for example, when a Schottky diode is created, the Schottky barrier height φn decreases, and n as an indicator of the quality of the diode decreases.
An increase in the value may cause defects, etc. In addition, there are TiW, WSi, transition metal nitrides, etc. as alloys of high melting point metals, and TiW.

WS i'iI Id Symy) 'I' barrier height φn is somewhat low at 0.1 to 0.75 (V), and transition metal nitrides have a somewhat large resistivity of several hundred μΩ・偲. There is. Furthermore, the difference in linear expansion coefficient with the substrate is also an important point.

[Object of the Invention] An object of the present invention is to provide a semiconductor device that makes it possible to realize a high-speed integrated circuit.

[Summary of the invention]

The present invention provides T
AtNbt Tit We Equipped with an electrode formed of a metal boride containing a high melting point transition metal as the main component or a conductor layer (containing nitrogen therein), it remains in contact with the substrate even after high-temperature annealing. It is a semiconductor device that exhibits good electrical characteristics without causing any reaction.Also, borides can be formed by thermal decomposition or plasma decomposition in an atmosphere containing high melting point transition metal halides and boron hydride. It can be easily formed by doing this.

〔Effect of the invention〕

According to the present invention, by using a boride of a high melting point metal or a material containing nitrogen therein as an electrode material, it is possible to withstand high temperatures and have a small linear expansion difference with GaAs. A semiconductor device including electrodes can be provided.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings. FIGS. 1(a) to 1(f) show cross-sectional views of products obtained in the process of forming a Schottky diode as an example of the semiconductor device of the present invention.

First, a GaAA wafer 80 having an epitaxially grown layer 1 is prepared. The epitaxial layer has a thickness of 2μ nM'
P + rear moment 5 ×1 o”ots-”, GaAs
It is desirable to have an n-type carrier concentration of about "cm-" below. Next, Figure 1(b)
For example, tungsten boride (WB) (3QOOA) is deposited on the surface of the nuclear wafer by plasma decomposition as shown in FIG. In the plasma decomposition method, the wafer is placed in a plasma decomposition apparatus, and the inside of the apparatus is heated to ~lX10'To.
rr vacuum and then, for example, about 5 degrees of hexafluoride/guste/7! / While flowing argon gas containing Sten gas and argon gas containing boron hydride (diborane) of about λ5 at a predetermined ratio (20:50CC/111m), the degree of vacuum t ~ 10-' Torr Table 1c L "Ck
Then, discharge with about 200 WO high frequency power for ~1 hour to form 2000 tungsten boride. Note that the wafer is heated to 100 to 300 CK". The ratio of boronization/boronization can be changed by changing the flow rate. Next, as shown in FIG. hand,
R) 11 Machining of tungsten boride to the desired shape and dimensions. In this example, a circular 11L pole with a diameter of 100 μm is planned to be formed, leaving a part of +I! The phor7 alloy 1- is removed to form an electric field f11It-. To selectively remove WBA-, use F-based solution or reactive ion etching technology. [()], hold at 800°C for 20 minutes, and perform Kenney IJ.Furthermore, as shown in Fig. 1(e), the wafer IX surface is polished to a thickness of 2 to 150 μm, and the entire back surface is coated with vacuum evaporation, etc. An Au-Ge layer is formed at ~35oC for about 20 minutes, and alloyed with GaAs to form an ohmic 11-pole layer on the back surface.Finally, the surface is heated as shown in Figure 1(f). The upper AIN film 2 is removed using a seven-layer fR solution.The thus formed boron-containing diode is electrically measured and the barrier height φn is
=0.9, net ~1.2, series resistance Rs =
The resistance was 0.5Ω and the reverse breakdown voltage was 20Ω.

Also, if the boron ratio is set in the range of 20 to 80%, Ga
The difference in linear expansion with As was I x 10''C-1, and a low residual strain was achieved.Furthermore, even if nitrogen was added to this WB layer, the characteristics were the same as in the above embodiment.

Next, a self-alignment type FET using such a tungsten boride layer will be explained.

FIGS. 2(a) to 2(f) show cross-sectional views of products sequentially obtained in the steps of forming the FET of this example. First, Figure 1 (
As shown in a), an ion implantation window (2) is formed on a GaAs semi-insulating substrate (2) using a resist or the like as shown in FIG. 2 (b),
Si atoms are ion-implanted from above to form a first ion-implanted layer (2). Next, as shown in FIG. 2 (C1), the ion implantation window is removed, and a tungsten boride layer of ~3000λ is deposited as in the previous example, and then the gate electrode (2) is formed using the photoetching method as described above. Next, as shown in Fig. 1(d), as is known as the self-alignment method, using this gate electrode (■) and resist (■) as a mask, ions are implanted (Si atoms) in a higher concentration than the first ion-implanted layer (■). Form a high concentration second ion implantation layer [phase].Subsequently, the first ion implantation layer [phase] is formed.
As shown in Figure (61), the resist is removed and the entire surface of the wafer is coated with ~300
About 3,000 layers of CVD AlN■ are formed at a temperature of ℃. After this, the wafer was placed in an inert or reducing atmosphere for 8 hours.
The temperature is maintained at 00° C. for about 15 minutes to activate the ion-implanted layer by annealing. Thereafter, the AIN film 2 on the surface is removed as shown in FIG. 1(f). Furthermore, for example, Au is vacuum-deposited to form a source electrode @ and a drain electrode ◎ in a manner convenient for the body/disc/debug.
T can be created.

In the above embodiment, the conductive layer is a tungsten boride layer and the semiconductor substrate is GaAs, but the conductive layer is made of other high melting point transition metals such as Mo, Nb, Ti, Zr, etc. or alloys containing these metals as main components. It may be a boride or a boronide containing nitrogen, and its formation method is not limited to plasma decomposition, but may also be any method such as thermal decomposition or sputtering.
, 8i, InP, etc., any semiconductor that uses 7 alignment technology may be used.

[Brief explanation of drawings]

FIG. 1 shows an example of a semiconductor device according to the present invention.
FIG. 2 is a cross-sectional process diagram of a semi-finished product showing an example of the manufacturing process of a semiconductor device of the present invention, and FIG. be. ■: Ebitaxial layer ■: Ebitaxial wafer ■Tungsten diboride metal layer ■: C0D-AIN layer ■: Ohmic electrode ■: Semi-insulating GaAs substrate ■Niresist ■: First ion implantation layer ■Tungsten diboride Metal layer [phase]: Second ion-implanted layer @: AJN layer @: Source electrode 0 Nidrain electrode Representative Patent attorney Noriyuki Chika (and 1 other person)

Claims (3)

[Claims] (1) W, Mo, T on at least a portion of the semiconductor substrate
1. A semiconductor device comprising an electrode formed of a compound conductor layer of metal and boron, the main component of which is any one of a high melting point transition metal such as a, Nb, Ti, or V. (2) The elemental ratio of boron in the compound conductor layer is 20 to 8
2. The semiconductor device according to claim 1, wherein the amount is 0%. (3) The semiconductor device according to claim 1, wherein the compound conductor layer contains nitrogen.