JPS61151421U - - Google Patents
Info
- Publication number
- JPS61151421U JPS61151421U JP3414485U JP3414485U JPS61151421U JP S61151421 U JPS61151421 U JP S61151421U JP 3414485 U JP3414485 U JP 3414485U JP 3414485 U JP3414485 U JP 3414485U JP S61151421 U JPS61151421 U JP S61151421U
- Authority
- JP
- Japan
- Prior art keywords
- power
- radio device
- booster circuit
- control type
- low power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
- 238000001514 detection method Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
Landscapes
- Control Of Amplification And Gain Control (AREA)
Description
第1図は本考案の多段電力制御形ブースタ回路
の実施例を示すブロツク図、第2図は上記実施例
における入力電力と出力電力の関係の一例を示す
図、第3図は従来の多段電力制御形ブースタ回路
を示すブロツク図である。
1……入力端子、2……検波回路、3……電力
増幅器、4……検波回路、5……アイソレータ、
6……送信帯域ろ波器、7……抵抗ラダー、8…
…コンパレータ、9……符号器、10……復号器
、11……抵抗ラダー、12……アナログスイツ
チ、13……制御増幅器、14……出力端子。
Fig. 1 is a block diagram showing an embodiment of the multistage power control type booster circuit of the present invention, Fig. 2 is a diagram showing an example of the relationship between input power and output power in the above embodiment, and Fig. 3 is a diagram showing a conventional multistage power booster circuit. FIG. 3 is a block diagram showing a controlled booster circuit. 1... Input terminal, 2... Detection circuit, 3... Power amplifier, 4... Detection circuit, 5... Isolator,
6... Transmission band filter, 7... Resistance ladder, 8...
... Comparator, 9 ... Encoder, 10 ... Decoder, 11 ... Resistance ladder, 12 ... Analog switch, 13 ... Control amplifier, 14 ... Output terminal.
Claims (1)
力をそのレベルに応じて増幅して出力する多段電
力制御形ブースタ回路であつて、前記小電力無線
機からの入力電力を検出する第1の手段と、検出
された入力電力に基づいて入力電力レベルを弁別
する第2の手段と、その弁別結果に応じて出力電
力レベルの切替えを行なう第3の手段とを具備す
ることを特徴とする多段電力制御形ブースタ回路
。 A multi-stage power control type booster circuit connected to a low power radio device and amplifying and outputting the power of the low power radio device according to its level, the first circuit detecting the input power from the low power radio device. A second means for discriminating the input power level based on the detected input power, and a third means for switching the output power level according to the discrimination result. Multi-stage power control type booster circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3414485U JPS61151421U (en) | 1985-03-12 | 1985-03-12 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3414485U JPS61151421U (en) | 1985-03-12 | 1985-03-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61151421U true JPS61151421U (en) | 1986-09-19 |
Family
ID=30537241
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3414485U Pending JPS61151421U (en) | 1985-03-12 | 1985-03-12 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61151421U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0376430A (en) * | 1989-08-18 | 1991-04-02 | Nec Corp | Portable radio equipment |
-
1985
- 1985-03-12 JP JP3414485U patent/JPS61151421U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0376430A (en) * | 1989-08-18 | 1991-04-02 | Nec Corp | Portable radio equipment |