JPS61150150A - Recording mode discriminating circuit of tape - Google Patents

Abstract

PURPOSE:To discriminate the recording mode of a tape at high speed reproduction with simple circuit constitution by constituting a discriminating circuit with two comparator circuits having different reference levels and an exclusive OR circuit. CONSTITUTION:A frequency generator 1 generates a pulse signal corresponding to a cylinder rotating speed. This signal is amplified (3) and inputted to a frequency detection circuit 3 and becomes a detected output voltage 100 corresponding to the cylinder rotary speed. The voltage 100 is inputted to comparators 12, 13 at high speed reproduction, compared with different reference levels by the comparators 12, 13 and the result is outputted to an exclusive OR circuit 14. The circuit 14 outputs a recording mode discrimination result 400 of the reproduced tape. The tape recording mode discriminating circuit consist of the comparators 12, 13 and the circuit 14 in this way allowing to attain discrimination with simple circuit constitution.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a magnetic tape recording mode discrimination circuit during high-speed playback of a video tape recorder.

[Technical background of the invention]

Conventionally, the video tape recorder was used for high-speed playback.
There is a method of running the tape at high speed using a medium-speed tape. However, when performing high-speed playback at even higher speeds, or when using a tape drive mechanism that uses a belt system with a large reduction ratio, it becomes difficult to run the tape with the capstan, and the above method cannot be used. It disappears.

Therefore, in such a case, a method is used in which the tape is run at high speed by direct r-live of the reel motor. In this method, the speed (frequency) detection signal of the control signal (hereinafter referred to as CTL signal) recorded on the control track of the tape is used as the return signal to the reel motor drive system, thereby generating the reproduced CTL signal. The tape speed is controlled so that the frequency remains constant. In this case, regardless of the recording mode of the reproduced tape, by frequency-dividing the reproduced CTL signal to 1/N, a high-speed search of N times speed can be performed.

[Problems with background technology]

By the way, when speed control is applied to keep the frequency of the reproduced CTL signal constant as described above, the recording mode of the reproduced tape can be determined by, for example, using a frequency generator on a pinch roller that rotates as the tape runs. A method is adopted in which the determination is made by comparing the frequency of the Nors signal of this frequency generator and the control Nors.

However, this method requires parts such as a frequency generator, a frequency comparison circuit, etc., and requires a complicated circuit configuration, which has the disadvantage of increasing costs and reducing reliability.

[Object of the Invention] In view of the above-mentioned drawbacks, an object of the present invention is to provide a tape recording mode discrimination circuit that can discriminate the tape recording mode during high-speed playback with a simple circuit configuration. .

[Summary of the invention]

The present invention uses two controllers, each having a different comparison level, to compare the level of the signal obtained by frequency detection of a signal from a frequency generator generated in response to the number of rotations of a cylinder during high-speed playback of a video tape recorder. The above object is achieved by using a tape recording mode discriminating circuit configured to perform a comparison between two data sets and then perform an exclusive OR of these comparison results to determine the recording mode of the reproduced tape.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a tape recording mode discrimination circuit according to this invention. A frequency generator 1 is an FGA corresponding to the rotational speed of a cylinder (not shown) driven by a cylinder motor 2. Generates a pulse signal. After this FGA pulse signal is amplified by amplifier 3&C,
The signals are input to the frequency detection circuit 4, where the frequencies of the p() and c pulse signals are detected and become a detected output voltage 100 corresponding to the rotational speed of the cylinder. This frequency detection output voltage 1
00 is amplified by the amplifier filter circuit 5 and after removing unnecessary components, it is output to the drive circuit 6. The drive circuit 6 drives the cylinder motor 2 based on the detected output voltage, and performs control to always maintain the rotational speed of the cylinder at a predetermined value. In addition, an hmυ change switch 7 is inserted into the input − of the amplifier filter circuit 5, and the movable terminal C#
i. During normal playback of a tape, the terminal is switched to allll, and during high-speed playback, the switch is switched to terminal b@.

During normal playback, the playback CI'L signal 200 obtained from the playback tape is phase-detected by the IIi phase detection circuit 8,
This detected output voltage is input to the terminal 3 of the changeover switch 7 after unnecessary components are removed by the filter 9 . Therefore, during normal reproduction, this phase detection output voltage is input to the drive circuit 6 through the amplifier filter circuit 5, thereby controlling the phase of the cylinder rotated by the cylinder motor 2. During high-speed playback, the horizontal synchronization signal separated from the reproduced video signal by the horizontal synchronization signal separation circuit 10 is detected by the frequency detection circuit 11, and the detection output voltage 300 according to the difference from the normal horizontal frequency is changed over by the switch 7. input to the terminal. Therefore, during high-speed reproduction, this frequency detection output voltage 300 is input to the drive circuit 6 via the amplifier filter circuit 5, so that the cylinder driven by the cylinder motor 2 is controlled so that the reproduced horizontal synchronization signal has a regular frequency. The rotation speed is controlled.

-10,000, the detection output voltage of the frequency detection circuit 4 is inputted to the 100F filter 12 and 13. Detection output voltage 100
are compared with different reference levels by comparators 12.13, and the results are sent to exclusive OR circuits (EX
OR) 14. The exclusive OR circuit 14 outputs a recording mode determination result 400 for the reproduced tape. The part surrounded by a solid line in the figure is a recording mode discrimination circuit for the playback tape, and the other parts show a cylinder rotational speed control system during normal playback and a cylinder rotational speed control system during high-speed playback.

Next, the operation of this embodiment will be explained. FIG. 2 shows an example of an operation timing chart of the frequency detection circuit 4 shown in FIG. A multi-signal MM is used, a trapezoidal wave T is created from this signal, and the voltage of the trapezoidal wave T is sampled and held at the rising edge of the PG pulse signal F and outputted as a frequency detection output voltage 100. Here, the above trapezoidal wave T
Since the cycle of is always constant, the detection output voltage 100 varies depending on the rotation speed of the cylinder, and as the speed becomes slower, the output voltage decreases, and as the speed becomes faster, the output voltage increases. . The frequency detection circuit 4 has a voltage of VC (
Generally speaking, the following discussion will proceed assuming that the detected output voltage 100 during normal reproduction is fVc.

-1. During high-speed playback, the speed of the cylinder is controlled by the playback horizontal synchronization signal, and the rotation speed of the cylinder motor 2 is always adjusted so that the horizontal synchronization signal frequency is at the specified value (1s, 734 KHz in the NT8C standard). 2 live circuit 6 increases or decreases. Therefore, when the playback tape is played at high speed in the forward direction (hereinafter referred to as middle knee), the cylinder is accelerated, and conversely, when the playback tape is played back at high speed in the reverse direction (hereinafter referred to as repeat), the cylinder is decelerated. . As a result, the detected output voltage 100 of the frequency detection circuit 4 corresponding to the rotational speed of the cylinder becomes more than 2Vc at the key time and less than -LVc at the time of the repeater. Here, the recording mode of the playback tape, that is, the tape speed r during normal playback.
There are A and B, and both are N times faster dF&
- Assuming that the sentence was carried out by Levi Hatake - and there is the condition of person > B, the detection output voltage is 100 when the above-mentioned Deep Bee P person's tape (recording mode 1'A) is pressed and read. teeth,
The tape speed is B, respectively.
When a tape (recording mode B) is used for keying and reviewing, the vBR is 780%. Furthermore, the following relationship holds true between these detected output voltages 100.

VAC>VBO>”>VBR> TAB Then,
The comparison level of the comparator 12 in FIG.
When the comparison levels of nc)/2tL and s7AV-113 are set to (VBR+WAR)/2K, the voltage level of the detected output voltage 100 input to these comparators 12 and 13 will be determined as shown below. Comparison results as shown in Table 1 are obtained. However, each computer router 12.
13 outputs "O" when the input detection output voltage is higher than each comparison level, and outputs "#i11" when the input detection output voltage is higher than each comparison level.These comparators 1
When the comparison results in 2.13 are exclusive-ORed by the exclusive-OR circuit 14, the results are as shown in Table 1. Logic "0#" is logic ° when a tape in recording mode B is inserted for medium 1 or review.

Therefore, the output result of the exclusive OR circuit 14 indicates that the recording mode of the playback tape currently being played at high speed is
can be determined.

FIG. 3 shows a detailed example of the feces/arm parts 12 and 13 shown in FIG. 1. Each controller ν.

The comparison level applied to the positive input terminal KFi of the converter 12 is given by adjusting the values of the voltage dividing resistor 15.16 and the voltage dividing resistor 17.18. There is.

FIG. 4 is a circuit showing another detailed example of the comparators 12 and 13 shown in FIG. 1, and is a transistor 19!
A single router 12 is formed, and a transistor 20 forms a single router 13. The inversion level of each transistor 19, 20 is given by pacemeasing resistors 21, 22, 23, 24, and is set so that each inversion level becomes 5 md.

According to this embodiment, since the tape recording mode determination circuit can be configured by the comparators 12 and 13 and the exclusive OR circuit 14, the tape recording mode r can be determined with a simple circuit configuration. It can be made inexpensive and its reliability can be improved. .

〔Effect of the invention〕

As described above, according to the tape recording mode discrimination circuit of the present invention, the frequency detection output voltage is obtained from the speed control system that controls the rotational speed of the existing cylinder.

By configuring this to take the exclusive OR of the results of comparison with two different comparison levels, it is possible to determine the recording mode of the tape during high-speed playback with a simple circuit configuration.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of the tape recording mode discrimination circuit of the present invention, FIG. 2 is an operation timing chart of the frequency detection circuit shown in FIG. 1, and FIG. FIG. 4 is a circuit diagram showing another detailed example of the comparator section shown in FIG. 1. FIG. l...Frequency generator 2...Cylinder 4.1
1... Frequency detection circuit 6... Drive circuit 10.
...Horizontal synchronization signal separation circuit 12.13...Comparator 14...Exclusive OR circuit agent Patent attorney Noriyuki Chika (1 person) Fig. 2 Fig. 3 Fig. 4

Claims (1)

[Claims] During normal operation, a signal obtained by detecting the speed of a pulse signal from a frequency generator generated in accordance with the rotational speed of the cylinder in which the video head is mounted is fed back to the cylinder drive system to control the speed of the cylinder. cylinder speed control means for controlling the speed of the cylinder by feeding back a speed detection signal of the horizontal synchronization signal of the reproduced video signal to the cylinder drive system; and a cylinder speed control means for controlling the speed of the cylinder by feeding back a speed detection signal of the horizontal synchronization signal of the reproduced video signal; A video tape recorder having a reel driving means, a comparing means for comparing the speed detection signal of the horizontal synchronizing signal at two different comparison levels during high-speed playback, and a logic means for taking an exclusive OR of the results of these two comparisons. A tape recording mode determination circuit, characterized in that the recording mode of the reproduced tape is determined based on the output result of the logic means.