JPS61149474U - - Google Patents
Info
- Publication number
- JPS61149474U JPS61149474U JP3031885U JP3031885U JPS61149474U JP S61149474 U JPS61149474 U JP S61149474U JP 3031885 U JP3031885 U JP 3031885U JP 3031885 U JP3031885 U JP 3031885U JP S61149474 U JPS61149474 U JP S61149474U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- image sensor
- ccd
- ccd image
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003111 delayed effect Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
Landscapes
- Picture Signal Circuits (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Description
第１図は本考案ＣＣＤ読み出し回路の一実施例
を示す回路図、第２図Ａ〜Ｅはその動作説明用信
号波形図、第３図は従来の相関２重サンプリング
回路を示す回路図、第４図Ａ〜Ｅはその動作説明
用の信号波形図、第５図は一般的なサンプルホー
ルド回路を示す回路図である。
３０……ＣＣＤ素子、３１……コンデンサ、３
２……バツフア増幅器、３３……遅延線、３４…
…差動増幅器、３５……ローパスフイルタ、３６
……抵抗、３７……スイツチ、３８……バツフア
増幅器、３９……ＣＣＤ読み出し出力、４０……
フイードスルーレベル、４１……信号レベル、４
２……リセツトレベル、４３……ＣＣＤ出力信号
、４４……遅延信号、４５……ゲート信号、４６
……ゲート出力。
FIG. 1 is a circuit diagram showing an embodiment of the CCD readout circuit of the present invention, FIGS. 2A to 2E are signal waveform diagrams for explaining its operation, and FIG. 3 is a circuit diagram showing a conventional correlated double sampling circuit. 4A to 4E are signal waveform diagrams for explaining its operation, and FIG. 5 is a circuit diagram showing a general sample and hold circuit. 30...CCD element, 31...capacitor, 3
2...Buffer amplifier, 33...Delay line, 34...
... Differential amplifier, 35 ... Low pass filter, 36
...Resistor, 37...Switch, 38...Buffer amplifier, 39...CCD readout output, 40...
Feed through level, 41...Signal level, 4
2...Reset level, 43...CCD output signal, 44...Delay signal, 45...Gate signal, 46
...Gate output.
Claims (1)
する遅延手段と、 該遅延手段により遅延した信号と前記ＣＣＤ撮
像素子出力との間の減算を行う手段と、 その減算出力のうち前記ＣＣＤ撮像素子出力の
信号レベル期間と遅延した信号のフイードスルー
レベル期間との重畳期間の信号成分を取り出す手
段と、 その取り出した信号成分のうち、前記ＣＣＤ撮
像素子の信号帯域幅に対応する成分を通過させて
撮像信号を取り出すフイルタ手段とを具えたこと
を特徴とするＣＣＤ読み出し回路。 (2) 実用新案登録請求の範囲第１項記載のＣＣ
Ｄ読み出し回路において、前記所定遅延時間は、
前記重畳期間が最大となる時間であることを特徴
とするＣＣＤ読み出し回路。[Claims for Utility Model Registration] (1) Delay means for delaying the output of a CCD image sensor by a predetermined time; means for subtracting between the signal delayed by the delay means and the output of the CCD image sensor; means for extracting, from the subtracted output, a signal component in a superimposed period of the signal level period of the output of the CCD image sensor and the feed-through level period of the delayed signal; and a signal band of the CCD image sensor among the extracted signal components; A CCD readout circuit comprising filter means for passing a component corresponding to the width and extracting an image signal. (2) CC stated in Paragraph 1 of Claims for Utility Model Registration
In the D readout circuit, the predetermined delay time is
A CCD readout circuit characterized in that the superimposition period is a maximum time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3031885U JPS61149474U (en) | 1985-03-05 | 1985-03-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3031885U JPS61149474U (en) | 1985-03-05 | 1985-03-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61149474U true JPS61149474U (en) | 1986-09-16 |
Family
ID=30529910
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3031885U Pending JPS61149474U (en) | 1985-03-05 | 1985-03-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61149474U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63149968A (en) * | 1986-12-12 | 1988-06-22 | Olympus Optical Co Ltd | Solid-state image pickup signal processing circuit for electronic endoscope |
-
1985
- 1985-03-05 JP JP3031885U patent/JPS61149474U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63149968A (en) * | 1986-12-12 | 1988-06-22 | Olympus Optical Co Ltd | Solid-state image pickup signal processing circuit for electronic endoscope |
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