JPS61146019U - - Google Patents
Info
- Publication number
- JPS61146019U JPS61146019U JP2988285U JP2988285U JPS61146019U JP S61146019 U JPS61146019 U JP S61146019U JP 2988285 U JP2988285 U JP 2988285U JP 2988285 U JP2988285 U JP 2988285U JP S61146019 U JPS61146019 U JP S61146019U
- Authority
- JP
- Japan
- Prior art keywords
- sepp
- otl
- circuit
- mbtl
- inverted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 101000684181 Homo sapiens Selenoprotein P Proteins 0.000 claims description 4
- 102100023843 Selenoprotein P Human genes 0.000 claims description 4
- 229940119265 sepp Drugs 0.000 claims description 4
- 230000002238 attenuated effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Amplifiers (AREA)
Description
第１図は本考案の一実施例のＭＢＴＬ回路の構
成を示す回路図、第２図は第１図の等価回路図、
第３図は本考案の他の実施例のＭＢＴＬ回路の構
成を示す回路図、第４図は従来のＢＴＬ回路の構
成を示す等価回路図である。
１１，１２……ＳＥＰＰ ＯＴＬ回路、１３…
…反転・減衰回路、１４……負荷。
FIG. 1 is a circuit diagram showing the configuration of an MBTL circuit according to an embodiment of the present invention, FIG. 2 is an equivalent circuit diagram of FIG. 1,
FIG. 3 is a circuit diagram showing the configuration of an MBTL circuit according to another embodiment of the present invention, and FIG. 4 is an equivalent circuit diagram showing the configuration of a conventional BTL circuit. 11, 12...SEPP OTL circuit, 13...
...Inversion/attenuation circuit, 14...Load.
Claims (1)
回路と、 前記入力信号の位相が反転されかつ振幅が減衰
されたものが供給される第２のＳＥＰＰ ＯＴＬ
回路と、 該第１、第２のＳＥＰＰ ＯＴＬ回路の出力端
子間に接続された負荷を備えたことを特徴とする
ＭＢＴＬ回路。[Claims for Utility Model Registration] First SEPP OTL to which input signals are supplied
a second SEPP OTL provided with a phase-inverted and amplitude-attenuated version of the input signal;
An MBTL circuit comprising: a circuit; and a load connected between output terminals of the first and second SEPP OTL circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2988285U JPS61146019U (en) | 1985-03-02 | 1985-03-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2988285U JPS61146019U (en) | 1985-03-02 | 1985-03-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61146019U true JPS61146019U (en) | 1986-09-09 |
Family
ID=30529082
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2988285U Pending JPS61146019U (en) | 1985-03-02 | 1985-03-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61146019U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56146310A (en) * | 1980-04-15 | 1981-11-13 | Toshiba Corp | Gain control device for btl circuit |
-
1985
- 1985-03-02 JP JP2988285U patent/JPS61146019U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56146310A (en) * | 1980-04-15 | 1981-11-13 | Toshiba Corp | Gain control device for btl circuit |
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