JPS61136614U - - Google Patents
Info
- Publication number
- JPS61136614U JPS61136614U JP1962985U JP1962985U JPS61136614U JP S61136614 U JPS61136614 U JP S61136614U JP 1962985 U JP1962985 U JP 1962985U JP 1962985 U JP1962985 U JP 1962985U JP S61136614 U JPS61136614 U JP S61136614U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- muting
- switching
- input signal
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000007599 discharging Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Amplifiers (AREA)
Description
第１図及び第２図は夫々本考案回路の一実施例
の回路図及びミユーテイング動作電圧曲線、第３
図は従来のテープレコーダの一例のブロツク系統
図である。
１……再生ヘツド、５……スピーカ、６……マ
イクロホン、１０……ノイズ軽減アンプ、１０ａ
……制御端子、１１，Ｓ……スイツチ、１２……
パワーアンプ、１２ａ……ミユーテイング端子、
Ｑ１，Ｑ２……トランジスタ、Ｃ１……コンデン
サ、Ｒ１〜Ｒ３……抵抗。
1 and 2 are a circuit diagram and a muting operating voltage curve of an embodiment of the circuit of the present invention, respectively.
The figure is a block system diagram of an example of a conventional tape recorder. 1... Playback head, 5... Speaker, 6... Microphone, 10... Noise reduction amplifier, 10a
...Control terminal, 11, S...Switch, 12...
Power amplifier, 12a... Muting terminal,
Q1 , Q2 ...transistor, C1 ...capacitor, R1 to R3 ...resistance.
Claims (1)
て取出す選択回路と、該選択回路の出力側に設け
られミユーテイング機能を有する出力回路とを有
するミユーテイング回路において、該選択回路の
選択制御端子及び該出力回路のミユーテイング制
御端子に充電時定数、放電時定数が夫々異なる時
定数回路を夫々接続し、該夫々の時定数回路に上
記２つの入力信号を選択する切換えに応じて該時
定数回路を充電、放電せしめる切換回路を接続し
、該切換回路による上記選択回路の切換えを、一
方の入力信号から他方の入力信号に切換える時は
上記出力回路のミユーテイングの後に、該他方の
入力信号から該一方の入力信号に切換える時は上
記出力回路のミユーテイングの前に行なうように
構成してなるミユーテイング回路。 In a muting circuit that includes a selection circuit that selects and takes out one of two different input signals, and an output circuit that is provided on the output side of the selection circuit and has a muting function, the selection control terminal of the selection circuit and the output Connecting time constant circuits with different charging time constants and discharging time constants to the muting control terminals of the circuit, and charging the time constant circuits in response to switching to select the two input signals to the respective time constant circuits, When a switching circuit for discharging is connected and the switching circuit switches the selection circuit from one input signal to the other input signal, after muting the output circuit, the switching circuit changes from the other input signal to the one input signal. A muting circuit configured to perform switching to a signal before muting the output circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1962985U JPH0332093Y2 (en) | 1985-02-14 | 1985-02-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1962985U JPH0332093Y2 (en) | 1985-02-14 | 1985-02-14 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61136614U true JPS61136614U (en) | 1986-08-25 |
| JPH0332093Y2 JPH0332093Y2 (en) | 1991-07-08 |
Family
ID=30509379
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1962985U Expired JPH0332093Y2 (en) | 1985-02-14 | 1985-02-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0332093Y2 (en) |
-
1985
- 1985-02-14 JP JP1962985U patent/JPH0332093Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0332093Y2 (en) | 1991-07-08 |
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