JPH0431463U - - Google Patents
Info
- Publication number
- JPH0431463U JPH0431463U JP7237690U JP7237690U JPH0431463U JP H0431463 U JPH0431463 U JP H0431463U JP 7237690 U JP7237690 U JP 7237690U JP 7237690 U JP7237690 U JP 7237690U JP H0431463 U JPH0431463 U JP H0431463U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- terminal
- tape recorder
- playback
- output terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
Description
図面は本考案のテープレコーダのミユーテイン
グ回路を示すブロツク図である。
3……入力信号選択回路、4……再生信号入力
端子、5……録音信号入力端子、6……信号切換
端子、8……再生信号出力端子、9……録音信号
出力端子。
The drawing is a block diagram showing the muting circuit of the tape recorder of the present invention. 3... Input signal selection circuit, 4... Playback signal input terminal, 5... Recording signal input terminal, 6... Signal switching terminal, 8... Playback signal output terminal, 9... Recording signal output terminal.
Claims (1)
力端子と、前記各入力端子に加えられる信号のう
ちいずれか一方の信号を選択的に前記出力端子に
伝送するための制御信号が加えられる信号切換端
子とを有する入力信号選択回路を備えたテープレ
コーダに於て、再生モード以外の動作モード時に
は、前記再生信号入力端子に加えられる信号が前
記出力端子に伝送されない様にする制御信号を、
前記信号切換端子に加える手段を設けたことを特
徴とするテープレコーダのミユーテイング回路。 a playback signal input terminal, a recording signal input terminal, an output terminal, and a signal switch for applying a control signal for selectively transmitting one of the signals applied to each of the input terminals to the output terminal; In a tape recorder equipped with an input signal selection circuit having a terminal, a control signal for preventing a signal applied to the playback signal input terminal from being transmitted to the output terminal in an operation mode other than playback mode;
A muting circuit for a tape recorder, characterized in that the muting circuit for a tape recorder is provided with means for adding signals to the signal switching terminal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7237690U JPH0431463U (en) | 1990-07-06 | 1990-07-06 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7237690U JPH0431463U (en) | 1990-07-06 | 1990-07-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0431463U true JPH0431463U (en) | 1992-03-13 |
Family
ID=31610256
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7237690U Pending JPH0431463U (en) | 1990-07-06 | 1990-07-06 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0431463U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6113309B2 (en) * | 1981-01-20 | 1986-04-12 | Victor Company Of Japan | |
JPS6255202B2 (en) * | 1978-02-28 | 1987-11-18 | Tdk Electronics Co Ltd |
-
1990
- 1990-07-06 JP JP7237690U patent/JPH0431463U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6255202B2 (en) * | 1978-02-28 | 1987-11-18 | Tdk Electronics Co Ltd | |
JPS6113309B2 (en) * | 1981-01-20 | 1986-04-12 | Victor Company Of Japan |
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