JPS61136224A - Method of introducing impurity to one side of semiconductor substrate - Google Patents

Abstract

PURPOSE:To introduce impurities only to one side of a semiconductor substrate at any levels of surface concentration and diffusion depth by depositing dopant impurities on one side which faces to the opposite electrode in the semiconductor substrate by means of glow discharge in an atmosphere containing dopant impurities and diffusing the impurities to the surface layer of the substrate by heating. CONSTITUTION:After evacuating the reaction vessel 1 by the use of an evacuation system 5 through a vacuum valve 8, the valve 8 is throttled to lower the evacuation rate of the system 5, and at the same time the insulation gas is introduced from an impurity-containing bomb 7 to the vessel 1 through a regulating circuit 6 to adjust the gas pressure in the vessel 1 to 0.1-10Torr with the aid of a vacuum gauge 18. When a glow discharge is established between the electrodes 2, 3 after applying heat to the silicon substrates 10 placed on the electrode 3 with a heater 11 connected to a power supply, dopant impurities in the impurity gas are precipitated to form deposit layers 12 on the substrates 10. These substrates 10 are submitted to a prolonged heat- treatment in another furnace to obtain single-sided diffusion layers having desired surface concentration and diffusion depth.

Description

[Detailed description of the invention] [Technical field to which the invention pertains]

The present invention relates to a method for diffusing and introducing impurities into only one side of a semiconductor substrate.

[Prior art and its problems]

The conventional method of diffusing impurities on only one side of a semiconductor substrate is
For example, in the case of a silicon single crystal substrate, a Sing film 21 is formed on the entire surface of the single crystal substrate 10 as shown in FIG.
O is inserted into a diffusion furnace and brought into contact with an atmosphere containing dopant impurities such as phosphorus or boron.
An impurity layer 23 is deposited as shown in FIG. Alternatively, a solution containing dopant impurities is applied to the surface from which the 5tO1 film 22 has been removed. This silicon single crystal substrate IO was inserted into another diffusion furnace and heated to a predetermined degree of A. The diffusion layer 24 with the desired depth is obtained by stretching and diffusing the atmosphere and time as shown in FIG. In addition, the diffusion coefficient of impurities such as phosphorus and boron in sto*ll! is about 1/10 of that of silicon single crystal, and for example, if stretched diffusion is performed at 1250°C for 20 hours or more, the impurities are 310, M2
1 and reaches the silicon 1 & plate 10, forming an unnecessary diffusion layer 27. Therefore, it is difficult to obtain a single-sided impurity diffusion layer with a depth of 50 .mu.m or more. Further, after forming the 5i01 film 2 on the entire surface of the silicon substrate, the stoM film 2 on one side is
21 is required. As another method, as shown in FIG. 3, an impurity layer 23 of phosphorus, boron, etc.
is precipitated and subjected to stretching diffusion similar to the above case to obtain the desired diffusion layer 24. An impurity diffusion layer 2 is formed on the entire surface of this substrate.
4 is formed, the unnecessary diffusion layer 27 must be removed by polishing. This method is commonly used to obtain a diffusion layer of 50μ or more, but the desired diffusion layer 27 must be removed over the entire surface of the silicon single crystal substrate 10. After obtaining the deep diffusion layer, remove the unnecessary part 27
In particular, in the case of a diffusion layer of 100μ or more, there are inconveniences such as the labor required for polishing, a decrease in yield due to damage to the silicon single crystal substrate in the process, and the waste of expensive silicon single crystals due to polishing. be. Another method is to implant dopant impurities into one side of the silicon substrate using ion implantation and then stretch it.
There are drawbacks such as the need for an expensive ion implantation device and the difficulty in obtaining an impurity concentration of 1 Qlff atom/d or more.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a method that eliminates the above-mentioned drawbacks and allows impurities to be introduced into only one side of a semiconductor substrate at an arbitrary surface concentration and diffusion depth easily and with high yield. .

[Key points of the invention]

According to the present invention, a semiconductor substrate is placed on the side facing the opposite electrode of one of a pair of electrodes arranged in a vacuum container containing an atmosphere containing dopant impurities, and a voltage is applied between the two electrodes. The above object is achieved by generating a glow discharge to precipitate dopant impurities on the opposing electrode side of the semiconductor substrate, and then heating the semiconductor substrate to diffuse the impurities into the surface layer of the substrate.

[Embodiments of the invention]

FIG. 1 shows an example of a reaction apparatus for carrying out the present invention, in which a power supply 4 is connected to a power source 4 inside the reaction tank 1. The interior of the reaction tank 1 in which the upper electrode 2 and lower electrode 3 are arranged is evacuated by the vacuum exhaust system 5 through the vacuum valve 4, and the inside of the reaction tank 1 is evacuated to approximately I
After setting the vacuum level to 1G-'Torr, open the vacuum valve 4.
Pumping speed of vacuum pumping system 5 %T+f4JJ4*c1
．． 66, 1°, yah,,, is introduced from the cylinder 7, and the pressure inside the reaction tank is increased to 0.1" 10 Torr using the vacuum needle 8.
Adjust to r. Silicon substrate 1 placed on lower electrode 3
For example, 20
When heated to 0°C and a glow discharge is caused between the electrodes 2 and 3, impurities are removed from the impurity gas to the substrate lO as shown in Figure 4.
A precipitated layer 12 is formed by depositing on the . This silicon substrate 10 is placed in another electric furnace and subjected to stretching heat treatment to obtain a single-sided diffusion layer 1 having a desired surface concentration and diffusion depth.
3 is obtained as shown in FIG. Below, specific implementation conditions will be explained with reference to Examples. Example 1 FIG. 6 is a profile showing the concentration distribution of boron when a semiconductor region containing boron as a dopant impurity was formed in the silicon substrate 10 under the following conditions. 1) fr output conditions Substrate: single crystal silicon n-type, specific resistance lO~30 kΩ1
Substrate temperature: 200℃ Dopant impurity: Diborane diluted with hydrogen to 1000pp- 2 Torr pressure during glow discharge Discharge voltage: DC
400V, 560V, 700V electrode distance lII: 50 ■ Discharge time 260 minutes? ) Enlargement conditions Substrate temperature: tzso°C Atmosphere: Dry nitrogen Heat treatment time + 10 hours In Fig. 6, the X axis is the distance in the depth direction from the semiconductor substrate surface, and the Y axis is the boron concentration on a logarithmic scale, and the line 61.62
．． 63 are respectively 400 V, 560 V, and 700
This is for a discharge voltage of V. To measure the boronic concentration distribution, the surface electrical resistance is determined every 2 to 3 micrometers from the surface of the semiconductor substrate in the depth direction using the four-terminal method. The specific resistance, that is, the electrically active boron concentration was determined. This boron concentration profile is similar to the result of precipitating impurities using the conventional thermal diffusion method, followed by stretching heat treatment.0 Since the boron concentration and diffusion depth on the surface change depending on the discharge voltage, it is possible to obtain the desired The surface concentration and diffusion depth of can be easily obtained by changing the discharge conditions and stretching conditions. Alternatively, the desired surface concentration and diffusion depth can be obtained by changing the concentration of the dopant impurity gas, the pressure during glow discharge, and the discharge time. Set the board temperature to 90
When the heat treatment time was 10 minutes at 0℃, the surface concentration was 5
An electrically active single-sided P layer with a diffusion depth of 1 G" atoms/-1 1000 atoms can be formed. On the other hand, under the above deposition conditions, the discharge voltage is 560 V, and under the above stretching conditions, the substrate temperature is 1 G" atoms/-1 diffusion depth.
When the heat treatment time is 50 hours at 250°C, an electrically active single-sided P layer with a surface concentration of I x 10" atoms/-1 diffusion depth of 100 μ- can be formed. Example 2 In this example, the dopant impurity The impurity gas was changed from diborane to phosphine (Pl, s) using phosphorus as a catalyst.This formed an n-type semiconductor region.The formation conditions are shown below.l) Precipitation conditions 1 & tIL: single crystal silicon, p-type, specific resistance 10-30
kΩ1 Substrate star power; 2GG°C Doubant impurity gas: Phosphate diluted with hydrogen to 1000ρp− Pressure crab during glow discharge 1 Torr Discharge voltage: DC400V, 560V, 700V Interelectrode distance = 50 Hidden discharge time; 6G min 2) Enlargement Conditions Substrate temperature: 1000°C Atmosphere: Dry nitrogen Heat treatment time 110 hours Figure 7 shows the semiconductor 1&! under the above conditions. 2 is a profile showing the concentration distribution of phosphorus when a semiconductor region is formed using phosphorus as a dopant impurity, and the line ? Note that 1.72.73 corresponds to discharge voltages of 400V, 560V, and 700V. As in Example 1, the surface phosphorus concentration distribution and diffusion depth change depending on the discharge voltage, and by changing the deposition conditions and stretching conditions, it is possible to create a single-sided diffusion layer with arbitrary surface concentration and diffusion depth. is obtained. As shown in Example 1 and Example 2, the substrate is
30kQca n-type or p-type high resistivity silicon single crystal (impurity concentration in substrate 1011-IQ1! atoms/-)
was used, and dry nitrogen was used as the atmosphere for the stretching conditions. This is because when impurities are precipitated on one surface of the substrate and the impurity layer is formed in the substrate under the above-mentioned stretching conditions, the precipitated impurities may fly out of the substrate and wrap around the opposite surface and adhere to other surfaces. This is to facilitate confirmation of an unnecessary impurity diffusion layer formed by adhering to the surface of the substrate on which the :S base is not deposited. This undesirable impurity layer has a surface concentration of 0.00% under the conditions shown in Examples i11 and (2) above.
5~8XIO1 atom/-0 diffusion depth 0.5~1.5μ-
It is. However, the possibility of such impurities getting around or adhering to another substrate is less than when impurities are attached to one side by coating and then diffused.This is because the semiconductor a! This is thought to be because the dopant impurity elements deposited on the plate surface are bonded to the semiconductor elements, making them difficult to evaporate. Therefore, it is possible to use nitrogen containing 10 to 30% oxygen instead of dry nitrogen as the atmosphere for the stretching operation, or to perform stretching heat treatment in a high-purity oxygen atmosphere to form an oxide film on the substrate surface. The formation of an undesirable impurity layer can be easily prevented by shielding against phosphorus. However, the formation of unnecessary impurity layers can also be prevented by the method shown in the next embodiment. Example 3 As shown in FIG. 8 (1 ml), a CvD oxide film or a P! ! , after depositing the #1 coating film 21, under the conditions of Example 1 or Example 2 as shown in FIG.
An impurity layer I2 is precipitated as shown in BL, and a stretching heat treatment is performed to obtain a single-sided impurity diffusion layer 13 as shown in FIG. The amount attached to the top is 0.5~8X
Since it is 10" atoms/□II, it does not diffuse through the oxide film 21 and reach the semiconductor substrate 10. That is, an n-type silicon single crystal with a specific resistance of 20 kQcII on which a thermal oxide film 21 with a thickness of 1 μm is deposited. Boron was precipitated in the same manner as in Example 1 using the substrate IO, and the temperature was 50°C at 1250°C.
After time-enlargement heat treatment, the oxide film was removed and the electrical resistance of the substrate surface was measured using the four-terminal method. No change was observed between the single crystals of the material, and unnecessary impurities were found due to the jumping out of precipitated impurities. It was shown that no diffusion layer was formed.

【Effect of the invention】

In the present invention, by placing a semiconductor substrate on an electrode and generating a glow discharge between it and a counter electrode in an atmosphere containing a desired dopant impurity, impurities are precipitated on only one side 10 of the substrate, and the impurity is diffused on one side by heating. layers can be formed. Moreover, desired surface concentration and diffusion depth can be easily obtained by changing the voltage, current and stretching conditions during glow discharge. This method can form a semiconductor region containing dopant impurities on one side of a germalam compound semiconductor substrate in addition to silicon. According to the present invention, the conventional thermal diffusion method or ion implantation method can achieve ultra-thin, high-concentration single-sided diffusion with an open diffusion depth of 500 to 1500 atoms and a surface concentration of 10 to 1 Q0 atoms/clI. layer to a deep single-sided diffusion layer of 100 to 150μ■.
An impurity diffusion layer with arbitrary surface concentration and diffusion depth can be easily formed. This does not require expensive ion implantation equipment or a diffusion furnace dedicated to precipitation, and there is no need to polish and remove unnecessary diffusion layers, so semiconductor materials can be used efficiently and will be used in future ultra-LSI devices and tertiary devices. The contribution of elements to the semiconductor industry, including AM, is extremely large.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of the configuration of an example of a reaction device used in the implementation of the present invention, FIGS. 2 and 3 are cross-sectional views of a semiconductor substrate showing two examples of conventional methods, and FIG. FIG. 5 is a cross-sectional view showing the state after impurity precipitation in one example; FIG. 5 is a cross-sectional view showing the substrate after stretching; FIG. The figure is a phosphorus concentration distribution wA diagram obtained in another example, and FIG. 8 is a substrate cross-sectional view sequentially showing the steps of still another example. 1: Reaction tank, 2: Upper 11tffl, 3: Lower electrode, 4, TL, 5: Vacuum exhaust system, 72 impurity gas cylinder, LOI silicon substrate, 11: Heater, 12: Precipitated impurity layer, 13: Diffusion layer. Sai1zuzaizZzuzai4(2)

Claims (1)

[Claims] 1) A semiconductor substrate is placed on the side facing the counter electrode of one of a pair of electrodes placed in a vacuum container containing an atmosphere containing dopant impurities, and a voltage is applied between both electrodes to generate a glow discharge. . A method of introducing impurities into one side of a semiconductor substrate, which comprises depositing dopant impurities on the opposite electrode side of the semiconductor substrate, and then heating the semiconductor substrate to diffuse the impurities into the surface of the substrate.