JPS61135267A - Loop back test system - Google Patents

Abstract

PURPOSE:To attain a loop back test of a digital subscriber circuit with an electronic exchange by having collation between a transmitted random pattern and another random pattern received via a network. CONSTITUTION:A central processing unit 1 delivers a loop back command to a line processor 4' when a loop back test is given to a digital subscriber circuit 4. Then the processor 4' sets its own loop back circuit 9 under a return connection state. The unit 1 drives a signal reception/distribution device 2 and controls a network 5 to connect the output of a random pattern transmission circuit and the input of a random pattern reception circuit to a network inter face 11 of the circuit 4 via the network 5. When the unit 1 delivers a loop back test command, a random pattern is returned by the circuit 9 via the inter face 11.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a return test function of an electronic exchange.

In conventional electronic exchanges having digital subscriber circuits, there has been a strong demand for the development of a method for performing loopback tests on digital subscriber circuits via a network.

[Conventional technology]

Recently, in addition to conventional telephones, digital telephones have come to be connected to electronic exchanges. For this reason, recent electronic exchanges are equipped with digital subscriber circuits for connecting to digital telephones in addition to subscriber circuits (analog subscriber circuits) for connecting to conventional telephones. .

FIG. 2 shows an example of the system configuration of an electronic exchange having analog subscriber circuits and digital subscriber circuits.

In the figure, 1 is a central processing unit, 2 is a signal reception distribution device, 3 is an analog subscriber circuit, 3゛ is a line processor with built-in analog converter circuit 3, 4 is a digital subscriber circuit, and 4゛ is a digital subscriber circuit. 4 built-in line processors,
5 is a network, 6 is an analog telephone, and 7 is a digital telephone. The same symbols represent the same objects throughout all the figures below.

As shown in FIG. 2, both the analog subscriber circuit 3 and the digital subscriber circuit 4 have a device configuration that includes a built-in line processor.

FIG. 3 shows an example of a configuration diagram of the digital subscriber circuit 4. As shown in FIG.

In the figure, 8 is a transmission termination section, 9 is a return circuit, 10 is a line termination section, 11 is a network interface, and 12 is an interface.

The network interface 11 is a circuit that connects the digital subscriber circuit 4 and the network 5, and the interface 12 is a circuit that connects the line processor 4'' and the central processing unit 1.
This is a circuit that has an interface.

The line termination section 10 connects the signal from the network 5 to the transmission path.
The signal from the transmission terminal 8 is transmitted to the network 5.

The line processor 4' also transmits and receives call control signals in accordance with instructions from the central processing unit 1.

The transmission termination section 8 constitutes an interface with the digital telephone 7.

The loop back circuit 9 operates under the control of the line processor 4, and transfers the signal from the line termination section 10 to the other line termination section lO.
This is a switching circuit that loops back to

The digital subscriber circuit 4 is composed of the above-mentioned devices 8 to 12 and the line processor 4°, and functions as a digital subscriber circuit.

When testing such a digital subscriber circuit 4, a specific pattern is input to the line termination section 10 by the line processor 4', looped back by the return circuit 9, and then passed through the line termination section 10 again to the network. Interface 11
The input data is input to the network interface 11, and the transmission pattern is compared with the reception pattern to determine whether the transmission pattern is acceptable or not.

However, conventionally, a loopback test via the network 5 has not been performed.

[Problem that the invention seeks to solve]

The object of the present invention is to eliminate the drawbacks of the above-mentioned conventional methods and to provide a return test method via a network of electronic exchanges.

[Means for solving problems]

A means for solving the problem is to use a line processor in an electronic exchange having a digital subscriber circuit, a circuit for transmitting the random pattern created by the line processor, and a circuit for transmitting the random pattern transmitted from the network of the electronic exchange. It includes a receiving circuit, and an interface between the central processing unit of the electronic exchange and the line processor, and based on instructions from the central processing unit, the line processor drives the sending circuit to connect the digital subscriber circuit under test. transmitting an acid random pattern to the digital subscriber circuit under test via the network, and driving the sending circuit to receive the random pattern, which is looped back within the digital subscriber circuit under test and sent out from the digital subscriber circuit under test, via the network. death,
This is achieved by comparing the transmitted random pattern with the received random pattern and performing a return test.

[Effect]

According to the present invention, based on a command from the central processing unit, the NW Silam pattern sending/receiving circuit is connected to the digital subscriber circuit to be tested via the network, and a random pattern is sent out, and the random pattern is returned within the digital subscriber circuit. Since the random pattern is received again via the network and a return test is performed by comparing the sent random pattern and the received random pattern, the effect is that a complete functional test can be performed.

〔Example〕

FIG. 1 is a diagram showing an embodiment of a circuit configuration that enables a foldback test according to the present invention.

In the figure, 51 is a line processor, 52 is an interface, 53 is a random pattern sending circuit, 54 is a receiving circuit,
Reference numeral 55 denotes a NW Shiram pattern sending/receiving circuit according to the present invention.

The present invention will be described in detail below with reference to the drawings.

The interface 52 constitutes an interface between the central processing unit 1 and the line processor 51, the random pattern sending circuit 53 is a circuit for sending arbitrary data output from the line processor 51 to the network 5, and the receiving circuit 54 is a circuit for sending arbitrary data output from the line processor 51 to the network 5. This is a circuit that receives data sent from 5. The line processor 51 is the receiving circuit 5
4 has a function of reading data received from the network 5 and confirming the normality of the digital subscriber circuit.

When conducting a loopback test on a digital subscriber circuit 4, according to the invention, the central processing unit 1 of the electronic exchange first performs a loopback test on the line processor 4 via the interface 12 of the digital subscriber circuit 4 to be tested. Issue a command. With this command, the line processor 4' puts its loopback circuit 9 into a loopback connection state.

Next, the central processing unit 1 drives the signal reception distribution device 2 to control the network 5, and the random pattern transmission circuit 53
The output and receiver circuits 54 are each connected via the network 5 to the network interface 11 of the digital subscriber circuit 4 to be tested.

Further, the central processing unit 1 issues a loopback test command to the NW Silum pattern sending/receiving circuit 55.

This return test command is transmitted to the line processor 51 via the interface 52. line processor 5
1 creates an arbitrary random pattern upon receiving this return test command and sends it to the random pattern sending circuit 53.

The random pattern sending circuit 53 converts this random pattern into a serial signal and sends it via the network 5 to the network interface 11 of the digital subscriber circuit 4 to be tested. In the digital subscriber circuit 4, the random pattern passes through the line termination 10, is looped back by the loopback circuit 9, passes through the line termination 10 again, and enters the network interface 11. This signal passes through the network 5 and enters the receiving circuit 54 of the NW Shiram pattern sending/receiving circuit 55. The line processor 51 compares the received signal of the receiving circuit 54 with the previously sent random pattern, and if they match, the digital subscriber circuit 4
is normal, and if they do not match, it is determined to be abnormal, and this fact is reported to the central processing unit 1.

The above operations are performed sequentially for each digital subscriber circuit.

〔Effect of the invention〕

As described above in detail, the present invention has the great effect of making it possible to perform loopback tests on digital subscriber circuits by adding an extremely simple circuit.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of a circuit configuration that enables a foldback test according to the present invention. FIG. 2 shows an example of the system configuration of an electronic exchange having analog subscriber circuits and digital subscriber circuits. FIG. 3 shows an example of a configuration diagram of the digital subscriber circuit 4. As shown in FIG. In the figure, 1 is a central processing unit, 2 is a signal reception distribution device, 3 is an analog subscriber circuit, 3' is a line processor in the analog subscriber circuit 3, 4 is a digital subscriber circuit, 4°
5 is a line processor with built-in digital subscriber circuit 4;
is a network, 6 is an analog telephone, 7 is a digital telephone, 8 is a transmission termination section, 9 is a return circuit, 10 is a line termination section, 11 is a network interface, 1
2 is an interface, 51 is a line processor, 52 is an interface, 53 is a random pattern sending circuit, 5
4 is a receiving circuit, and 55 is a NW Shiram pattern sending/receiving circuit according to the present invention.

Claims (1)

[Claims] In an electronic exchange having a digital subscriber circuit, a line processor, a sending circuit for a random pattern created by the line processor, a receiving circuit for the random pattern sent from the network of the electronic exchange, and a central processing of the electronic exchange An interface between the device and the line processor is provided, and based on a command from the central processing unit, the line processor drives the sending circuit to send the random pattern to the digital subscriber circuit under test via the network. , the random pattern that is looped back within the digital subscriber circuit under test and sent out from the digital subscriber circuit under test is received via the network by driving the sending circuit, and is received with the sent random pattern. A loop test method characterized by performing a loop test by comparing the random patterns.