JPS61132089A - Speed controller for motor - Google Patents

Abstract

PURPOSE:To obtain high speed responsiveness at accelerating/decelerating time or high speed time by providing a compensator to detect the speed or to calculate speed control data by the delay of sampling process or calculating. CONSTITUTION:A compensator 7 inputs speed control data of the output of a speed control calculator 6 to compensator the calculation delay by the sampling process of the calculator 6. The compensator 7 has a bypass switch 8 for releasing the compensating process. A gate circuit 9 obtains the phase control data of a power converter from the speed control data fed through the compensator 7 or the switch 8 at every phase switch element, and distributes to output the data. A speed comparator 10 releases the compensating operation by switching bypass switches 3, 8 to ON state when the detected value of a speed detector 1 becomes the set value or lower of a switching speed setter 11.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a speed control device for an electric motor, and more particularly to a speed control device using a digital processing method.

In recent technology, feedback control that compares the detected motor speed value with a set value is often used for motor speed control, and speed control devices using digital processing are used for high-precision speed control. . In this digital processing method, a digital speed detector such as a pulse pickup is used to detect the speed of the motor, and this digital speed detection value is taken into a digital processing device such as a microcomputer and converted into a speed setting value. Further, the speed is subjected to speed calculation processing and extracted as motor speed control data.

For example, output pulses at intervals proportional to the rotational speed of the motor to a pulse pickup, use these pulse intervals as the clock counting period of a counter, and input the count value of the counter as a speed detection value into a digital processing device. Now, find the deviation between the speed ejection value and the speed setting value,
Speed control data is obtained by calculating the proportional integral (P) of this deviation, which is equivalent to an analog speed control amplifier.The speed control data is also subjected to the necessary arithmetic processing according to the various control methods of the motor, and is ultimately used to control the motor. Inverter as power source,
It is extracted as a side leg signal of a power converter such as a forward converter.

Problems to be Solved by the Invention Digital processing type speed control devices facilitate high-precision control compared to analog processing type ones, but speed detection and PI calculation involve sampling processing, resulting in a delay in sampling time. ◎For example, thyristor Leonard force type DC machine speed control that provides high-speed response, induction motor pectol control,
Particularly when accelerating and decelerating in a high-speed range, it may not be possible to obtain the set acceleration/deceleration and torque due to the delay in sampling time.

Specifically, in the vector control of the induction machine, K fill ml is performed so that the torque and the base station wave number are proportional, but when the induction machine accelerates at the rated torque, the rated decoy 1 is reached in 0.2 seconds.
Assuming that the number of rotations is reached, 1. If the sampling time for speed detection is 10 m5 ec, the speed that increases within the sampling time is as high as 5 (=0.0110.28100), and during this sampling, the delay of 1 hour makes appropriate vector control difficult.

Means and Function for Solving the Problems The present invention provides a speed control device for a motor using a digital processing method, in which a compensation circuit is provided for compensating for a delay in sampling time or the like in at least one of the speed detection value or the speed control data. The compensation circuit takes the input that becomes the speed detection value or speed control data, multiplies the rate of change of this input by the delay compensation time,
The system is configured to add the calculated values, thereby achieving a speed control operation that compensates for speed control delays due to sampling, processing, etc.

Practical Example FIG. 1 is a block diagram showing one practical example of the present invention. The speed detection circuit 1 is the same as a digital speed detector comprising a conventional pulse pickup and a counter, preferably as disclosed in Japanese Patent Application Laid-Open No. 59-38661.
The number of pulse periods determined according to the magnitude of the output pulse interval of the pulse pickup is taken as the sampling time, and the sampling time is calculated from the number of circular clock pulses to the speed detection value of the motor over the entire variable speed range.゛The speed detector is made to have almost constant detection accuracy and response time.

The compensation circuit 2 inputs the speed detection value that is the output of the speed detection circuit 1, and compensates for the speed detection delay due to the sampling process of the speed detection circuit 1.The compensation circuit 2 has a bypass for canceling the compensation process. A switch 3 is provided. The adder 4 calculates the difference between the set value of the motor speed setter 5 and the speed detected value passed through the compensation circuit 2 or the bypass switch 3t. The speed control calculation unit 6 performs proportional integral calculation on the output of the adder 4 through sampling processing to obtain speed opening/opening data. The compensation circuit 7 inputs the speed control data which is the output of the speed control calculation section 6, and compensates for the calculation delay due to the sampling process of the speed control calculation section 6. This compensation circuit 7 is provided with a bypass switch 8 for canceling the compensation process. The gate circuit 9 obtains phase control data for a power converter (not shown) for each phase switch element from the speed control data passed through the compensation circuit 7 or the bypass switch 8, and distributes and outputs the obtained data. The speed ratio shark section 10 cancels the compensation operation by switching the bypass switches 3 and 811 to the ON state when the detected value of the speed ejection circuit 1 reaches the setting FIT of the switching speed setter 11.

This switching speed setting device 11 is set to the base speed of the DC motor, for example, in a case where the control +11 device operates on the speed side of a DC motor using a thyristor Leonard system.

In such a configuration, the speed detection value of the speed detection circuit 1 and the speed control data of the speed control calculation unit 6 are changed when the motor is operated in a high speed region higher than the base speed, and the bypass switch 3.8 is turned off. The compensation circuits 2 and 7 compensate for the delay caused by the sampling process, thereby improving the responsiveness on the speed side.

The delay compensation added by such compensation circuits 2 and 7t will be explained with reference to FIG. The input of the speed detection circuit 1 (or the input of the speed control calculation unit 6) has the characteristic fi(t) shown in FIG.
When accelerated as shown by
Calculate sequentially with n+1. The output f o (t) obtained at each sampling timing 'rn-t l Tn l Til+1 is detected with a sampling period Ts and a calculation delay. That is, the output fO(t)
The average value of is detected with a delay time T from the input f1(t) as shown in the characteristic.

In order to compensate for this delay time Tt, the input fl(t) is advanced by the delay compensation time to an output fO(t),
That is, if the total number of Kupsis operators is expressed as follows, the p compensation circuit 2 or 7 performs an approximate compensation wave s''.

oc, 0” o(t) ) = e 5T-C(f 1
e)) =... (1) In formula (1), c and CO indicate Lapx transformation, fo(t) is the output compensated by compensation circuit 2 or 7, and fl(1) is the compensation circuit There are 7 inputs in 2 prongs. If we expand θ5Tt-Chi2 in equation (1) and approximate it up to the first order of time T, we get 1+8T in eST...
......(2), and the equation (1) becomes the following equation when expressed in real time.

That is, to compensate for the sampling delay, the current input, ?
1(t) and its rate of change d/dt(fi(t)), the compensation time Tt-51! can be calculated, and the nine values are added.

If this equation 13) is expressed as a sampling system arithmetic equation, it becomes the following equation.

f i (Tn-1) l...” -+41
FIG. 3 shows an actual example of the compensation circuit 2 or 7, and shows the above (41)
This is a case where the configuration is based on a formula. In FIG. 3, the sampling circuit 211 and the latch circuit 212 generate the input f1 (Tl-
t) t- memorized, find the difference between this [fi (Tn-t) and the current input f1 (Tn) in the adder 215, and multiply it by the coefficient T/Ta in the multiplier 21-. The rate of change is multiplied by the compensation time Tt to find the current input fi(Tn)t in the adder 215 to obtain the compensated output fo(Tn)t.

Note that the delay compensation time is set in consideration of not only the delay time due to sampling but also the delay due to calculation by the speed detection circuit 1 or the speed control calculation unit 6.

Further, although the ``consolidated example'' is a case of a thyristor Leonard, it is of course applicable to various continuous control systems such as pulse width modulation control and vector control of the R4 machine. In addition, the cancellation of the compensation processing of the compensation circuits 2 and 7 by the switching speed setting device L1 and the comparator 1O is not limited to switching between high and low speeds of the motor, but is also configured to switch according to the magnitude of acceleration/deceleration, etc., due to the delay due to sampling processing. It may also be possible to perform full compensation only in control states where this is a problem.

In general, the compensation circuit is not limited to individually compensating the delay in each sampling processing circuit, but may be provided at any one of the compensation ports i&2 or 7 to ensure responsiveness.

Effects of the Invention If the present invention is applied, in a speed control #J device for an electric motor using a digital processing method, a compensation circuit for compensating for delays caused by sampling processing and calculation in speed detection and calculation of speed control data can be provided. It can be applied to speed control such as thyristor Leonard control and vector control of insulators to obtain high-speed response during acceleration/deceleration and high speed, and is also useful for canceling compensation processing during steady state. This has the effect of providing a highly accurate settling control 1111 against disturbances.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing one practical example of the present invention, Fig. 2 is a characteristic diagram for explaining the operation of the compensation circuit in Fig. 1, and Fig. 3 is a circuit diagram of the compensation circuit for the first factor. It is. l... Speed detection circuit, 2, 7... Compensation circuit, 3, 8
... Bypass switch, 4... Adder, 5... Speed setting device, 6... Speed control calculation section, 9... Gate circuit, 10... Speed comparison section, 11... 211 River sampling circuit, 212... 2-bit circuit, 213... Adder, 2111... Multiplier, 215
...Adder.

Claims (2)

[Claims] (1) In an electric motor speed control device using a digital processing method, the speed of the electric motor is detected as a digital quantity through sampling processing, and the speed control data of the electric motor is obtained through sampling processing from the deviation between the detected speed value and the speed setting value. A compensation circuit is provided for compensating for a sampling time delay in at least one of the speed detection value or speed control data, and this compensation circuit applies a delay compensation time to the input that becomes the speed detection value or speed control data and the rate of change of this input. A speed control device for an electric motor, characterized in that it is configured to add the multiplied value. (2) The motor speed control device according to claim 1, wherein the compensation circuit includes means for canceling the compensation process when the acceleration/deceleration or absolute speed of the motor is low.