JPS61131525A - Molecular beam epitaxy - Google Patents

Abstract

PURPOSE:To depress the generation of lattice defects in the neighborhood of the side wall of an insulation film by performing molecular beam epitaxy after forming a well the bottom of which is the surface of the semiconductor and also the upper end portion of which is made of insulating film and constricted to shape an eaves. CONSTITUTION:A silicon oxide film 2 and a silicon nitride film 3 are grown successively on the surface of a silicon wafer substrate 1 and then part of these films 2, 3 are selectively removed to form a well reaching to the substrate. By etching the silicon oxide film 2 which composes the side wall of the wall, a well having a neck constricted by silicon nitride film 3 is formed. An epitaxial layer 4 and a polycrystalline silicon layer 5 are formed in the well and on the nitride film 3 respectively. By oxidizing the wafer thus treated in the steam atmosphere, the open space between the epitaxial region 4 and the oxide film 2 is filled up. This method can reduce the generation of lattice defects down to less than 0.1 per mum of the side wall along the direction parallel to the substrate plane.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to selective epitaxial growth of semiconductors using molecular beam epitaxial method.

(Prior art and its problems) Silicon epitaxial layers are used for bipolar ICs (Integrated ICs) because they provide high-quality silicon layers.
dC1rcuit) and, in recent years, MO8IC (Me
tal-Oxide-8emiconductor I
C) is also used. Due to the demand for lower power consumption and higher frequency of ICs, the need for element miniaturization is increasing. In order to satisfy the needs of such bipolar IC%MO8IC, it is effective to miniaturize the element isolation region.
Various methods are currently being studied, and one of the most promising methods is selective epitaxial growth.

An example of the selective epitaxial growth method is shown in FIG.

One to two silicon oxide films 14 are formed on the silicon wafer 13.
A substrate formed to a thickness of .mu.m and with silicon partially exposed by reactive ion etching is used as a substrate for epitaxial growth.

In some cases, the side wall portions are coated with a silicon nitride film 15 or the like. On such a substrate, S i Ht is used as a raw material gas.
When epitaxial growth is performed using C1t and HCA, no silicon is deposited on the silicon oxide film, and an epitaxial layer can be formed only in the region where silicon was exposed. 'However, the selective epitaxial film has lattice defects such as stacking faults and facets near the sidewalls.
7 exists. As shown in FIG. 3, most of the lattice defects occur at the intersection of the sidewall and the substrate surface, and reach the surface of the epitaxial layer. A p-n junction exists in the depth direction in both MOS devices and bipolar devices, but the p-n junction exists in the depth direction.
The more lattice defects that cross the -n junction, the worse the junction characteristics will be, so it is desirable to have fewer lattice defects. On the other hand, if a facet exists, when a MOS device is made, the electric field will concentrate at the tip of the V-shaped part, lowering the gate withstand voltage, and the facet part will act as a transistor with a different threshold value. This causes subthreshold characteristics to be affected. Conventional methods have been unable to suppress both lattice defects and facets.

In recent years, with the aim of applying to high-speed devices, silicon thin film growth technology has been developed at lower temperatures than conventional silicon thin film growth techniques.
Therefore, active research and development is being conducted on silicon molecular beam growth technology in high vacuum, which is characterized by extremely little autodoping and the ability to realize a steep impurity profile. For example, Abride Physics Letters 1982, Volume 41, Page 752 (Appl.
Phys, Lett, 41! 8) In a report by GC Bean (J.C. Beari) published in 752), as shown in Fig. 4, a silicon substrate 1
A silicon oxide film 19 is formed on 8 to a thickness of 2 to 3 μm, the silicon is partially exposed by reactive ion etching (FIG. 4(a)), and then the silicon oxide film 19 is formed by silicon molecular beam growth. Polycrystalline silicon layer 2 on top
0. An epitaxial layer 21 is grown to a thickness of 1 μm on the exposed portion of the silicon substrate. (FIG. 4(b)) Next, the silicon oxide film 19 and the polycrystalline silicon layer 20 thereon are removed by a lift-off method using hydrofluoric acid. (Figure 4 (C
)) By using the above method, an epitaxial growth region with steep sidewalls and an extremely flat top surface was obtained, indicating that there are no facets in the silicon molecular beam growth method. .

However, in this case, since the polycrystalline silicon is removed using the lift-off method, the oxide film is also peeled off at the same time, so an insulating film for the female part of the element must be formed separately later. In addition, in such an insulating film structure, ('V
As in the case of the p-screw epitaxial growth method using the D method, there is a drawback that a large number of stacking faults occur near the side walls of the insulating film.

(Objective of the Invention) An object of the present invention is to eliminate such conventional drawbacks and realize a structure in which an epitaxial region is buried in an insulating film pattern in silicon molecular beam growth method, and also to realize a structure in which an epitaxial region is buried in an insulating film pattern. The object of the present invention is to provide a method for suppressing the occurrence of lattice defects near the side walls of a film.

(Structure of the Invention) According to the present invention, in a single crystal semiconductor substrate whose surface is partially covered with an insulating film, an eaves-shaped insulating film is formed from the upper part of the wall of the insulating film f111I toward the region where the semiconductor surface is exposed. A molecular beam epitaxial growth method characterized by performing molecular beam epitaxial growth after creating an exposed structure can be realized.

(Example) A detailed explanation will be given below using the drawings. FIG. 1 shows a schematic process diagram for explaining the first embodiment of the present invention. In the figure, 1 is a single crystal (100) silicon substrate, 2 is a silicon oxide film, 3 is a silicon nitride film, and 4 is a silicon oxide film. 5 indicates an epitaxial region, and 5 indicates a polycrystalline layer region. First, the surface of the silicon wafer 1 is coated with a thickness of 1 to 2 μm using a method such as thermal oxidation.
m silicon oxide film 2 is formed, a silicon nitride film 3 is formed thereon by CVD method, etc., and then the @2.3
A portion of it is selectively removed by conventional reactive ion etching. (FIG. 1(a)) Next, the silicon oxide film on the side wall of the opening is etched using buffered hydrofluoric acid or the like. At this time, the silicon nitride film 3 is not affected, and a structure can be created in which the silicon nitride film 3 protrudes toward the opening region in the shape of an eave. (Figure 1 (b)) The length of the eaves at this time is 200~5
ooo A:' is preferred.

When the length of the eaves is 500 or more, it becomes difficult to flatten the surface by thermal oxidation as shown later. In addition, silicon molecular beams do not always enter the substrate perfectly perpendicularly, so if the length of the eaves becomes less than 200 mm, there is a greater possibility that the incident silicon atoms will reach the sidewall oxide film position and cause lattice defects. . In this example, the length of the eaves was set to 20001 mm.

Next, using the silicon molecular beam growth method, the growth temperature was 650°C.
, an epitaxial layer 4 is formed in the opening and a polycrystalline silicon layer 5 is formed on the nitride film 3 at a growth rate of 10 i/s. (1st
Figure (C)) At this time, the epitaxial layer 4 is formed by the oxide film 2.
Do not come into contact with. Next, the polycrystalline layer 5 is removed by dash etching, and the nitride film 3 is removed by hot phosphoric acid or the like. (FIG. 1(d)) At this time, a gap remains between the epitaxial region 4 and the oxide film 2. By oxidizing this wafer at 900° C. for about 50 minutes in a steam atmosphere, the space between epitaxial region 4 and oxide film 2 can be filled. (FIG. 1(e)) By using such a method, it is possible to suppress the number of lattice defects to 0.1 or less on the side wall (up to 1 μm in the direction parallel to the plate surface). On the other hand, when such an eave-like structure is not formed, the defect density increases to 8 to 10 defects per 1 μm of the side wall length, and the seed crystallinity, which affects the junction breakdown voltage, clearly deteriorates. Moreover, since this method uses silicon molecular beam growth, it has the advantage that facets do not occur as in the case of the CVD method.

In this example, since the (100) plane was used as the substrate, the polycrystalline layer 6 on the insulating film 3 was removed by Dash etching, but when the (111) plane was used as the substrate, etching with hydrazine was performed. By this, the etching selectivity of the polycrystalline layer and the epitaxial layer can be further improved.

FIG. 2 shows a schematic process diagram for explaining the second embodiment of the present invention. In the figure, 6 is a single crystal (100) silicon substrate, 7.9 is a silicon oxide film, and 8.10 is a silicon oxide film. In the silicon nitride film, 12 is an epitaxial region, and 11 is a polycrystalline layer region.

First, a silicon oxide film 7 with a thickness of 1 μm is formed on the surface of a silicon wafer by a method such as thermal oxidation, and a silicon nitride film 8 is formed thereon with a thickness of 3 to 4 μm by a method such as a CVD method. A silicon oxide film 9 is formed, and a silicon nitride film 10 is further formed by CVD or the like, and then parts of the films 7, 8, 9, and 10 are selectively removed by ordinary reactive ion etching. (Second
Figure (a)) Next, the silicon oxide on the side wall of the opening is etched using buffered hydrofluoric acid or the like. At this time, the silicon nitride films 8 and 10 are not affected, and the silicon nitride films 8 and 10 are not affected.
It is possible to create a structure in which 10 protrudes like a canopy toward the opening area. (FIG. 2(C)) In this example, the length of the eaves was 2000 A'. Next, using the silicon molecular beam growth method, the growth temperature was 650°C and the growth rate was 1 or/min.
s, an epitaxial layer 12 is formed in the opening, and a polycrystalline silicon layer 11 is formed on the silicon nitride film 10. (Second i
(FIG. (c)) At this time, the epitaxial layer 7d12 does not contact the silicon oxide film 7. In this example, the thickness of the epitaxial layer was 1 μm. Next, polycrystalline silicon film 11 and silicon nitride film 10 are removed by lifting off acid-ratio silicon film 9 by etching with buffered hydrofluoric acid. At this time, as in the first embodiment, the epitaxial layer 12 is in contact with the eaves of the silicon nitride film 8, so the buffered hydrofluoric acid does not enter the gap between the epitaxial layer 12 and the silicon oxide film 7. Silicon oxide film 7 is not affected. Next, the silicon nitride film 8 is removed using hot phosphoric acid or the like. (Figure 2(d))
When this wafer is oxidized at 900° C. for about 50 minutes in a steam atmosphere, the space between the epitaxial region 12 and the silicon oxide film 7 can be filled. (Figure 2(e)
) By using such a method, the epitaxial layer 1
The polycrystalline film 11 can be removed without adversely affecting the structure.

(Effects of the Invention) By using the present invention, a structure in which an epitaxial region is buried in an insulating film pattern can be realized in silicon molecular beam growth method, and lattice defects occur near the side walls of the insulating film in the epitaxial region. was able to suppress it.

[Brief explanation of the drawing]

Figure 1 (,) to (e) and Figure 2 (,) to (e) are
FIG. 3 is a schematic cross-sectional view for explaining an embodiment of the present invention, and FIG. 3 is a schematic cross-sectional view for explaining a conventionally used selective epitaxial method. FIGS. 4(a) to 4(c) show schematic cross-sectional views for explaining pattern epitaxial growth using the silicon molecular beam growth method reported to date. In the figure, 1... silicon substrate, 2... silicon oxide film. 5.Silicon 9ide film, 4.Epitaxial layer,
5... Polycrystalline layer, 6... Silicon substrate,
7...Silicon oxide film, 8...Silicon nitride film,
9...Silicon oxide film, 10...Silicon nitride film,
11... Polycrystalline silicon film, 12... Epitaxial film, 13... Silicon substrate, 14... Silicon oxide film, 1 15... Silicon nitride film, 16... Epitaxial film, 1
17...Facet, 18...Silicon substrate, 19.
・Silicon oxide film, 20... Polycrystalline film, O 1 Figure;? Figure 2. 71-3 Figure

Claims (1)

[Claims] A structure in which a first insulating film pattern and a second insulating film pattern having an end protruding in the shape of a canopy are laminated at least one layer is formed on the surface of the single crystal semiconductor substrate, and then a semiconductor layer is formed on the surface of the substrate. A molecular beam epitaxial growth method characterized by growing a film by molecular beam epitaxial growth.