JPS61131453A - Etching method - Google Patents

Abstract

PURPOSE:To enhance yield and to improve product reliability by a method wherein a ring is positioned in the neighborhood of and above a wafer in a reactive ion etching (RIE) process. CONSTITUTION:A ring member 23 is located fixed at a position separated from a wafer support 25 by a ring support 24. In this type of RIE, active Cl ions almost uniformly strike the entire surface of a wafer due to the ring member 23, with the striking efficiency affected little due to displacement if alight of the wafer. Gas is introduced into an etching chamber 21 via an inlet and a plurality of jet nozzles 27a. A good result is attained when the jet nozzles 27a are so arranged as to concentrate at a position above the central portion of the wafer.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an etching method, more specifically, a reactive ion etching method.
! tching+1 or less? (referred to as IE).

[Conventional technology]

In the manufacturing process of semiconductor devices, wiring is often formed by depositing a metal thin film on an insulating wafer and patterning it. For example, when forming aluminum (^i) wiring, a metal thin film is deposited on the surface of a silicon wafer. oxidation i
ll (5i02) film is formed, a ^l thin film is applied on top of it, and then a resist film is created by coating the A4 thin film with Regiroto, and the resist pattern obtained by patterning this resist film is used as a mask. ^1 Etch the thin film to create Ajl wiring in the desired pattern.

Conventionally, such etching of Ajl@ff4 was performed by wet etching using an etching solution.
Recently Aj! R1 to meet the demand for finer patterns
1! is used. The apparatus for the old E is shown in cross section in FIG.
6 MHz radio frequency (RF) power supply 65 (power is 100
W - I KW), and the counter electrode 64 is grounded. The processing chamber is evacuated from an exhaust port 67 connected to an exhaust system (not shown) and maintained at a desired degree of vacuum, while a gas inlet 66 is used to evacuate (α2+) in the case of Al etching.
BC1!3) Mixed gas is introduced.

Plasma 6 schematically shown when RF power #I65 is turned on
8 is generated, and this plasma decomposes the above-mentioned mixed gas, activating α, which etches A1.

In the technical field of RIB described above, research is also being conducted on the arrangement of a sample, such as a wafer, on an electrode. The sputter etching method disclosed in Japanese Unexamined Patent Publication No. 52-123173 is described in the following: "In a method of sputter etching a flat plate-shaped member, etching is performed along the periphery of the flat plate-shaped member relative to the surface of the plate-shaped member to be etched. This method involves arranging protruding members and etching a flat plate-like member.

JP-A-52-137266 states, ``When sputter etching a substrate to be etched, an auxiliary substrate whose portion to be etched is made of the same material as the substrate is placed adjacent to the substrate; A sputter etching method for etching the substrate at a substantially uniform etching rate is disclosed.

Currently, an arrangement as shown in the sectional view of FIG. 5 is often used. In addition, in the same figure, 51 is an electrode;
2 is a wafer support, 53 is a wafer, and 54 is a ring. Generally, the height i of the ring 54 is 30 to 40 wu+, and the distance ΔT between the ring 54 and the outer edge of the wafer is 2.5 to 1.
It is kept at 5a+m.

An arrangement similar to the above is disclosed in Japanese Patent Application Laid-Open No. 53-47664, but the invention of the same publication is "for distributing electric current and chemically active species within the region between the electrodes".
This is related to "distributed impedance such as a dielectric member placed between electrodes."

[Problem that the invention seeks to solve]

When we investigated the relationship between the wafer position and etching rate, we obtained the results shown by the line in Figure 3. In the figure, the horizontal axis is the position of the wafer, the vertical axis is the etching rate, and 0 on the horizontal axis indicates the center of the wafer.The actual measurement results are shown by curve A, and when no ring is placed on a wafer with a diameter of 150 mm. The etching rate is large in the periphery of the wafer and is not uniform over the entire surface of the wafer. However, when the ring shown in FIG. 5 is used, the etching rate is almost uniform as shown by line B. However, the wafer is 5+s to the left as seen in Figure S.
If there is a deviation from the ring, there is a problem that the etching rate becomes extremely small at a portion approximately 5 mm away from the ring, as shown by the 11th image in FIG. 3 and the curve B'' in FIG. 4.

Furthermore, the ring and the wafer support are integrally formed, which has the advantage of generating less dust, but it is difficult to take the wafer in and out. Recently, there has been a trend toward automation in processing wafers, so it is extremely difficult to automatically position wafers correctly using conventional methods.

[Means for solving problems]

The present invention provides an etching method that solves the above problems, and the sixth means is to perform reactive ion etching in which a ring-shaped member is placed around the wafer, and the wafer is placed on the ring-shaped member. This is done by an etching method characterized in that the etching is performed while the wafer is placed above and away from the wafer support base.

[Operation] The advantage of the method shown in FIG. 5 is that the collisions of activated α are approximately averaged at each point on the wafer. In other words, whether it is the center or the periphery of the wafer, the α that collides with the wafer is only from the upper part, so
In a wafer correctly placed in a ring as shown in FIG. 5, the etching rate is averaged over the entire surface of the wafer.

However, if the position of the wafer is shifted, the flying of the wafer is hindered, resulting in an imbalance in the etching rate. However, in the method of the present invention, since the ring is placed away from the wafer support and the area around the wafer is open, even if there is a misalignment of the wafer, α will collide on average over the entire wafer surface. However, a uniform etching rate can be obtained.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an example of the basic arrangement of a wafer support, a wafer, and a ring when carrying out the method of the present invention. In the figure, 1 is a wafer support, 2 is a wafer, 3 is a ring, and 4 is an electrode. show. As can be understood from the figure, in the method of the present invention, the ring 3 is moved from the wafer support table on which the wafer is placed by a distance indicated by d in the figure (d-3 to d-1 in the illustrated example).
5am) away (or floating song). In the illustrated example, the distance ΔT between the inner wall of the ring and the outer circumference of the wafer
is in the range Δγ-2.5 to 15 gm-.

The relationship between the wafer position and etching rate when RIB is performed using the arrangement example shown in Fig. 1 and the apparatus shown in Fig. 2 is shown in Fig. 3 (when the wafer is placed in the center of the ring) and Fig. 4 (when the wafer is is shifted to the left by 5+u+), as shown by lines C and C',
When using the method of the present invention, if there is a misalignment of the wafer, the etching rate will be as shown in Figure 4 (the etching rate will be slightly higher at the periphery of the wafer, but in actual processing, such a magnitude is almost ignored). It was confirmed that the etching rate can be considered to be substantially uniform over the entire wafer.

Figure 2 incorporates the principle of Figure 1. The IE device is shown in cross section, and in the figure, 21 is a grounded etching chamber, 22 is a wafer, 23 is a ring-shaped member, 24 is a spoke-shaped ring support, 25 is a wafer support, 26 is a counter electrode, and 27 is a Gas inlet for introducing gas in the direction of the arrow, 2
7a is a gas outlet, 2B is an exhaust port that exhausts in the direction of the arrow,
29 is an electrode connected to an RF power source, 30 is an ipms,
32 is an O-ring provided for sealing the etching chamber 21;
3 indicates a transfer chamber.

As is clear from FIG. 2, the ring-shaped member 23 is fixed at a position apart from the wafer support platform 5 by a ring support 24, and has the basic configuration shown in FIG. In operation, the wafer support 25 is lowered in the direction shown by the arrow in the figure, the wafer is laterally transferred onto the support, and then the support is raised in the direction of the arrow to assume the state shown. After that, perform exhaust, gas introduction, power ON operations, and R11! Implement. In this RIB-, it was confirmed that the activated α impinges almost uniformly on the entire surface of the wafer by the ring-shaped member, and that even if the position of the wafer is slightly shifted, there is almost no effect. The gas is introduced into the etching chamber by being ejected from the inlet through a plurality of gas ejection ports 27a, and these ejection ports 27a are arranged to be concentrated above the central portion of the wafer as shown in the figure. The results were obtained.

Instead of the above operation, an electrostatic chuck may be used as the wafer support, and the wafer support may swing around one end 34 of the support instead of moving up and down.

〔Effect of the invention〕

As explained above, according to the present invention, in P
By arranging the ring around the wafer and away from the wafer, even if there is a misalignment of the wafer within the ring, the R
Since IE progresses almost uniformly, it is highly effective in improving the yield of semiconductor device manufacturing and improving product reliability.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing the relative positions of a ring and a wafer when carrying out the method of the invention, FIG. 2 is a sectional view of an apparatus for carrying out the method of the invention, and FIGS. Figure 3 is a diagram showing the relationship between the position of the ring and the etching rate. Figure 3 is the diagram when the wafer is located at the center of the ring, Figure 4 is the diagram when the wafer is misaligned, and Figure 5 is the diagram for the conventional etching rate. FIG. 6 is a cross-sectional view showing the positions of an example ring and a wafer, and FIG. 6 is a cross-sectional view of a conventional RIB apparatus. In the figure, 1 is a wafer support stand, 2 is a wafer, 3 is a ring, 2
1 is an etching chamber, 22 is a wafer, 23 is a ring-shaped member, 24 is a spoke-shaped ring support, 25 is a wafer support stand,
26 is a counter electrode, 27 is a gas inlet, 27a is a gas outlet, 28 is an exhaust port, 29 is an electrode, 30 is an RF power source, 31
32 represents the cooling water, 32 represents the O-ring, 33 represents the transfer chamber, and 34 represents one end of the support stand. Figure 1 Figure 21 3rd r! ! :A Figure 4 8' Figure 5

Claims (2)

[Claims] (1) In reactive ion etching performed by placing a ring-shaped member around the wafer, the etching is performed while the ring member is placed above and away from the wafer support on which the wafer is placed. Etching method. (2) The method according to claim 1, characterized in that a plurality of gas jet ports are provided above the central portion of the wafer to introduce the gas into the etching chamber.