JPS61131396A - Manufacture of electrode substrate - Google Patents

Manufacture of electrode substrate

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Publication number
JPS61131396A
JPS61131396A JP59252755A JP25275584A JPS61131396A JP S61131396 A JPS61131396 A JP S61131396A JP 59252755 A JP59252755 A JP 59252755A JP 25275584 A JP25275584 A JP 25275584A JP S61131396 A JPS61131396 A JP S61131396A
Authority
JP
Japan
Prior art keywords
transparent
substrate
electrode
transparent electrode
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59252755A
Other languages
Japanese (ja)
Inventor
清水 安元
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hoya Corp
Original Assignee
Hoya Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hoya Corp filed Critical Hoya Corp
Priority to JP59252755A priority Critical patent/JPS61131396A/en
Publication of JPS61131396A publication Critical patent/JPS61131396A/en
Pending legal-status Critical Current

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  • Electrochromic Elements, Electrophoresis, Or Variable Reflection Or Absorption Elements (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は電極用基板の製造方法に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a method for manufacturing an electrode substrate.

この電極用基板は、El (Electro Lum1
nescence)液晶、 ECD  (Electr
o Chrolc Display )及びEPIO(
Electro Phoretic tmaoe Di
splay)等の表示素子やその他の素子に利用される
This electrode substrate is made of El (Electro Lum1
nescence) LCD, ECD (Electr
o Chrolc Display ) and EPIO (
Electro Phoretic tmaoe Di
It is used for display elements such as display devices and other elements.

〔従来の技術とその問題点) 例えば、EL表示素子における電極用基板の製造方法と
しては、第2図に示すようにガラス等の透明基板1の一
主表面上にITO膜(酸化インジウムを主成分とし、ス
ズ酸化物を混入したindium Tinoxttie
をいう。)等の透明導電膜を被着し、この透明導1N!
を選択的にパターン化してなる透明電極2を形成してい
る。
[Prior art and its problems] For example, as shown in FIG. 2, as a method for manufacturing an electrode substrate for an EL display element, an ITO film (mainly made of indium oxide) is formed on one main surface of a transparent substrate 1 such as glass. Indium Tinoxttie mixed with tin oxide as a component
means. ), etc., and this transparent conductive 1N!
A transparent electrode 2 is formed by selectively patterning.

EL表示素子等は、最近、大型化、高分解能化の傾向に
あり、それを実現するために、より低抵抗な透明電極が
必要となる。しかし、透明電極の抵抗値は、比抵抗とし
て約10−4Ωαもあるので、その長さが珊大する程、
一方の端子から印加される信号電圧が著しく減衰してし
まう。このような透明電極の抵抗値を低く維持する手段
として、その膜厚を厚くすることが考えられるが、第3
図に示すEL表示素子の構造において、透明電極2の膜
厚を通常よりも厚くすると、その側面部分3が透明基板
1に対してほぼ直角に突出して、その上層の膜にも段差
面を形成してしまう。すなわち、透明電極2を形成した
後、Y2O3、Ta2 05等からなる第1y、電体層
4と、発光中心として0.−1〜2.0重ω%のf4n
(又は丁す、 Tn+、 Yb、 Er、 Sm、 C
u。
EL display elements and the like have recently become larger and have higher resolution, and in order to achieve this, transparent electrodes with lower resistance are required. However, since the resistance value of the transparent electrode is about 10-4Ωα as a specific resistance, the longer the length of the transparent electrode, the more
The signal voltage applied from one terminal is significantly attenuated. One possible means of maintaining the resistance value of such a transparent electrode low is to increase its film thickness, but the third
In the structure of the EL display element shown in the figure, when the film thickness of the transparent electrode 2 is made thicker than usual, its side surface portion 3 protrudes almost perpendicularly to the transparent substrate 1, and a stepped surface is also formed in the film on the upper layer. Resulting in. That is, after forming the transparent electrode 2, a first electric layer 4 made of Y2O3, Ta205, etc., and a 0.00. -1 to 2.0 weight ω% f4n
(or Tn+, Yb, Er, Sm, C
u.

Aj!、、Br等)をドープしたZnS  (又はZn
5e等)からなるEL発光層5と、y2o3.丁a20
5等からなる第2誘電体層6と、An等からなる背面電
極7を順次形成してEL表示素子を製作し、透明電極2
と背面電極7との間に電圧を印加してEL発光させる場
合、前述した透明電極2の側面部分3とのエツジ付近で
電界が集中するために、そのエツジ付近から、絶縁破壊
が発生しやすくなる欠点所あった。
Aj! , Br, etc.) doped with ZnS (or Zn
5e, etc.); Ding a20
An EL display element is manufactured by sequentially forming a second dielectric layer 6 made of 5 or the like and a back electrode 7 made of An or the like.
When a voltage is applied between the transparent electrode 2 and the back electrode 7 to generate EL light, the electric field is concentrated near the edge of the transparent electrode 2 and the side surface 3, so dielectric breakdown is likely to occur from the edge. There were some drawbacks.

上記欠点に対して、透明電極2の側面部分3に15〜4
5°程度の傾斜面を形成させる提案があるが、これとて
絶縁破壊は多少良くなるものの、根本的対策にはなり得
ない。
For the above-mentioned drawbacks, the side surface portion 3 of the transparent electrode 2 is
There is a proposal to form an inclined surface of about 5 degrees, but although this may improve dielectric breakdown to some extent, it cannot be a fundamental countermeasure.

次に、電極用基板の製造方法として、第4図(d)に示
すように基板1上に導電部10と非導電部11とを交互
に配列したものが提案されている(特開昭55−765
05 )。この提案は、先ず、基板1の一主表面上に透
明導電膜8を形成しく第5図(a))、この透明導電膜
8上にレジスト層を塗布し、所定のパターンで露光し、
現像して、レジストパターン9を形成しく同図(b))
、このレジストパターン9をマスクにして酸化性雰囲気
で処理することにより、マスクされている透明導電膜8
の部分を透明電極となる導電部10にし、マスクされて
いない部分を非導電部11にして(同図(C))、次に
レジストパターン9を除去して、電極用基板を得る(同
図(d))。
Next, as a method for manufacturing an electrode substrate, a method has been proposed in which conductive parts 10 and non-conductive parts 11 are arranged alternately on a substrate 1 as shown in FIG. -765
05). This proposal first involves forming a transparent conductive film 8 on one main surface of the substrate 1 (FIG. 5(a)), coating a resist layer on this transparent conductive film 8, and exposing it to light in a predetermined pattern.
It is developed to form a resist pattern 9 (Figure (b)).
By using this resist pattern 9 as a mask and processing it in an oxidizing atmosphere, the masked transparent conductive film 8 is removed.
The portion marked with is made into a conductive part 10 that becomes a transparent electrode, and the unmasked part is made into a non-conductive part 11 (FIG. 1C). Next, the resist pattern 9 is removed to obtain an electrode substrate (FIG. (d)).

しかし、この提案に従えば、酸化性雰囲気で処理するこ
とから、透明電極となる導電部10の抵抗値が当初の値
よりも10%程度高くなり、透明電極の導電性を劣化さ
せる欠点があった。また、透明電極となる導電部10と
非導電部11の境界は、第4図(d)に示すように非導
電部11の上層がレジストパターン9で被覆された部分
にまで及び、導電部10はその下層(基板1側)と比べ
てその上層の幅が狭くなる傾向にある。この傾向は、透
明導電膜8(透明電極となる導電部10)の膜厚が厚く
なる程、顕著になり、同時にパターニングの精度を低下
させることになり、表示素子の大型化、高分解能化の要
求に対して応えられなくなる欠点があった。
However, according to this proposal, since the treatment is carried out in an oxidizing atmosphere, the resistance value of the conductive part 10 that becomes the transparent electrode becomes about 10% higher than the original value, which has the disadvantage of deteriorating the conductivity of the transparent electrode. Ta. Further, the boundary between the conductive part 10 and the non-conductive part 11, which become transparent electrodes, extends to the part where the upper layer of the non-conductive part 11 is covered with the resist pattern 9, as shown in FIG. The width of the upper layer tends to be narrower than that of the lower layer (substrate 1 side). This tendency becomes more pronounced as the thickness of the transparent conductive film 8 (the conductive part 10 that becomes the transparent electrode) becomes thicker, and at the same time it reduces the precision of patterning. It had the disadvantage of not being able to meet demands.

〔発明の目的〕[Purpose of the invention]

本発明は、上記のような従来の電極用基板の製造方法に
おけ把問題点を解決するためになされたものであり、本
発明の第1の目的は、透明導電膜(透明電極)の抵抗値
を低下することのない電極用基板の製造方法を提供する
ことであり、第2の目的は、絶縁破壊の要因となるエツ
ジを形成することのない電極用基板の製造方法を提供す
ることであり、第3の目的は、透明導電膜(透明電極)
のパターニング精度を良好にすることのできる電極用基
板の製造方法を提供することである。
The present invention has been made to solve the problems in the conventional electrode substrate manufacturing method as described above, and the first object of the present invention is to reduce the resistance of a transparent conductive film (transparent electrode). The second objective is to provide a method for manufacturing an electrode substrate that does not reduce the value of the electrode substrate, and a second purpose is to provide a method for manufacturing an electrode substrate that does not form edges that cause dielectric breakdown. Yes, the third purpose is transparent conductive film (transparent electrode)
An object of the present invention is to provide a method for manufacturing an electrode substrate that can improve patterning accuracy.

〔問題点を解決するための手段〕[Means for solving problems]

このような目的を達成させるため、本発明の電極用基板
の製造方法は、基板の一主表面上に被着した透明導電膜
を選択的にパターン化して透明電極パターンを形成し、
前記基板の一主表面上の露出部分く隣り合う透明電極パ
ターン間の基板表面部分)に透明絶縁膜パターンを埋設
することを特徴としている。そして、好ましい実施態様
としては、透明電極と透明絶縁膜の各パターンとが交互
に隙間なく配列すると共に、両者の膜厚を実質的に等し
くし、更に、透明電極と透明絶縁膜の各パターンを共に
所定の膜厚にまで研摩している。
In order to achieve such an object, the method for manufacturing an electrode substrate of the present invention includes selectively patterning a transparent conductive film deposited on one main surface of the substrate to form a transparent electrode pattern,
The present invention is characterized in that a transparent insulating film pattern is embedded in the exposed portion on one main surface of the substrate (the substrate surface portion between adjacent transparent electrode patterns). In a preferred embodiment, the patterns of the transparent electrodes and the transparent insulating film are arranged alternately without gaps, and the thicknesses of both are made substantially equal. Both are polished to a predetermined thickness.

〔作 用〕[For production]

本発明の電極用基板の製造方法によれば、透明電極の突
出を完全に除去し、基板上の透明電極と透明絶縁膜とが
実質的に平坦状に形成される。また、透明電極の抵抗値
及びパターニング精度については良好に維持する。
According to the method for manufacturing an electrode substrate of the present invention, the protrusion of the transparent electrode is completely removed, and the transparent electrode and transparent insulating film on the substrate are formed in a substantially flat shape. Furthermore, the resistance value and patterning accuracy of the transparent electrode are maintained well.

〔実施例〕〔Example〕

本発明による電極用基板の製造方法の一実施例を第1図
に示す。本例では、先ずアルミノシリケートガラス; 
NA40 (HOYA■製)からなるガラス基板1を用
意し、5002を5重間%混入させたIn2 03粉末
をペレット状(15φX15t)ニ成型したものを蒸着
材料として用い、基板温度300℃及び真空度5 X 
1O−6TOrrの条件で真空蒸着法により、透明導電
膜12(膜厚3000人)をガラス基板1の一主表面上
に被着する(第1図(a))。次に、ポジ型フォトレジ
スト;HP−1350(ヘキスト社製)をスピンナー法
により透明導電膜12に塗布し、レジスト膜13(膜厚
5000人)を被着する(同図(b))。このレジスト
膜13は必要に応じN2ガス雰囲気中90℃で30分間
乾燥させる。次に、このレジスト膜13を露光マスクを
通して紫外線により密着露光した後、専用現像液により
現像して、所定のレジストパターン14を形成する(同
図(C))。次に−1このレジストパターン14付き基
板1を空気炉中120℃で30分間ベーキングを行った
後、CCl4ガス雰囲気、  0.2Torrの分圧及
び高周波電力 150W(周波数13.56MHz )
の条件で、レジストパターン14をマスクと【ノてプラ
ズマエツチング法により、露出部分の透明導電膜12を
除去して、レジストパターン14の下に透明電極パター
ン15を形成する(同図(d))。次に、透明電極パタ
ーン15上のレジストパターン14をレジスト剥離剤(
本例:熱濃硫酸)で処理して除去する(同図(e))。
An embodiment of the method for manufacturing an electrode substrate according to the present invention is shown in FIG. In this example, first, aluminosilicate glass;
A glass substrate 1 made of NA40 (manufactured by HOYA ■) was prepared, and In203 powder mixed with 5 weight percent of 5002 was molded into a pellet (15φ x 15t) as the vapor deposition material, and the substrate temperature was 300°C and the degree of vacuum was 5 X
A transparent conductive film 12 (thickness: 3000 mm) is deposited on one main surface of the glass substrate 1 by vacuum evaporation under conditions of 10-6 TOrr (FIG. 1(a)). Next, a positive photoresist; HP-1350 (manufactured by Hoechst) is applied to the transparent conductive film 12 by a spinner method, and a resist film 13 (thickness: 5000) is deposited (FIG. 2(b)). This resist film 13 is dried at 90° C. for 30 minutes in an N2 gas atmosphere if necessary. Next, this resist film 13 is closely exposed to ultraviolet rays through an exposure mask, and then developed with a special developer to form a predetermined resist pattern 14 (FIG. 3(C)). Next, after baking the substrate 1 with the resist pattern 14 in an air oven at 120°C for 30 minutes, it was placed in a CCl4 gas atmosphere, at a partial pressure of 0.2 Torr, and at a high frequency power of 150 W (frequency 13.56 MHz).
Under these conditions, using the resist pattern 14 as a mask, the exposed portion of the transparent conductive film 12 is removed by plasma etching to form a transparent electrode pattern 15 under the resist pattern 14 (FIG. 4(d)). . Next, the resist pattern 14 on the transparent electrode pattern 15 is removed using a resist stripping agent (
In this example, it is removed by treatment with hot concentrated sulfuric acid (see figure (e)).

次に、A「ガス雰囲気中で3 X 10’TOrrの分
圧、基板温度150℃及び高周波型カフ00W (周波
数13.56)1)12)の条件で、溶融石英をターゲ
ットとして高周波スパッタリング法により、Si 02
膜からなる透明絶縁11116(膜厚5000A )を
透明電極パターン15付き基板1の一主表面上に被着す
る(同図(「))。そして、研摩材(例:Ce02)を
用いて、透明絶縁膜16の表面を、先に形成された透明
電極パターン15が露出し、両者の膜厚が所定値(例:
 2000人)になるまで研摩して透明電極パターン1
8と透明絶縁膜11付きの電極用基板を得る(同図(g
))。なお、上記した透明電極パターン15.18はプ
ラズマエツチング法により形成されていることから、そ
の側面は基板1に対してほぼ直角状に形成され、そのパ
ターニング精度を良好にすることができる。
Next, under the conditions of A: a partial pressure of 3 x 10' TOrr in a gas atmosphere, a substrate temperature of 150°C, and a high-frequency cuff of 00 W (frequency 13.56) 1) 12), fused silica was used as a target by high-frequency sputtering. , Si 02
A transparent insulating film 11116 (thickness: 5000 Å) is deposited on one main surface of the substrate 1 with the transparent electrode pattern 15 (see ( )).Then, using an abrasive (e.g. Ce02), The previously formed transparent electrode pattern 15 is exposed on the surface of the insulating film 16, and the thickness of both films is set to a predetermined value (e.g.
2000) to form transparent electrode pattern 1.
8 and a transparent insulating film 11 are obtained (see (g) in the same figure).
)). Note that since the transparent electrode patterns 15 and 18 described above are formed by the plasma etching method, their side surfaces are formed approximately at right angles to the substrate 1, and the patterning accuracy can be improved.

本発明は、上記実施例で使用した材料及び成膜方法に限
定されない。透明導電膜については、その材料としてs
n 025重量%−1n20s 951iffi%のも
のの代わりに、この組成比に限ることなく適宜組成比を
選定してよいし、また、Sn 02 。
The present invention is not limited to the materials and film formation methods used in the above examples. Regarding the transparent conductive film, the material is s
Instead of n 025% by weight - 1n20s 951iffi%, an appropriate composition ratio may be selected without being limited to this composition ratio, and Sn 02 may be used.

In2 03 、5bz01やSn 02−3b2 0
3 、 In2 0l−3b2 03等を使用してもよ
く、その成膜方法として真空蒸着法の代わりに、スパッ
タリング法。
In2 03 , 5bz01 and Sn 02-3b2 0
3, In20l-3b203, etc. may be used, and the film forming method thereof is a sputtering method instead of a vacuum evaporation method.

イオンブレーティング法、 CVD法等を使用してもよ
い。この透明導電膜パターン形成のプラズマエ圧及び高
周波電力の多値については適宜選定される。レジスト膜
については、その材料としてポジ型レジストの代わりに
、ネガ型フォトレジスト。
Ion blating method, CVD method, etc. may also be used. The plasma pressure and the multiple values of high-frequency power for forming the transparent conductive film pattern are appropriately selected. Regarding the resist film, the material used is negative photoresist instead of positive resist.

ポジ型又はネガ型の電子ビームレジストやX線レジスト
等を使用してもよく、その塗布としてスピンナー法の代
わりに、ロールコータ−法、スプレー法等を使用しても
よく、その膜厚についても適宜選定してよい。透明絶縁
膜については、その材料としてSi 02の代わりに、
A12 03 、 Ti 02 。
Positive or negative electron beam resists, X-ray resists, etc. may be used, and the coating method may be a roll coater method, a spray method, etc. instead of the spinner method, and the film thickness may be You may select as appropriate. As for the transparent insulating film, instead of SiO2 as its material,
A12 03 , Ti 02 .

Ta2  os 、 Zr 02 、  Y2 03 
、 Si3  N4等を使用′ してもよく、その成膜
方法として高周波スパッタリングの代わりに、直流スパ
ッタリング、真空蒸着法、イオンブレーティング法、 
CVD法等を使用してもよく、その膜厚についても50
00人に限定されず、前述した透明電極の膜厚以上であ
ればよい。
Ta2 os , Zr 02 , Y2 03
, Si3N4, etc. may be used, and instead of high frequency sputtering, direct current sputtering, vacuum evaporation, ion blating, etc. may be used as the film forming method.
CVD method etc. may be used, and the film thickness is 50%.
The number of people is not limited to 00, and it is sufficient if the thickness is equal to or greater than the thickness of the transparent electrode described above.

〔発明の効果〕〔Effect of the invention〕

以上の通り、本発明によれば、物理的段差のない表面平
坦な透明電極付き電極用基板を製作することができるこ
とから、E1表示素子等の絶縁破壊電圧を大幅に向上さ
せることができ、更に、この段差の影響を無視すること
ができることから、透明電極の膜厚を従来品と比較して
一層厚くすることが可能となり、EL表示素子等におい
て大型化、高分解能化について絶大なる効果がある。ま
た、透明電極の製作工程において、その透明導rrs形
成当初の抵抗値に対して何等悪影響を与えていないこと
から、透明電極の抵抗値を良好に維持することができる
As described above, according to the present invention, it is possible to manufacture an electrode substrate with a transparent electrode that has a flat surface without physical steps, and therefore it is possible to significantly improve the dielectric breakdown voltage of E1 display elements, etc. Since the effect of this step can be ignored, it is possible to make the film thickness of the transparent electrode even thicker compared to conventional products, which has a tremendous effect on increasing the size and resolution of EL display elements, etc. . Further, in the manufacturing process of the transparent electrode, there is no adverse effect on the resistance value at the time of formation of the transparent conductor rrs, so that the resistance value of the transparent electrode can be maintained at a good level.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明による電極用基板の製造方法の各工程を
示す断面図、第2図は従来の電極用基板の構造を示す断
面図、第3図は従来の電極用基板を使用したEL表示素
子の一部拡大断面図、及び第4図は従来の電極用基板の
製造方法の各工程例を示す断面図である。 1・・・基板、12・・・透明導電膜、13・・・レジ
スト膜、14・・・レジストパターン、15. ia・
・・透明電極パターン、16・・・透明絶縁膜、17・
・・透明絶縁膜パターン 第1図 第2図       第4図 手  続  補  正  !  (自発)昭和60年4
月2日
Fig. 1 is a cross-sectional view showing each step of the method for manufacturing an electrode substrate according to the present invention, Fig. 2 is a cross-sectional view showing the structure of a conventional electrode substrate, and Fig. 3 is an EL device using a conventional electrode substrate. A partially enlarged cross-sectional view of a display element and FIG. 4 are cross-sectional views showing examples of each step of a conventional method for manufacturing an electrode substrate. DESCRIPTION OF SYMBOLS 1... Substrate, 12... Transparent conductive film, 13... Resist film, 14... Resist pattern, 15. ia・
...Transparent electrode pattern, 16...Transparent insulating film, 17.
...Transparent insulating film pattern Figure 1 Figure 2 Figure 4 Procedure Correction! (Voluntary) April 1985
2nd day of the month

Claims (3)

【特許請求の範囲】[Claims] (1)基板の一主表面上に被着した透明導電膜を選択的
にパターン化して透明電極パターンを形成し、前記基板
の一主表面上の露出部分に透明絶縁膜パターンを埋設す
ることを特徴とする電極用基板の製造方法。
(1) Selectively patterning a transparent conductive film deposited on one main surface of the substrate to form a transparent electrode pattern, and embedding a transparent insulating film pattern in the exposed portion on the one main surface of the substrate. A method for producing a featured electrode substrate.
(2)特許請求の範囲第1項記載において、透明電極と
透明絶縁膜との各パターンが交互に隙間なく配列すると
共に、両者の膜厚が実質的に等しいことを特徴とする電
極用基板の製造方法。
(2) An electrode substrate according to claim 1, characterized in that patterns of transparent electrodes and transparent insulating films are arranged alternately without gaps, and the thicknesses of both films are substantially equal. Production method.
(3)特許請求の範囲第2項において、透明電極と透明
絶縁膜の各パターンを共に所定の膜厚にまで研摩するこ
とを特徴とする電極用基板の製造方法。
(3) A method for manufacturing an electrode substrate according to claim 2, characterized in that each pattern of the transparent electrode and the transparent insulating film is polished to a predetermined thickness.
JP59252755A 1984-11-29 1984-11-29 Manufacture of electrode substrate Pending JPS61131396A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59252755A JPS61131396A (en) 1984-11-29 1984-11-29 Manufacture of electrode substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59252755A JPS61131396A (en) 1984-11-29 1984-11-29 Manufacture of electrode substrate

Publications (1)

Publication Number Publication Date
JPS61131396A true JPS61131396A (en) 1986-06-19

Family

ID=17241833

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59252755A Pending JPS61131396A (en) 1984-11-29 1984-11-29 Manufacture of electrode substrate

Country Status (1)

Country Link
JP (1) JPS61131396A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1990007254A1 (en) * 1988-12-16 1990-06-28 Kabushiki Kaisha Komatsu Seisakusho Thin-film electroluminescent element and method of manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1990007254A1 (en) * 1988-12-16 1990-06-28 Kabushiki Kaisha Komatsu Seisakusho Thin-film electroluminescent element and method of manufacturing the same

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