JPS61127489U - - Google Patents

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Publication number
JPS61127489U
JPS61127489U JP1110885U JP1110885U JPS61127489U JP S61127489 U JPS61127489 U JP S61127489U JP 1110885 U JP1110885 U JP 1110885U JP 1110885 U JP1110885 U JP 1110885U JP S61127489 U JPS61127489 U JP S61127489U
Authority
JP
Japan
Prior art keywords
frequency division
frequency
division ratio
controlling
ratio control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1110885U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1110885U priority Critical patent/JPS61127489U/ja
Publication of JPS61127489U publication Critical patent/JPS61127489U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図ａは、本考案を適用した電子時計の回路
ブロツク図、第１図ｂは、外部装置の回路ブロツ
ク図である。 １……発振器、１ａ……インバータ、２……分
周回路、３……一致回路、４……ＥＥＰ―ＲＯＭ
、５……時刻計数回路、６……表示装置、７……
周波数測定回路、８……記憶部、９……制御信号
発生回路。 FIG. 1a is a circuit block diagram of an electronic timepiece to which the present invention is applied, and FIG. 1b is a circuit block diagram of an external device. 1... Oscillator, 1a... Inverter, 2... Frequency dividing circuit, 3... Matching circuit, 4... EEP-ROM
, 5... Time counting circuit, 6... Display device, 7...
Frequency measurement circuit, 8... Storage section, 9... Control signal generation circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 高周波信号を分周する分周手段と、この分周手
段の分周比を制御するためのデータを記憶するＥ
ＥＰ（Ｅｌｅｃｔｒｉｃａｌｌｙ Ｅｒａｓｓａ
ｂｌｅ ａｎｄ Ｐｒｏｇｒａｍａｂｌｅ）ＲＯ
Ｍと、このＥＥＰＲＯＭに記憶されたデータで前
記分周手段の分周比を制御する分周比制御手段と
を具備してなる電子時計の分周比制御装置。 A frequency dividing means for frequency dividing a high frequency signal and an E for storing data for controlling the frequency division ratio of this frequency dividing means.
EP (Electrically Erassa)
ble and programmable)RO
1. A frequency division ratio control device for an electronic timepiece, comprising a frequency division ratio control means for controlling a frequency division ratio of the frequency division means using data stored in the EEPROM.
JP1110885U 1985-01-29 1985-01-29 Pending JPS61127489U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1110885U JPS61127489U (en) 1985-01-29 1985-01-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1110885U JPS61127489U (en) 1985-01-29 1985-01-29

Publications (1)

Publication Number Publication Date
JPS61127489U true JPS61127489U (en) 1986-08-09

Family

ID=30492918

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1110885U Pending JPS61127489U (en) 1985-01-29 1985-01-29

Country Status (1)

Country Link
JP (1) JPS61127489U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01220036A (en) * 1988-02-29 1989-09-01 Fujitsu Ltd File retrieving system
JPH01148890U (en) * 1988-04-06 1989-10-16

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01220036A (en) * 1988-02-29 1989-09-01 Fujitsu Ltd File retrieving system
JPH01148890U (en) * 1988-04-06 1989-10-16

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