JPS61126676U - - Google Patents

Info

Publication number
JPS61126676U
JPS61126676U JP880585U JP880585U JPS61126676U JP S61126676 U JPS61126676 U JP S61126676U JP 880585 U JP880585 U JP 880585U JP 880585 U JP880585 U JP 880585U JP S61126676 U JPS61126676 U JP S61126676U
Authority
JP
Japan
Prior art keywords
sub
signal
carrier
output
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP880585U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP880585U priority Critical patent/JPS61126676U/ja
Publication of JPS61126676U publication Critical patent/JPS61126676U/ja
Pending legal-status Critical Current

Links

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  • Stereo-Broadcasting Methods (AREA)
  • Television Receiver Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例のブロツク図、第2図は本考案
の一実施例を示すブロツク図、第3図は多重信号
のスペクトラムを示す図である。 11……電圧制御利得可変アンプ、12……レ
ベル検出器、13……加算器、14……減算器、
15……バンドパスフイルタ()、16……F
M検波器、17……バンドパスフイルタ()、
18……AM検波器、19……周波数判別器、2
0……ステレオインジケータ。
FIG. 1 is a block diagram of a conventional example, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIG. 3 is a diagram showing a spectrum of a multiplexed signal. 11... Voltage controlled gain variable amplifier, 12... Level detector, 13... Adder, 14... Subtractor,
15...Band pass filter (), 16...F
M detector, 17...Band pass filter (),
18...AM detector, 19...frequency discriminator, 2
0...Stereo indicator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] サブキヤリアをFM復調して得られるサブ信号
の出力とメイン信号の出力とをマトリツクスする
加・減算回路を具備するものにおいて、サブキヤ
リアと相関性のある信号レベルを検出して、サブ
信号もしくはメイン信号を通す電圧制御利得可変
アンプの利得を制御するように構成したことを特
徴とするTV音声多重信号復調回路。
A device equipped with an addition/subtraction circuit that matrixes the output of the sub-signal obtained by FM demodulating the sub-carrier and the output of the main signal, detects a signal level correlated with the sub-carrier and converts the sub-signal or the main signal. 1. A TV audio multiplex signal demodulation circuit characterized in that the circuit is configured to control the gain of a voltage-controlled variable gain amplifier that is passed through.
JP880585U 1985-01-24 1985-01-24 Pending JPS61126676U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP880585U JPS61126676U (en) 1985-01-24 1985-01-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP880585U JPS61126676U (en) 1985-01-24 1985-01-24

Publications (1)

Publication Number Publication Date
JPS61126676U true JPS61126676U (en) 1986-08-08

Family

ID=30488430

Family Applications (1)

Application Number Title Priority Date Filing Date
JP880585U Pending JPS61126676U (en) 1985-01-24 1985-01-24

Country Status (1)

Country Link
JP (1) JPS61126676U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63263842A (en) * 1987-04-21 1988-10-31 Clarion Co Ltd Radio receiver

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5536675B2 (en) * 1972-04-11 1980-09-22

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5536675B2 (en) * 1972-04-11 1980-09-22

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63263842A (en) * 1987-04-21 1988-10-31 Clarion Co Ltd Radio receiver

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