JPS61124110U - - Google Patents
Info
- Publication number
- JPS61124110U JPS61124110U JP857085U JP857085U JPS61124110U JP S61124110 U JPS61124110 U JP S61124110U JP 857085 U JP857085 U JP 857085U JP 857085 U JP857085 U JP 857085U JP S61124110 U JPS61124110 U JP S61124110U
- Authority
- JP
- Japan
- Prior art keywords
- output
- detector
- calibration signal
- certain period
- muting circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
- Noise Elimination (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP857085U JPS61124110U (sh) | 1985-01-23 | 1985-01-23 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP857085U JPS61124110U (sh) | 1985-01-23 | 1985-01-23 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61124110U true JPS61124110U (sh) | 1986-08-05 |
Family
ID=30487980
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP857085U Pending JPS61124110U (sh) | 1985-01-23 | 1985-01-23 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61124110U (sh) |
-
1985
- 1985-01-23 JP JP857085U patent/JPS61124110U/ja active Pending