JPS61124083U - - Google Patents

Info

Publication number
JPS61124083U
JPS61124083U JP668885U JP668885U JPS61124083U JP S61124083 U JPS61124083 U JP S61124083U JP 668885 U JP668885 U JP 668885U JP 668885 U JP668885 U JP 668885U JP S61124083 U JPS61124083 U JP S61124083U
Authority
JP
Japan
Prior art keywords
terminals
board
substrate surface
drive circuit
large number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP668885U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP668885U priority Critical patent/JPS61124083U/ja
Publication of JPS61124083U publication Critical patent/JPS61124083U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第5図はこの考案の一実施例を示した
もので、第1図はドツトマトリツクス液晶表示素
子の平面図、第2図は第1図のA―A線に沿う拡
大断面図、第3図および第4図は回路基板と液晶
表示素子の接続方法を示す平面図および側面図、
第5図は回路基板と液晶表示素子の他の接続方法
を示す平面図である。第6図および第7図はこの
考案の他の実施例を示したもので、第6図はドツ
トマトリツクス液晶表示素子の平面図、第7図は
回路基板と液晶表示素子の接続方法を示す平面図
である。第8図および第9図はそれぞれ従来のド
ツトマトリツクス液晶表示素子を示す回路基板接
続状態の平面図である。 11…液晶表示素子、11a,11b…基板、
12…コモン側電極、12a…コモン側電極端子
、13…セグメント側電極、13a…セグメント
側電極端子、16…駆動回路接続端子、17…透
明リード、18…ヒートシールコネクタ、20,
20a,20b…回路基板、21,22…ヒート
シールコネクタ。
Figures 1 to 5 show an embodiment of this invention, with Figure 1 being a plan view of a dot matrix liquid crystal display element, and Figure 2 being an enlarged cross section taken along line A--A in Figure 1. 3 and 4 are a plan view and a side view showing a method of connecting a circuit board and a liquid crystal display element,
FIG. 5 is a plan view showing another method of connecting the circuit board and the liquid crystal display element. Figures 6 and 7 show other embodiments of this invention, with Figure 6 being a plan view of a dot matrix liquid crystal display element, and Figure 7 showing a method of connecting the circuit board and the liquid crystal display element. FIG. FIGS. 8 and 9 are plan views showing a conventional dot matrix liquid crystal display element connected to a circuit board, respectively. 11...Liquid crystal display element, 11a, 11b...Substrate,
12...Common side electrode, 12a...Common side electrode terminal, 13...Segment side electrode, 13a...Segment side electrode terminal, 16...Drive circuit connection terminal, 17...Transparent lead, 18...Heat seal connector, 20,
20a, 20b...Circuit board, 21, 22...Heat seal connector.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 一対の基板の対向面に互いに直交する多数本の
電極を形成するとともに、一方の基板面に形成し
た各電極の端子をこの基板面の側縁部に配列し、
他方の基板面に形成した各電極の端子をこの基板
面の前記一方の基板の端子配列縁に対して90度
ずれた側縁部に配列したドツトマトリクス液晶表
示素子において、そのいずれか一方の基板の外面
に、他方の基板の端子配列縁と平行な側縁部に沿
わせて多数の駆動回路接続端子を配列形成すると
ともに、この一方の基板の外面に、この基板の端
子配列縁に配列されている各端子と前記各駆動回
路接続端子とを接続する多数本の透明リードを形
成したことを特徴とするドツトマトリクス液晶表
示素子。
Forming a large number of electrodes perpendicular to each other on opposing surfaces of a pair of substrates, and arranging terminals of each electrode formed on one substrate surface on the side edge of this substrate surface,
In a dot matrix liquid crystal display element in which the terminals of each electrode formed on the other substrate surface are arranged on the side edge of this substrate surface shifted by 90 degrees with respect to the terminal arrangement edge of the one substrate, one of the substrates A large number of drive circuit connection terminals are arranged on the outer surface of the other board along the side edge parallel to the terminal arrangement edge of the other board, and on the outer surface of this one board, the drive circuit connection terminals are arranged along the terminal arrangement edge of this board. 1. A dot matrix liquid crystal display element, characterized in that a large number of transparent leads are formed to connect each of the terminals and each of the drive circuit connection terminals.
JP668885U 1985-01-21 1985-01-21 Pending JPS61124083U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP668885U JPS61124083U (en) 1985-01-21 1985-01-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP668885U JPS61124083U (en) 1985-01-21 1985-01-21

Publications (1)

Publication Number Publication Date
JPS61124083U true JPS61124083U (en) 1986-08-05

Family

ID=30484361

Family Applications (1)

Application Number Title Priority Date Filing Date
JP668885U Pending JPS61124083U (en) 1985-01-21 1985-01-21

Country Status (1)

Country Link
JP (1) JPS61124083U (en)

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