JPS61123564U - - Google Patents

Info

Publication number
JPS61123564U
JPS61123564U JP721185U JP721185U JPS61123564U JP S61123564 U JPS61123564 U JP S61123564U JP 721185 U JP721185 U JP 721185U JP 721185 U JP721185 U JP 721185U JP S61123564 U JPS61123564 U JP S61123564U
Authority
JP
Japan
Prior art keywords
holes
mark
printed wiring
misalignment
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP721185U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP721185U priority Critical patent/JPS61123564U/ja
Publication of JPS61123564U publication Critical patent/JPS61123564U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structure Of Printed Boards (AREA)
JP721185U 1985-01-22 1985-01-22 Pending JPS61123564U (enrdf_load_stackoverflow)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP721185U JPS61123564U (enrdf_load_stackoverflow) 1985-01-22 1985-01-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP721185U JPS61123564U (enrdf_load_stackoverflow) 1985-01-22 1985-01-22

Publications (1)

Publication Number Publication Date
JPS61123564U true JPS61123564U (enrdf_load_stackoverflow) 1986-08-04

Family

ID=30485361

Family Applications (1)

Application Number Title Priority Date Filing Date
JP721185U Pending JPS61123564U (enrdf_load_stackoverflow) 1985-01-22 1985-01-22

Country Status (1)

Country Link
JP (1) JPS61123564U (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005317753A (ja) * 2004-04-28 2005-11-10 Matsushita Electric Ind Co Ltd プリント配線基板及びそのプリント配線基板への部品取付方法
US10242716B2 (en) 2016-09-29 2019-03-26 Toshiba Memory Corporation Semiconductor device having a slit for aligning a connector and a hole for determining positional accuracy of the slit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005317753A (ja) * 2004-04-28 2005-11-10 Matsushita Electric Ind Co Ltd プリント配線基板及びそのプリント配線基板への部品取付方法
WO2005107343A1 (ja) * 2004-04-28 2005-11-10 Matsushita Electric Industrial Co., Ltd. プリント配線基板及びそのプリント配線基板への部品取付方法
US10242716B2 (en) 2016-09-29 2019-03-26 Toshiba Memory Corporation Semiconductor device having a slit for aligning a connector and a hole for determining positional accuracy of the slit

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