JPS61120248A - Diagnosis system - Google Patents

Abstract

PURPOSE:To use each EIF (error indicator flip-flop) to perform the detailed diagnosis by having a key EIF which secured an OR of plural EIFs and then checking a fault of the key EIF. CONSTITUTION:When a fault is detected within a system, the error detection information is informed to an SVP (service processor) 5 via a DGU (diagnosis unit) 4. The SVP5 checks the contents of the key EIF of each device successively. When a set key EIF is detected, the data recording the contents of each EIF and desired registers are diagnosed. Thus the maintenance exchange parts is decided for the relevant device and displayed on a display. In such a way, the intensive contents of the key EIF are checked first. Then the detailed diagnosis and analysis are carried out. Thus a faulty area can be detected in a short period.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a diagnostic method, and particularly to a diagnostic method for performing built-in diagnosis of an information processing system.

[Conventional technology]

In general, failure diagnosis methods for information processing systems include the so-called micro diagnosis method and the built-in diagnosis method (Built I
n Diagnostics: Hereinafter abbreviated as BID Manshiki) The former micro-diagnosis method is a system that, when a failure occurs in a device controlled by a microprogram, extracts the contents of the device's control memory from a normal control microprogram. , replaced with a microprogram for fault diagnosis, which applies test data to the circuit to be diagnosed at the microinstruction level,
Diagnosis is performed by checking the execution results, but it generally requires a large amount of man-hours to develop a diagnostic microgram, and the disadvantage is that it is difficult to accurately diagnose intermittent failures. have.

On the other hand, the latter BID method is as follows.

In other words, in each device that makes up the information processing system,
Various hardware error detection circuits are provided,
When these error detection circuits detect an error, error indicators 7 and gnologs (hereinafter referred to as 1EIF) are set in response to each error detection circuit. A diagnostic unit is included for controlling these EIFs and other necessary registers to be connected in series as necessary to form 77 top paths for diagnosis.

When an error occurs, an error log containing information indicating the set/reset status of each of these EIFs is collected by the service processor in the system via this diagnostic unit and recorded on the disk. The error log is read from the disk as necessary, diagnostic analysis is performed by the service processor trap, the point where the failure has occurred is pointed out, and maintenance and replacement parts are determined based on this. [Points] Conventionally, in such an ID method, each device that performs seven stems was diagnosed based on information indicating the set/reset state of each EIF inputted from the entire system.

Therefore, whenever a failure occurs, the information indicating the set/reset status of the EIF that is input from the entire system is not subject to failure analysis, and it often takes an unnecessarily long time to identify the failure location.

The purpose of the present invention is to eliminate the above-mentioned conventional drawbacks and shorten the time required to locate a fault in the BID method as much as possible.
be.

[Means for solving inter-group points]

The method of the present invention is a built-in fault diagnosis method based on fault detection information from each device constituting an information processing system, and includes a plurality of hardware-based error detection circuits in each of the devices and each of the error detection circuits. an EIF corresponding to the error detection circuit that is set in response to error detection;
A plurality of the EIFs are collected to form an EIF group, and a representative EIF that is reset by the logical sum of the EIF outputs of the same EIF group G'l is provided with each of the EIF groups. The set/reset status of each representative EIF is checked first, and this EIF group is set to the representative EIF.
A detailed failure diagnosis analysis is subsequently performed using information indicating the set/reset of each gIF belonging to an IF group.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a schematic diagram showing one embodiment of the present invention. This embodiment shows arithmetic processing unit 1 (CPU) 1. Input/output control unit (IOP) 2, main memory unit (MMU) 3, diagnostic unit (DGU) 4, service gross unit? (SVP)5
, a disk 6, a console 7 and a printer 8.

These CPUI, l0P2, MMU3, etc. + NK
includes a hardware error detection circuit that detects the occurrence of an error, and each error detection circuit has a corresponding error indicator 7 trip that is set when this detection circuit detects an error. 70. (hereinafter referred to as EIF).

Furthermore, in this embodiment, as shown in FIG.
All outputs of EIFcl to EIFan, which are EIFs of the UI, are logically summed by an OR circuit ORc, and a representative EIF is set by the output of this zero circuit ORc.
17) Has EIFc. Therefore, if any one or more of EIFc1 to EIFcn in the CPUI is set (EIF is the representative EIF of the CPUI)
IFc is necessarily set.

Similarly, l0P2 is EIF that maps to l0P2.
I F I, ~EIF', EIF which is the representative EIF set by the logical sum of all the outputs of m! Similarly, MMU3 has each EI of MMU3.
It has EIFM, which is a representative EIF, which is set by the logical sum of the outputs of EIFM, which is F, and EIFM1.

8VP5 is CPUI, l0P2. When an error is detected in at least one device in the MMU3f7), the DGU4 is activated and all EIF's including the representative EIF in each device are
are connected in series with other necessary registers in the same device to form a diagnostic shift path, and these contents are transferred to disk 6.
You can collect error logs by forwarding them to .

Now, the diagnostic processing of this embodiment is executed as follows.

If any abnormality occurs in the 7 stem, error detection information is notified to the 5vps via the DGU 4.

Upon receiving this notification, 8VP5 controls D()U4 to form a shift path for diagnosis as described in Ic#I for each device, collects error logs, records them on disk 6, and creates an error log file. Next, 5VP5 creates a representative EIF for each device using the log file created in this way.
Check the contents in order. When a device with the representative EIF set is found, the log file for this device, that is, the data that records the contents of the valley EIF of this device and the contents of necessary registers, is diagnosed and analyzed. The replacement part is determined and information specifying it is displayed on the display gray of the console 7 or typed on the printer 8.

In this way, by first checking the contents of the representative EIF of each device that includes aggregated information, and then performing a more detailed diagnosis 11'r analysis starting with the device to which this is set, it is possible to identify the location of the failure. This makes it possible to reduce the time it takes to point out problems compared to the conventional method.

In the above embodiment, the devices to be diagnosed in the system are the CPUI, 10P2, and MMU3, but it is of course possible to include other devices.

In addition, instead of providing one representative EIF for each necessary device as in the above embodiment, it is easier to handle it if the representative EIF is handled all at once for diagnostic analysis. The EIFs are grouped together and these EIFs are grouped together.
It is also possible to provide a representative EiF that is set by the logical sum of the outputs of the IFs, and use this to perform the same processing as in the above embodiment. That is, in this case, the SVP sequentially checks the contents of the representative EIFs mentioned above using the created file, and when it finds the set representative EIF, it checks each EIF of the EIF group represented by this representative EIF. Determine maintenance and replacement parts for this group by performing diagnostic analysis using this data. In this case, the same device may include several vl representative EIF's, or only one representative EIF' may be included for a plurality of devices. In other words, each EIF in the system is grouped in a way that is most convenient from the viewpoint of diagnostic analysis, regardless of the configuration of the device.
A representative EIF may be provided for each F group.

〔Effect of the invention〕

As described above, according to the present invention, in the built-in diagnostic system, a representative EIF is provided which is set by the logical sum of the outputs of a plurality of EIFs, and when performing diagnostic analysis, the representative EIF is first set/reset. By checking the status and performing detailed diagnostic analysis using each EIF of the EIF group corresponding to the set representative EIF', it is possible to shorten the time required to point out a failure location.

This makes it possible to shorten repair time and improve reliability of the information processing system.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram showing one embodiment of the present invention, and FIG. 2 is a block diagram showing some details of this embodiment. In the figure, 1... Arithmetic processing unit (CPU), 2...
・Input/output side-device (IOP), 3--Main storage device 1E
(MMU), 4...Diagnosis Uni, ) (DGU), 5
・・・・・・Length-Bisprocessor C3VP), 6...
...Disk, 7...Console, 8...
...Printer, EIFc! ~EIF'Cfi, EIF
11~EIF Xm, E engineering FH1~EIFMI...
...Error indicator 7s, gua 0, gu, EIF
c.EIF! , EIFM...Representative EIF, OR,
c. OR,! , 0M......Logical sum circuit.

Claims (3)

[Claims] (1) In a built-in fault diagnosis method based on fault detection information from each device constituting an information processing system, each device includes a plurality of hardware error detection circuits, and each error detection circuit responds to error detection by hardware. An error indicator flip-flop (hereinafter abbreviated as EIF) corresponding to the error detection circuit that is set is provided, a plurality of EIFs are collected to form an EIF group, and the error indicator flip-flop is set by the logical sum of the outputs of each EIF belonging to the same EIF group. A representative EIF is provided for each of the EIF groups, and when diagnosing a failure, the set/reset status of each representative EIF is first checked, and each EIF belonging to this EIF group is set for the EIF group to which the representative EIF is set. A diagnostic method characterized in that detailed failure diagnosis analysis is subsequently performed using EIF set/reset information. (2) One EIF group is configured by all the EIFs included in each necessary device among the devices constituting the system, thereby providing a representative EIF for this device. A diagnostic method according to claim (1). (3) In the first aspect, each EIF in the system is divided into groups to form EIF groups suitable for failure diagnosis analysis, and thereby the representative EIF is provided for each EIF group. Diagnostic method described in ).