JPS61119448U - - Google Patents
Info
- Publication number
- JPS61119448U JPS61119448U JP311685U JP311685U JPS61119448U JP S61119448 U JPS61119448 U JP S61119448U JP 311685 U JP311685 U JP 311685U JP 311685 U JP311685 U JP 311685U JP S61119448 U JPS61119448 U JP S61119448U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- power line
- zero
- superimposes
- valid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 6
- 238000013480 data collection Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Landscapes
- Small-Scale Networks (AREA)
Description
第１図〜第３図はこの考案の一実施例を示し、
第１図はこの考案の一実施例によるデータ収集装
置を示す回路構成図、第２図は電力線に高周波信
号が重畳された状態を示す波形図、第３図は第１
図の回路構成図の動作状態を示す出力波形図、第
４図及び第５図は従来のデータ収集装置を示し、
第４図は第１図相当図、第５図は第２図相当図で
ある。
１は電力線、２は親機、３，４，５は子機、６
はコンデンサ、７はトランス、８は電力線搬送回
路、９はコンピユータ、１０はコンデンサ、１１
はトランス、１２は電力線搬送回路、１３はコン
ピユータ、１４，１５，１６はセンサ、１７はゼ
ロ・クロス検出回路、１８は受信回路、１９はゼ
ロ・クロス検出回路、２０は増幅回路、２１は抵
抗器、２２は時限回路、２２ａは時限回路２２の
出力波形、２３は時限回路、２３ａは時限回路２
３の出力波形、２４は監視回路、２５は高周波発
振回路、２６はアンド回路（ゲート手段）、２６
ａはアンド回路２６の出力波形、２７は電圧波形
である。なお、図中、同一符号は同一、又は相当
部分を示す。
Figures 1 to 3 show an embodiment of this invention,
FIG. 1 is a circuit configuration diagram showing a data acquisition device according to an embodiment of the invention, FIG. 2 is a waveform diagram showing a state in which a high frequency signal is superimposed on a power line, and FIG.
The output waveform diagram showing the operating state of the circuit configuration diagram in the figure, FIGS. 4 and 5 show a conventional data acquisition device,
4 is a diagram corresponding to FIG. 1, and FIG. 5 is a diagram corresponding to FIG. 2. 1 is the power line, 2 is the main unit, 3, 4, 5 are the slave units, 6
is a capacitor, 7 is a transformer, 8 is a power line carrier circuit, 9 is a computer, 10 is a capacitor, 11
is a transformer, 12 is a power line carrier circuit, 13 is a computer, 14, 15, 16 are sensors, 17 is a zero cross detection circuit, 18 is a receiving circuit, 19 is a zero cross detection circuit, 20 is an amplifier circuit, 21 is a resistor 22 is a timer circuit, 22a is an output waveform of the timer circuit 22, 23 is a timer circuit, 23a is a timer circuit 2
3 output waveform, 24 a monitoring circuit, 25 a high frequency oscillation circuit, 26 an AND circuit (gate means), 26
a is the output waveform of the AND circuit 26, and 27 is the voltage waveform. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
知結果を交流の電力線に重畳させて所定の場所へ
送り、データを収集するようにしたものにおいて
、上記交流電圧が零になると動作するゼロ・クロ
ス検出回路、このゼロ・クロス検出回路の動作点
からそれぞれ異なつた時間後に一定時間有為とな
る時限回路、この時限回路が有為のときに上記セ
ンサの検知結果を上記電力線に重畳させるゲート
手段を備えたことを特徴とするデータ収集装置。 A zero cross system that detects the operating status of various equipment using sensors, superimposes this detection result on an AC power line, sends it to a predetermined location, and collects data, which operates when the AC voltage becomes zero. A detection circuit, a time limit circuit that becomes valid for a certain period of time after different time points from the operating point of the zero-cross detection circuit, and a gate means that superimposes the detection result of the sensor on the power line when the time limit circuit is valid. A data collection device characterized by comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP311685U JPS61119448U (en) | 1985-01-14 | 1985-01-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP311685U JPS61119448U (en) | 1985-01-14 | 1985-01-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61119448U true JPS61119448U (en) | 1986-07-28 |
Family
ID=30477438
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP311685U Pending JPS61119448U (en) | 1985-01-14 | 1985-01-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61119448U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03278153A (en) * | 1990-03-27 | 1991-12-09 | Nec Corp | Automatic collecting device for terminal configuration information |
-
1985
- 1985-01-14 JP JP311685U patent/JPS61119448U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03278153A (en) * | 1990-03-27 | 1991-12-09 | Nec Corp | Automatic collecting device for terminal configuration information |
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